Age | Commit message (Expand) | Author | Files | Lines |
2015-10-07 | target-*: Drop cpu_gen_code define | Richard Henderson | 1 | -1/+0 |
2015-10-07 | target-arm: Add condexec state to insn_start | Richard Henderson | 1 | -0/+1 |
2015-09-25 | arm: Remove ELF_MACHINE from cpu.h | Peter Crosthwaite | 1 | -2/+0 |
2015-09-14 | target-arm: Add VMPIDR_EL2 | Edgar E. Iglesias | 1 | -0/+1 |
2015-09-14 | target-arm: Add VPIDR_EL2 | Edgar E. Iglesias | 1 | -0/+1 |
2015-09-14 | target-arm: Add VTTBR_EL2 | Edgar E. Iglesias | 1 | -0/+1 |
2015-09-14 | target-arm: Add VTCR_EL2 | Edgar E. Iglesias | 1 | -0/+1 |
2015-09-11 | tlb: Add "ifetch" argument to cpu_mmu_index() | Benjamin Herrenschmidt | 1 | -2/+2 |
2015-09-11 | typofixes - v4 | Veres Lajos | 1 | -2/+2 |
2015-09-11 | maint: remove / fix many doubled words | Daniel P. Berrange | 1 | -2/+2 |
2015-09-07 | target-arm: Fix arm_excp_unmasked() function | Sergey Sorokin | 1 | -3/+3 |
2015-09-07 | target-arm: Wire up HLT 0xf000 as the A64 semihosting instruction | Peter Maydell | 1 | -0/+1 |
2015-09-07 | target-arm/arm-semi.c: Support widening APIs to 64 bits | Peter Maydell | 1 | -1/+1 |
2015-08-25 | target-arm: Add CP_ACCESS_TRAP_UNCATEGORIZED_EL2, 3 | Peter Maydell | 1 | -0/+3 |
2015-08-13 | target-arm: Add the AArch64 view of the Secure physical timer | Peter Maydell | 1 | -1/+2 |
2015-08-13 | target-arm: Add debug check for mismatched cpreg resets | Peter Maydell | 1 | -0/+3 |
2015-08-13 | target-arm: Add the Hypervisor timer | Edgar E. Iglesias | 1 | -1/+2 |
2015-08-13 | target-arm: Add CNTHCTL_EL2 | Edgar E. Iglesias | 1 | -0/+1 |
2015-08-13 | target-arm: Add CNTVOFF_EL2 | Edgar E. Iglesias | 1 | -0/+1 |
2015-07-09 | cpu-exec: Purge all uses of ENV_GET_CPU() | Peter Crosthwaite | 1 | -1/+1 |
2015-06-19 | target-arm: Implement PMSAv7 MPU | Peter Crosthwaite | 1 | -0/+1 |
2015-06-19 | target-arm: Add registers for PMSAv7 | Peter Crosthwaite | 1 | -0/+10 |
2015-06-19 | target-arm: Do not reset sysregs marked as ALIAS | Sergey Fedorov | 1 | -2/+2 |
2015-06-15 | target-arm: Add the THUMB_DSP feature | Aurelio C. Remonda | 1 | -0/+1 |
2015-06-15 | target-arm/cpu.h: remove pending_exception | Alex Bennée | 1 | -1/+0 |
2015-05-29 | target-arm: Move TB flags down to fill gap | Peter Maydell | 1 | -2/+2 |
2015-05-29 | target-arm: Extend FP checks to use an EL | Greg Bellows | 1 | -22/+70 |
2015-05-29 | target-arm: Make singlestate TB flags common between AArch32/64 | Peter Maydell | 1 | -42/+27 |
2015-05-29 | target-arm: Add AArch64 CPTR registers | Greg Bellows | 1 | -0/+5 |
2015-05-29 | target-arm: Allow cp access functions to indicate traps to EL2 or EL3 | Peter Maydell | 1 | -1/+5 |
2015-05-29 | target-arm: Update interrupt handling to use target EL | Greg Bellows | 1 | -3/+4 |
2015-05-29 | target-arm: Move setting of exception info into tlb_fill | Peter Maydell | 1 | -2/+0 |
2015-05-29 | target-arm: Add exception target el infrastructure | Greg Bellows | 1 | -0/+1 |
2015-04-30 | tcg: Delete unused cpu_pc_from_tb() | Peter Crosthwaite | 1 | -9/+0 |
2015-04-30 | arm: cpu.h: Remove unused typdefs | Peter Crosthwaite | 1 | -5/+0 |
2015-04-26 | target-arm: rename c1_coproc to cpacr_el1 | Sergey Fedorov | 1 | -2/+2 |
2015-03-10 | cpu: Make cpu_init() return QOM CPUState object | Eduardo Habkost | 1 | -8/+1 |
2015-02-13 | target-arm: Add 32/64-bit register sync | Greg Bellows | 1 | -0/+2 |
2015-02-05 | target-arm: Guest cpu endianness determination for virtio KVM ARM/ARM64 | Pranavkumar Sawargaonkar | 1 | -0/+2 |
2015-02-05 | target-arm: Don't define any MMU_MODE*_SUFFIXes | Peter Maydell | 1 | -2/+0 |
2015-02-05 | target-arm: Define correct mmu_idx values and pass them in TB flags | Peter Maydell | 1 | -23/+92 |
2015-02-05 | target-arm: Make arm_current_el() return sensible values for M profile | Peter Maydell | 1 | -0/+4 |
2015-02-05 | target-arm: Split NO_MIGRATE into ALIAS and NO_RAW | Peter Maydell | 1 | -4/+11 |
2015-01-20 | exec.c: Drop TARGET_HAS_ICE define and checks | Peter Maydell | 1 | -2/+0 |
2014-12-11 | target-arm: make MAIR0/1 banked | Greg Bellows | 1 | -1/+20 |
2014-12-11 | target-arm: make c13 cp regs banked (FCSEIDR, ...) | Fabian Aggeler | 1 | -5/+31 |
2014-12-11 | target-arm: make VBAR banked | Greg Bellows | 1 | -1/+9 |
2014-12-11 | target-arm: make PAR banked | Fabian Aggeler | 1 | -1/+9 |
2014-12-11 | target-arm: make IFAR/DFAR banked | Fabian Aggeler | 1 | -1/+18 |
2014-12-11 | target-arm: make DFSR banked | Fabian Aggeler | 1 | -1/+9 |