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target-arm
/
cpu.h
Age
Commit message (
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)
Author
Files
Lines
2015-06-19
target-arm: Implement PMSAv7 MPU
Peter Crosthwaite
1
-0
/
+1
2015-06-19
target-arm: Add registers for PMSAv7
Peter Crosthwaite
1
-0
/
+10
2015-06-19
target-arm: Do not reset sysregs marked as ALIAS
Sergey Fedorov
1
-2
/
+2
2015-06-15
target-arm: Add the THUMB_DSP feature
Aurelio C. Remonda
1
-0
/
+1
2015-06-15
target-arm/cpu.h: remove pending_exception
Alex Bennée
1
-1
/
+0
2015-05-29
target-arm: Move TB flags down to fill gap
Peter Maydell
1
-2
/
+2
2015-05-29
target-arm: Extend FP checks to use an EL
Greg Bellows
1
-22
/
+70
2015-05-29
target-arm: Make singlestate TB flags common between AArch32/64
Peter Maydell
1
-42
/
+27
2015-05-29
target-arm: Add AArch64 CPTR registers
Greg Bellows
1
-0
/
+5
2015-05-29
target-arm: Allow cp access functions to indicate traps to EL2 or EL3
Peter Maydell
1
-1
/
+5
2015-05-29
target-arm: Update interrupt handling to use target EL
Greg Bellows
1
-3
/
+4
2015-05-29
target-arm: Move setting of exception info into tlb_fill
Peter Maydell
1
-2
/
+0
2015-05-29
target-arm: Add exception target el infrastructure
Greg Bellows
1
-0
/
+1
2015-04-30
tcg: Delete unused cpu_pc_from_tb()
Peter Crosthwaite
1
-9
/
+0
2015-04-30
arm: cpu.h: Remove unused typdefs
Peter Crosthwaite
1
-5
/
+0
2015-04-26
target-arm: rename c1_coproc to cpacr_el1
Sergey Fedorov
1
-2
/
+2
2015-03-10
cpu: Make cpu_init() return QOM CPUState object
Eduardo Habkost
1
-8
/
+1
2015-02-13
target-arm: Add 32/64-bit register sync
Greg Bellows
1
-0
/
+2
2015-02-05
target-arm: Guest cpu endianness determination for virtio KVM ARM/ARM64
Pranavkumar Sawargaonkar
1
-0
/
+2
2015-02-05
target-arm: Don't define any MMU_MODE*_SUFFIXes
Peter Maydell
1
-2
/
+0
2015-02-05
target-arm: Define correct mmu_idx values and pass them in TB flags
Peter Maydell
1
-23
/
+92
2015-02-05
target-arm: Make arm_current_el() return sensible values for M profile
Peter Maydell
1
-0
/
+4
2015-02-05
target-arm: Split NO_MIGRATE into ALIAS and NO_RAW
Peter Maydell
1
-4
/
+11
2015-01-20
exec.c: Drop TARGET_HAS_ICE define and checks
Peter Maydell
1
-2
/
+0
2014-12-11
target-arm: make MAIR0/1 banked
Greg Bellows
1
-1
/
+20
2014-12-11
target-arm: make c13 cp regs banked (FCSEIDR, ...)
Fabian Aggeler
1
-5
/
+31
2014-12-11
target-arm: make VBAR banked
Greg Bellows
1
-1
/
+9
2014-12-11
target-arm: make PAR banked
Fabian Aggeler
1
-1
/
+9
2014-12-11
target-arm: make IFAR/DFAR banked
Fabian Aggeler
1
-1
/
+18
2014-12-11
target-arm: make DFSR banked
Fabian Aggeler
1
-1
/
+9
2014-12-11
target-arm: make IFSR banked
Fabian Aggeler
1
-1
/
+9
2014-12-11
target-arm: make DACR banked
Fabian Aggeler
1
-2
/
+11
2014-12-11
target-arm: make TTBCR banked
Fabian Aggeler
1
-3
/
+8
2014-12-11
target-arm: make TTBR0/1 banked
Fabian Aggeler
1
-2
/
+18
2014-12-11
target-arm: make CSSELR banked
Fabian Aggeler
1
-1
/
+9
2014-12-11
target-arm: add SCTLR_EL3 and make SCTLR banked
Fabian Aggeler
1
-1
/
+9
2014-12-11
target-arm: add MVBAR support
Fabian Aggeler
1
-0
/
+1
2014-12-11
target-arm: add SDER definition
Greg Bellows
1
-0
/
+1
2014-12-11
target-arm: add NSACR register
Fabian Aggeler
1
-0
/
+1
2014-12-11
target-arm: add secure state bit to CPREG hash
Peter Maydell
1
-5
/
+20
2014-12-11
target-arm: add CPREG secure state support
Fabian Aggeler
1
-2
/
+34
2014-12-11
target-arm: add non-secure Translation Block flag
Sergey Fedorov
1
-0
/
+27
2014-12-11
target-arm: add banked register accessors
Fabian Aggeler
1
-0
/
+27
2014-12-11
target-arm: extend async excp masking
Greg Bellows
1
-14
/
+52
2014-11-04
target-arm: Correct condition for taking VIRQ and VFIQ
Peter Maydell
1
-2
/
+2
2014-11-04
target-arm: Separate out M profile cpu_exec_interrupt handling
Peter Maydell
1
-14
/
+2
2014-10-24
target-arm: make arm_current_el() return EL3
Fabian Aggeler
1
-9
/
+20
2014-10-24
target-arm: rename arm_current_pl to arm_current_el
Greg Bellows
1
-12
/
+15
2014-10-24
target-arm: add arm_is_secure() function
Fabian Aggeler
1
-0
/
+47
2014-10-24
target-arm: increase arrays of registers R13 & R14
Fabian Aggeler
1
-2
/
+2
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