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target-arm
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cpu.h
Age
Commit message (
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Author
Files
Lines
2016-05-19
cpu: move exec-all.h inclusion out of cpu.h
Paolo Bonzini
1
-2
/
+0
2016-05-19
target-arm: make cpu-qom.h not target specific
Paolo Bonzini
1
-3
/
+176
2016-05-12
tb: consistently use uint32_t for tb->flags
Emilio G. Cota
1
-1
/
+1
2016-03-04
target-arm: implement BE32 mode in system emulation
Paolo Bonzini
1
-3
/
+2
2016-03-04
target-arm: introduce tbflag for endianness
Peter Crosthwaite
1
-0
/
+7
2016-03-04
linux-user: arm: handle CPSR.E correctly in strex emulation
Paolo Bonzini
1
-0
/
+11
2016-03-04
arm: cpu: handle BE32 user-mode as BE
Peter Crosthwaite
1
-1
/
+16
2016-03-04
target-arm: cpu: Move cpu_is_big_endian to header
Peter Crosthwaite
1
-0
/
+19
2016-03-04
target-arm: implement SCTLR.B, drop bswap_code
Paolo Bonzini
1
-8
/
+39
2016-02-26
target-arm: Fix handling of SDCR for 32-bit code
Peter Maydell
1
-0
/
+4
2016-02-26
target-arm: Add write_type argument to cpsr_write()
Peter Maydell
1
-2
/
+11
2016-02-23
all: Clean up includes
Peter Maydell
1
-1
/
+0
2016-02-18
target-arm: Report correct syndrome for FPEXC32_EL2 traps
Peter Maydell
1
-0
/
+5
2016-02-18
target-arm: Implement MDCR_EL3.TDOSA and MDCR_EL2.TDOSA traps
Peter Maydell
1
-0
/
+12
2016-02-18
target-arm: correct CNTFRQ access rights
Peter Maydell
1
-0
/
+12
2016-02-11
target-arm: Add isread parameter to CPAccessFns
Peter Maydell
1
-1
/
+3
2016-02-11
target-arm: Update arm_generate_debug_exceptions() to handle EL2/EL3
Peter Maydell
1
-5
/
+43
2016-02-11
target-arm: Implement MDCR_EL3 and SDCR
Peter Maydell
1
-0
/
+1
2016-02-11
target-arm: Fix typo in comment in arm_is_secure_below_el3()
Peter Maydell
1
-1
/
+1
2016-01-21
target-arm: Properly support EL2 and EL3 in arm_el_is_aa64()
Peter Maydell
1
-9
/
+24
2016-01-21
target-arm: Support multiple address spaces in page table walks
Peter Maydell
1
-0
/
+9
2016-01-21
target-arm: Implement asidx_from_attrs
Peter Maydell
1
-0
/
+8
2016-01-21
target-arm: Add QOM property for Secure memory region
Peter Maydell
1
-0
/
+6
2015-10-27
target-arm: Add HPFAR_EL2
Edgar E. Iglesias
1
-0
/
+1
2015-10-27
target-arm: Fix "no 64-bit EL2" assumption in arm_excp_unmasked()
Peter Maydell
1
-30
/
+52
2015-10-16
target-arm: implement arm_debug_target_el()
Sergey Fedorov
1
-1
/
+16
2015-10-16
target-arm: Add MDCR_EL2
Sergey Fedorov
1
-0
/
+1
2015-10-16
target-arm: Implement AArch64 OSLAR/OSLSR_EL1 sysregs
Davorin Mista
1
-0
/
+1
2015-10-16
target-arm: Avoid calling arm_el_is_aa64() function for unimplemented EL
Sergey Sorokin
1
-3
/
+8
2015-10-07
target-*: Drop cpu_gen_code define
Richard Henderson
1
-1
/
+0
2015-10-07
target-arm: Add condexec state to insn_start
Richard Henderson
1
-0
/
+1
2015-09-25
arm: Remove ELF_MACHINE from cpu.h
Peter Crosthwaite
1
-2
/
+0
2015-09-14
target-arm: Add VMPIDR_EL2
Edgar E. Iglesias
1
-0
/
+1
2015-09-14
target-arm: Add VPIDR_EL2
Edgar E. Iglesias
1
-0
/
+1
2015-09-14
target-arm: Add VTTBR_EL2
Edgar E. Iglesias
1
-0
/
+1
2015-09-14
target-arm: Add VTCR_EL2
Edgar E. Iglesias
1
-0
/
+1
2015-09-11
tlb: Add "ifetch" argument to cpu_mmu_index()
Benjamin Herrenschmidt
1
-2
/
+2
2015-09-11
typofixes - v4
Veres Lajos
1
-2
/
+2
2015-09-11
maint: remove / fix many doubled words
Daniel P. Berrange
1
-2
/
+2
2015-09-07
target-arm: Fix arm_excp_unmasked() function
Sergey Sorokin
1
-3
/
+3
2015-09-07
target-arm: Wire up HLT 0xf000 as the A64 semihosting instruction
Peter Maydell
1
-0
/
+1
2015-09-07
target-arm/arm-semi.c: Support widening APIs to 64 bits
Peter Maydell
1
-1
/
+1
2015-08-25
target-arm: Add CP_ACCESS_TRAP_UNCATEGORIZED_EL2, 3
Peter Maydell
1
-0
/
+3
2015-08-13
target-arm: Add the AArch64 view of the Secure physical timer
Peter Maydell
1
-1
/
+2
2015-08-13
target-arm: Add debug check for mismatched cpreg resets
Peter Maydell
1
-0
/
+3
2015-08-13
target-arm: Add the Hypervisor timer
Edgar E. Iglesias
1
-1
/
+2
2015-08-13
target-arm: Add CNTHCTL_EL2
Edgar E. Iglesias
1
-0
/
+1
2015-08-13
target-arm: Add CNTVOFF_EL2
Edgar E. Iglesias
1
-0
/
+1
2015-07-09
cpu-exec: Purge all uses of ENV_GET_CPU()
Peter Crosthwaite
1
-1
/
+1
2015-06-19
target-arm: Implement PMSAv7 MPU
Peter Crosthwaite
1
-0
/
+1
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