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path: root/target-arm/cpu.c
AgeCommit message (Expand)AuthorFilesLines
2013-03-12target-arm: Override do_interrupt for ARMv7-M profileAndreas Färber1-1/+13
2013-03-12cpu: Replace do_interrupt() by CPUClass::do_interrupt methodAndreas Färber1-0/+1
2013-02-16cpu: Add CPUArchState pointer to CPUStateAndreas Färber1-0/+2
2013-02-16target-arm: Move TCG initialization to ARMCPU initfnAndreas Färber1-0/+6
2013-02-16target-arm: Update ARMCPU to QOM realizefnAndreas Färber1-7/+14
2013-01-30target-arm: Rename CPU typesAndreas Färber1-2/+6
2013-01-27target-arm: Catch attempt to instantiate abstract type in cpu_init()Andreas Färber1-1/+2
2013-01-27target-arm: Detect attempt to instantiate non-CPU type in cpu_init()Andreas Färber1-0/+17
2013-01-15cpu: Move cpu_index field to CPUStateAndreas Färber1-1/+1
2013-01-11target-arm: use type_register() instead of type_register_static()Eduardo Habkost1-1/+1
2012-12-19softmmu: move include files to include/sysemu/Paolo Bonzini1-1/+1
2012-07-12target-arm: Extend feature flags to 64 bitsPeter Maydell1-1/+1
2012-07-12target-arm: Implement privileged-execute-never (PXN)Peter Maydell1-0/+4
2012-06-20target-arm: Remove ARM_CPUID_* macrosPeter Maydell1-25/+25
2012-06-20target-arm: Convert final ID registersPeter Maydell1-2/+0
2012-06-20target-arm: Convert MPIDRPeter Maydell1-0/+2
2012-06-20target-arm: Convert cp15 cache ID registersPeter Maydell1-2/+0
2012-06-20target-arm: Convert cp15 crn=0 crm={1,2} feature registersPeter Maydell1-14/+0
2012-06-20target-arm: Convert cp15 crn=1 registersPeter Maydell1-1/+6
2012-06-20target-arm: Convert cp15 crn=9 registersPeter Maydell1-0/+34
2012-06-20target-arm: Convert cp15 crn=6 registersPeter Maydell1-0/+10
2012-06-20target-arm: convert cp15 crn=7 registersPeter Maydell1-0/+19
2012-06-20target-arm: Convert cp15 crn=15 registersPeter Maydell1-2/+38
2012-06-20target-arm: Convert cp15 crn=2 registersPeter Maydell1-1/+0
2012-06-20target-arm: Convert performance monitor registersPeter Maydell1-4/+0
2012-06-20target-arm: Add register_cp_regs_for_features()Peter Maydell1-0/+2
2012-06-20target-arm: initial coprocessor register frameworkPeter Maydell1-0/+41
2012-06-20target-arm: Fix 11MPCore cache type register valuePeter Maydell1-1/+1
2012-04-27target-arm: Move A9 config_base_address reset value to ARMCPUPeter Maydell1-3/+1
2012-04-27target-arm: Change cpu_arm_init() return type to ARMCPUAndreas Färber1-1/+1
2012-04-21target-arm: Move reset handling to arm_cpu_resetPeter Maydell1-3/+91
2012-04-21target-arm: Move cache ID register setup to cpu specific init fnsPeter Maydell1-0/+11
2012-04-21target-arm: Move feature register setup to per-CPU init fnsPeter Maydell1-0/+94
2012-04-21target-arm: Move SCTLR reset value setup to per cpu init fnsPeter Maydell1-0/+23
2012-04-21target-arm: Move CTR setup to per cpu init fnsPeter Maydell1-0/+22
2012-04-21target-arm: Move MVFR* setup to per cpu init fnsPeter Maydell1-0/+14
2012-04-21target-arm: Move FPSID config to cpu init fnsPeter Maydell1-0/+9
2012-04-21target-arm: Move feature bit settings to CPU init fnsPeter Maydell1-0/+132
2012-04-21target-arm: Add QOM subclasses for each ARM cpu implementationPeter Maydell1-1/+225
2012-03-29target-arm: Minimalistic CPU QOM'ificationAndreas Färber1-0/+60
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