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2014-06-05softmmu: introduce cpu_ldst.hPaolo Bonzini2-3/+2
This will collect all load and store helpers soon. For now it is just a replacement for softmmu_exec.h, which this patch stops including directly, but we also include it where this will be necessary in order to simplify the next patch. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-06-05softmmu: commonize helper definitionsPaolo Bonzini1-14/+0
They do not need to be in op_helper.c. Because cputlb.c now includes softmmu_template.h twice for each size, io_readX must be elided the second time through. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-06-05softmmu: move ALIGNED_ONLY to cpu.hPaolo Bonzini2-1/+1
Prepare for moving softmmu_header.h inclusion out of .c files Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-06-05softmmu: make do_unaligned_access a method of CPUPaolo Bonzini3-4/+7
We will reference it from more files in the next patch. To avoid ruining the small steps we're making towards multi-target, make it a method of CPU rather than just a global. Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-05-28tcg: Invert the inclusion of helper.hRichard Henderson7-12/+7
Rather than include helper.h with N values of GEN_HELPER, include a secondary file that sets up the macros to include helper.h. This minimizes the files that must be rebuilt when changing the macros for file N. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-14savevm: Remove all the unneeded version_minimum_id_old (rest)Juan Quintela1-2/+0
After previous Peter patch, they are redundant. This way we don't assign them except when needed. Once there, there were lots of case where the ".fields" indentation was wrong: .fields = (VMStateField []) { and .fields = (VMStateField []) { Change all the combinations to: .fields = (VMStateField[]){ The biggest problem (appart from aesthetics) was that checkpatch complained when we copy&pasted the code from one place to another. Signed-off-by: Juan Quintela <quintela@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
2014-05-02target-alpha: Fix RDUSPRichard Henderson1-1/+1
Commit 06ef8604e92964cbf30084b7d31091aa7cbbb62f contained a typo. Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17target-alpha: Remove cpu_unique, cpu_sysval, cpu_uspRichard Henderson1-19/+18
Technically, these variables could have been referenced both via offsets from env and as TCG registers, which would be illegal. Of course, that could only be done from PALcode, and ours doesn't do that. But honestly, these are used infrequently enough that they don't really need to be TCG registers. We wind up with exactly the same code if we follow the letter of the law and issue explicit ld/st. Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17target-alpha: Tidy alpha_translate_initRichard Henderson1-35/+43
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17target-alpha: Don't issue goto_tb under singlestepRichard Henderson1-1/+2
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17target-alpha: Use non-local temps for zero/sinkRichard Henderson1-2/+2
These values are no longer live across branches. Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17target-alpha: Use extract to get insn fieldsRichard Henderson1-27/+22
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17target-alpha: Convert mfpr/mtpr to source/sinkRichard Henderson1-33/+19
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17target-alpha: Convert gen_cpys et al to source/sinkRichard Henderson1-76/+24
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17target-alpha: Convert gen_fcvtlq/ql to source/sinkRichard Henderson3-50/+36
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17target-alpha: Convert gen_fcmov to source/sinkRichard Henderson1-30/+14
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17target-alpha: Convert gen_bcond to source/sinkRichard Henderson1-18/+6
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17target-alpha: Convert most ieee insns to source/sinkRichard Henderson1-52/+17
This one fixes a bug, previously noted as supressing exceptions in the (unlikely) case the destination register was $f31. Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17target-alpha: Convert gen_ieee_input to source/sinkRichard Henderson1-19/+13
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17target-alpha: Convert MVIOP2 to source/sinkRichard Henderson1-19/+4
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17target-alpha: Convert ARITH3 to source/sinkRichard Henderson1-69/+39
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17target-alpha: Convert FARITH3 to source/sinkRichard Henderson1-53/+12
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17target-alpha: Convert FARITH2 to source/sinkRichard Henderson1-32/+11
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17target-alpha: Convert gen_zap/not to source/sinkRichard Henderson1-30/+11
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17target-alpha: Convert gen_ins_h/l to source/sinkRichard Henderson1-61/+50
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17target-alpha: Convert gen_ext_h/l to source/sinkRichard Henderson1-40/+26
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17target-alpha: Convert gen_msk_h/l to source/sinkRichard Henderson1-28/+19
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17target-alpha: Convert gen_cmov to source/sinkRichard Henderson1-44/+22
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17target-alpha: Convert ARITH3_EX to source/sinkRichard Henderson1-43/+6
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17target-alpha: Convert gen_cmp to source/sinkRichard Henderson1-35/+5
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17target-alpha: Convert gen_store_conditional to source/sinkRichard Henderson1-5/+1
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17target-alpha: Convert gen_load/store_mem to source/sinkRichard Henderson1-38/+29
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17target-alpha: Convert opcode 0x1F to source/sinkRichard Henderson1-20/+10
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17target-alpha: Convert opcode 0x1E to source/sinkRichard Henderson1-2/+4
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17target-alpha: Convert opcode 0x1C to source/sinkRichard Henderson1-54/+19
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17target-alpha: Convert opcode 0x1B to source/sinkRichard Henderson1-19/+13
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17target-alpha: Convert opcode 0x1A to source/sinkRichard Henderson1-5/+4
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17target-alpha: Convert opcode 0x18 to source/sinkRichard Henderson1-9/+9
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17target-alpha: Convert opcode 0x17 to source/sinkRichard Henderson1-21/+20
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17target-alpha: Convert opcode 0x14 to source/sinkRichard Henderson1-26/+18
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17target-alpha: Convert opcode 0x13 to source/sinkRichard Henderson1-39/+10
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17target-alpha: Convert opcode 0x12 to source/sinkRichard Henderson1-36/+27
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17target-alpha: Convert opcode 0x11 to source/sinkRichard Henderson1-89/+37
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17target-alpha: Introduce functions for source/sinkRichard Henderson1-233/+163
This will allow cleaner handling of $31 and $f31. Convert opcodes 0x08, 0x09, 0x10 as examples. Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17target-alpha: Introduce REQUIRE_REG_31Richard Henderson1-26/+44
We were missing quite a few checks for Ra or Rb required to be 31. Further, the one place we did check we also checked for no literal operand and the Handbook says nothing about that. Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17target-alpha: Introduce REQUIRE_TB_FLAGRichard Henderson1-184/+133
The methods by which we check for cpu features varied wildly across the function. Using a nice macro cleans this up. Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17target-alpha: fix the bracesPaolo Bonzini1-133/+180
Conform to coding style, and avoid further occurrences of bugs due to misplaced braces. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-03-17target-alpha: fix subl and s8subl indentationPaolo Bonzini1-1/+2
Two missing braces, one close and one open, fabulously let the code compile. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-03-13cputlb: Change tlb_set_page() argument to CPUStateAndreas Färber1-1/+1
Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-03-13cputlb: Change tlb_flush() argument to CPUStateAndreas Färber2-2/+2
Signed-off-by: Andreas Färber <afaerber@suse.de>
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