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path: root/target-alpha/cpu.h
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2011-07-20Fix unassigned memory access handlingBlue Swirl1-2/+3
cea5f9a28faa528b6b1b117c9ab2d8828f473fef exposed bugs in unassigned memory access handling. Fix them by always passing CPUState to the handlers. Reported-by: Hervé Poussineau <hpoussin@reactos.org> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-07-12target-alpha, target-ppc: Remove unnecessary setjmp.h includePeter Maydell1-2/+0
Remove the include of setjmp.h from the cpu.h of target-alpha and target-ppc. This is unnecessary because cpu-defs.h already includes this header; this change brings these two targets into line with all the rest. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-06-26Move cpu_has_work and cpu_pc_from_tb to cpu.hBlue Swirl1-0/+22
Move functions cpu_has_work() and cpu_pc_from_tb() from exec.h to cpu.h. This is needed by later patches. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-05-31target-alpha: Trap for unassigned and unaligned addresses.Richard Henderson1-1/+5
Signed-off-by: Richard Henderson <rth@twiddle.net>
2011-05-31target-alpha: Implement cpu_alpha_handle_mmu_fault for system mode.Richard Henderson1-0/+13
Reads the page table how PALcode would, except that the virtual page table base register is not used. Signed-off-by: Richard Henderson <rth@twiddle.net>
2011-05-31target-alpha: Disable interrupts properly.Richard Henderson1-0/+5
Interrupts are disabled in PALmode, and when the PS IL is high enough. Signed-off-by: Richard Henderson <rth@twiddle.net>
2011-05-31target-alpha: All ISA checks to use TB->FLAGS.Richard Henderson1-2/+30
We had two different methods in use, both of which referenced ENV, and neither of which indicated to the generic code when different compilation modes are not compatible. Signed-off-by: Richard Henderson <rth@twiddle.net>
2011-05-31target-alpha: Swap shadow registers moving to/from PALmode.Richard Henderson1-0/+1
Signed-off-by: Richard Henderson <rth@twiddle.net>
2011-05-31target-alpha: Add IPRs to be used by the emulation PALcode.Richard Henderson1-0/+15
These aren't actually used yet, but we can at least access them via the HW_MFPR and HW_MTPR instructions. Signed-off-by: Richard Henderson <rth@twiddle.net>
2011-05-31target-alpha: Use kernel mmu_idx for pal_mode.Richard Henderson1-1/+7
Signed-off-by: Richard Henderson <rth@twiddle.net>
2011-05-31target-alpha: Add various symbolic constants.Richard Henderson1-13/+43
The EXC_M_* constants were being set for the EV6, not as set for the Unix kernel entry point. Use PS_USER_MODE instead of hard-coding access to the PS register. Signed-off-by: Richard Henderson <rth@twiddle.net>
2011-05-31target-alpha: Tidy exception constants.Richard Henderson1-20/+14
There's no need to attempt to match EXCP_* values with PALcode entry point offsets. Instead, compress all the values to make for more efficient switch statements within QEMU. We will be doing TLB fill within QEMU proper, not within the PALcode, so all of the ITB/DTB miss, double fault, and access exceptions can be compressed to EXCP_MMFAULT. Compress all of the EXCP_CALL_PAL exceptions into one. Use env->error_code to store the specific entry point. Signed-off-by: Richard Henderson <rth@twiddle.net>
2011-05-31target-alpha: Rationalize internal processor registers.Richard Henderson1-134/+11
Delete all the code that tried to emulate the real IPRs of some unnamed CPU. Replace those with just 3 slots that we can use to communicate trap information between the helper functions that signal exceptions and the OS trap handler. Signed-off-by: Richard Henderson <rth@twiddle.net>
2011-05-31target-alpha: Cleanup MMU modes.Richard Henderson1-9/+28
Don't bother including executive and supervisor modes. Signed-off-by: Richard Henderson <rth@twiddle.net>
2011-05-31target-alpha: Remove partial support for palcode emulation.Richard Henderson1-35/+0
This code does not work, and will be replaced by a bios image. Signed-off-by: Richard Henderson <rth@twiddle.net>
2010-07-03remove exec-all.h inclusion from cpu.hPaolo Bonzini1-1/+0
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-07-03move cpu_pc_from_tb to target-*/exec.hPaolo Bonzini1-5/+0
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-04-27target-alpha: Implement RPCC.Richard Henderson1-1/+0
A minimal implementation that more or less corresponds to the user-level version used by target-i386. More hoops will want to be jumped through when alpha gets system-level emulation. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-27target-alpha: Fix load-locked/store-conditional.Richard Henderson1-1/+5
Use an exception plus start_exclusive to implement the compare-and-swap. This follows the example set by the MIPS and PPC ports. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-27target-alpha: Enable NPTL.Richard Henderson1-11/+18
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-03-12Move TARGET_PHYS_ADDR_SPACE_BITS to target-*/cpu.h.Richard Henderson1-1/+3
Removes a set of ifdefs from exec.c. Introduce TARGET_VIRT_ADDR_SPACE_BITS for all targets other than Alpha. This will be used for page_find_alloc, which is supposed to be using virtual addresses in the first place. Signed-off-by: Richard Henderson <rth@twiddle.net>
2010-02-28alpha-linux-user: Implement signals.Richard Henderson1-3/+1
Move userland PALcode handling into linux-user main loop so that we can send signals from there. This also makes alpha_palcode.c system-level only, so don't build it for userland. Add defines for GENTRAP PALcall mapping to signals. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-02-23target-alpha: Clean up arithmetic traps.Richard Henderson1-3/+7
Replace the EXCP_ARITH_OVERFLOW placeholder with the complete set of bits from the EXC_SUM IPR. Use them in the existing places where we raise arithmetic exceptions. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-02-23target-alpha: Reduce internal processor registers for user-mode.Richard Henderson1-0/+6
The existing set of IPRs is totally irrelevant to user-mode emulation. Indeed, they most are irrelevant to implementing kernel-mode emulation, and would only be relevant to PAL-mode emulation, which I suspect that no one will ever attempt. Reducing the set of processor registers reduces the size of the CPU state. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-02-23target-alpha: Split up FPCR value into separate fields.Richard Henderson1-5/+19
The fpcr_exc_status, fpcr_exc_mask, and fpcr_dyn_round fields are stored in <softfloat.h> format for convenience during regular execution. Revert the addition of float_exception_mask to float_status, added in ba0e276db4b51bd2255a5d5ff8902c70d32ade40. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-12-13target-alpha: Fixes for alpha-linux syscalls.Richard Henderson1-0/+49
1. Add correct definitions of error numbers. 2. Implement SYS_osf_sigprocmask 3. Implement SYS_osf_get/setsysinfo for IEEE_FP_CONTROL. This last requires exposing the FPCR value to do_syscall. Since this value is actually split up into the float_status, expose routines from helper.c to access it. Finally, also add a float_exception_mask field to float_status. We don't actually use it to control delivery of exceptions to the emulator yet, but simply hold the value that we placed there when loading/storing the FPCR. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-10-01Revert "Get rid of _t suffix"Anthony Liguori1-3/+3
In the very least, a change like this requires discussion on the list. The naming convention is goofy and it causes a massive merge problem. Something like this _must_ be presented on the list first so people can provide input and cope with it. This reverts commit 99a0949b720a0936da2052cb9a46db04ffc6db29. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-10-01Get rid of _t suffixmalc1-3/+3
Some not so obvious bits, slirp and Xen were left alone for the time being. Signed-off-by: malc <av1474@comtv.ru>
2009-08-24cleanup cpu-exec.c, part 0/N: consolidate handle_cpu_signalNathan Froyd1-0/+1
handle_cpu_signal is very nearly copy-paste code for each target, with a few minor variations. This patch sets up appropriate defaults for a generic handle_cpu_signal and provides overrides for particular targets that did things differently. Fixing things like the persistent (XXX: use sigsetjmp) should now become somewhat easier. Previous comments on this patch suggest that the "activate soft MMU for this block" comments refer to defunct functionality. I have removed such blocks for the appropriate targets in this patch. Signed-off-by: Nathan Froyd <froydnj@codesourcery.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-16Update to a hopefully more future proof FSF addressBlue Swirl1-2/+1
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-04-07target-alpha: document more registers used by 21264aurel321-2/+2
Signed-off-by: Tristan Gingold <gingold@adacore.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7032 c046a42c-6fe2-441c-8c8c-71466251a162
2009-04-07target-alpha: set target page size to 13 bitsaurel321-1/+1
(As defined by the alpha arch ref). Signed-off-by: Tristan Gingold <gingold@adacore.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7029 c046a42c-6fe2-441c-8c8c-71466251a162
2009-03-29target-alpha: remove PALCODE_ declarations (unused).aurel321-10/+0
Signed-off-by: Tristan Gingold <gingold@adacore.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6929 c046a42c-6fe2-441c-8c8c-71466251a162
2009-03-29Document which IPR are used by 21264aurel321-31/+65
Signed-off-by: Tristan Gingold <gingold@adacore.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6927 c046a42c-6fe2-441c-8c8c-71466251a162
2009-03-07The _exit syscall is used for both thread termination in NPTL applications,pbrook1-1/+2
and process termination in legacy applications. Try to guess which we want based on the presence of multiple threads. Also implement locking when modifying the CPU list. Signed-off-by: Paul Brook <paul@codesourcery.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6735 c046a42c-6fe2-441c-8c8c-71466251a162
2009-01-04Update FSF address in GPL/LGPL boilerplateaurel321-1/+1
The attached patch updates the FSF address in the GPL/LGPL boilerplate in most GPL/LGPLed files, and also in COPYING.LIB. Signed-off-by: Stuart Brady <stuart.brady@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6162 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-11target-alpha: fix 2 warningsaurel321-0/+4
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5992 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-30Common cpu_loop_exit prototypeaurel321-1/+0
All archs use the same cpu_loop_exit, so move the prototype in a common header. i386 was carrying a __hidden attribute, but that was empty for this arch anyway. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5820 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-18Refactor translation block CPU state handling (Jan Kiszka)aliguori1-0/+8
This patch refactors the way the CPU state is handled that is associated with a TB. The basic motivation is to move more arch specific code out of generic files. Specifically the long #ifdef clutter in tb_find_fast() has to be overcome in order to avoid duplicating it for the gdb watchpoint fixes (patch "Restore pc on watchpoint hits"). Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5736 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-18Convert CPU_PC_FROM_TB to static inline (Jan Kiszka)aliguori1-1/+5
as macros should be avoided when possible. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5735 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-29target-alpha: convert FP ops to TCGaurel321-2/+0
- Convert FP ops to TCG - Fix S format - Implement F and G formats (untested) - Fix MF_FPCR an MT_FPCR - Fix FTOIS, FTOIT, ITOFF, ITOFS, ITOFT - Fix CPYSN, CPYSE Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5354 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-18target-alpha: convert remaining arith3 functions to TCGaurel321-1/+1
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5254 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-18target-alpha: switch a few helpers to TCGaurel321-0/+1
Switch a few helpers to TCG and implement RC and RS instructions Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5247 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-02Fix call_pal() prototype for alpha system emulationaurel321-0/+4
(Hervé Poussineau) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5131 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-01Move interrupt_request and user_mode_only to common cpu state.pbrook1-2/+0
Save and restore env->interrupt_request and env->halted. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4817 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-29Add instruction counter.pbrook1-0/+2
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4799 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-30Fix typo.pbrook1-1/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4624 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-30Move clone() register setup to target specific code. Handle fork-like clone.pbrook1-0/+9
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4623 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-29Push common interrupt variables to cpu-defs.h (Glauber Costa)bellard1-2/+0
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4612 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-28moved halted field to CPU_COMMONbellard1-1/+0
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4609 c046a42c-6fe2-441c-8c8c-71466251a162
generated by cgit v1.1 at 2024-12-29 02:55:16 +0000