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Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <20200826130622.553318-2-marcandre.lureau@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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'remotes/hdeller/tags/target-hppa-v3-pull-request' into staging
artist out of bounds fixes
# gpg: Signature made Wed 26 Aug 2020 22:09:55 BST
# gpg: using EDDSA key BCE9123E1AD29F07C049BBDEF712B510A23A0F5F
# gpg: Good signature from "Helge Deller <deller@gmx.de>" [unknown]
# gpg: aka "Helge Deller <deller@kernel.org>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 4544 8228 2CD9 10DB EF3D 25F8 3E5F 3D04 A7A2 4603
# Subkey fingerprint: BCE9 123E 1AD2 9F07 C049 BBDE F712 B510 A23A 0F5F
* remotes/hdeller/tags/target-hppa-v3-pull-request:
hw/display/artist: Fix invalidation of lines near screen border
hw/display/artist: Fix invalidation of lines in artist_draw_line()
hw/display/artist: Unbreak size mismatch memory accesses
hw/display/artist: Prevent out of VRAM buffer accesses
Revert "hw/display/artist: Avoid drawing line when nothing to display"
hw/display/artist: Refactor artist_rop8() to avoid buffer over-run
hw/display/artist: Check offset in draw_line to avoid buffer over-run
hw/hppa/lasi: Don't abort on invalid IMR value
hw/display/artist.c: fix out of bounds check
hw/hppa: Implement proper SeaBIOS version check
seabios-hppa: Update to SeaBIOS hppa version 1
hw/hppa: Sync hppa_hardware.h file with SeaBIOS sources
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Add a device-tree source for petalogix-s3adsp1800 and
recompile the DTB.
This also removes the unused mpmc node which causes
compilation warnings.
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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Add a device-tree source for petalogix-ml605 and recompile
the DTB.
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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'remotes/alistair/tags/pull-riscv-to-apply-20200821-1' into staging
The first RISC-V PR for the 5.2 window.
This includes:
- NaNBox fixes
- Vector extension improvements
- a L2 cache controller
- PMP fixes
- Upgrade to OpenSBI v0.8 and the generic platform
- Fixes for the Ibex PLIC
# gpg: Signature made Sat 22 Aug 2020 06:38:18 BST
# gpg: using RSA key F6C4AC46D4934868D3B8CE8F21E10D29DF977054
# gpg: Good signature from "Alistair Francis <alistair@alistair23.me>" [full]
# Primary key fingerprint: F6C4 AC46 D493 4868 D3B8 CE8F 21E1 0D29 DF97 7054
* remotes/alistair/tags/pull-riscv-to-apply-20200821-1:
hw/intc: ibex_plic: Honour source priorities
hw/intc: ibex_plic: Don't allow repeat interrupts on claimed lines
hw/intc: ibex_plic: Update the pending irqs
target/riscv: Change the TLB page size depends on PMP entries.
target/riscv: Fix the translation of physical address
gitlab-ci/opensbi: Update GitLab CI to build generic platform
hw/riscv: spike: Change the default bios to use generic platform image
hw/riscv: Use pre-built bios image of generic platform for virt & sifive_u
roms/Makefile: Build the generic platform for RISC-V OpenSBI firmware
roms/opensbi: Upgrade from v0.7 to v0.8
configure: Create symbolic links for pc-bios/*.elf files
riscv: Fix bug in setting pmpcfg CSR for RISCV64
hw/riscv: sifive_u: Add a dummy L2 cache controller device
target/riscv: check before allocating TCG temps
target/riscv: Clean up fmv.w.x
target/riscv: Check nanboxed inputs in trans_rvf.inc.c
target/riscv: Check nanboxed inputs to fp helpers
target/riscv: Generate nanboxed results from trans_rvf.inc.c
target/riscv: Generalize gen_nanbox_fpr to gen_nanbox_s
target/riscv: Generate nanboxed results from fp helpers
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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staging
meson fixes:
* --disable-tools --enable-system build
* s390 no-TCG build
* fdmon-io_uring
* 'shift' error message in version_ge()
# gpg: Signature made Fri 21 Aug 2020 22:12:29 BST
# gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83
# gpg: issuer "pbonzini@redhat.com"
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full]
# gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full]
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1
# Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83
* remotes/bonzini-gitlab/tags/for-upstream:
keymaps: update
meson: Fix --disable-tools --enable-system builds
meson: convert pc-bios/keymaps/Makefile
configure: silence 'shift' error message in version_ge()
util/meson.build: fix fdmon-io_uring build
target/s390x: fix meson.build issue
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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To keep sync with other RISC-V machines, change the default bios to
use generic platform fw_dynamic.elf image.
While we are here, add some comments to mention that using ELF files
for the Spike machine was intentional.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <1596439832-29238-6-git-send-email-bmeng.cn@gmail.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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Update virt and sifive_u machines to use the opensbi fw_dynamic bios
image built for the generic FDT platform.
Remove the out-of-date no longer used bios images.
Note:
1. To test 32-bit Linux kernel on QEMU 'sifive_u' 32-bit machine,
the following patch is needed:
http://lists.infradead.org/pipermail/linux-riscv/2020-July/001213.html
2. To test 64-bit Linux 5.3 kernel on QEMU 'virt' or 'sifive_u' 64-bit
machines, the following commit should be cherry-picked to 5.3:
commit 922b0375fc93fb1a20c5617e37c389c26bbccb70
Author: Albert Ou <aou@eecs.berkeley.edu>
Date: Fri Sep 27 16:14:18 2019 -0700
riscv: Fix memblock reservation for device tree blob
Linux 5.4 or above already contains this commit/fix.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <1596439832-29238-5-git-send-email-bmeng.cn@gmail.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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'remotes/kraxel/tags/seabios-20200819-pull-request' into staging
seabios: update to 1.14-final
# gpg: Signature made Wed 19 Aug 2020 07:36:36 BST
# gpg: using RSA key 4CB6D8EED3E87138
# gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" [full]
# gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" [full]
# gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" [full]
# Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138
* remotes/kraxel/tags/seabios-20200819-pull-request:
seabios: update to 1.14-final
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Looks like update-keymaps has not been run in a while.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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Note that sl and sv keymaps were not created by qemu-keymap.
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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Make it independent from the rules.mak, and clean up to use pattern rules.
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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Due to 1.14 release being delayed it missed qemu 5.1.
The last snapshot has all code changes though, so this
changes only the version string in the binaries.
shortlog
========
Kevin O'Connor (1):
docs: Note v1.14.0 release
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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Changes include:
* gcc-10 compile fix
* NetBSD boot fix due to wrong power button address
* Fix endian bug in romfile_loadint()
* Introduce SeaBIOS firmware version check
* Implement QEMU fw_cfg interface support
Required for proper version checking and gcc-10 update on Debian.
Signed-off-by: Helge Deller <deller@gmx.de>
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seabios master branch got a few bugfixes, so update
to a newer snapshot to pick them up for 5.1-rc3.
shortlog
========
Kevin O'Connor (2):
vgabios: Fix preserve memory flag in handle_1000
ldnoexec: Add script to remove ET_EXEC flag from intermediate build objects
Paul Menzel (1):
nvme: Increase `nvme_cmd_readwrite()` message log level from 3 to 5
Stefan Reiter (1):
virtio-scsi: fix boot prio detection by using correct lun
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Cc: qemu-stable@nongnu.org
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This adds tcgbios (this was posted earlier [1] but got lost)
and fixes FDT update at ibm,client-architecture-support
for huge guests.
The full list of changes:
Alexey Kardashevskiy (4):
make: Define default rule for .c when V=1 or V=2
version: update to 20200513
fdt: Avoid recursion when traversing tree
version: update to 20200717
Gustavo Romero (1):
board-qemu: Fix comment about SLOF start address
Stefan Berger (6):
tcgbios: Only write logs for PCRs that are allocated
tcgbios: Fix the vendorInfoSize to be of type uint8_t
tcgbios: Add support for SHA3 type of algorithms
elf: Implement elf_get_file_size to determine size of an ELF image
tcgbios: Implement tpm_hash_log_extend_event_buffer
tcgbios: Measure the bootloader file read from disk
[1] https://patchwork.ozlabs.org/project/qemu-devel/patch/20200513024355.121476-1-aik@ozlabs.ru/
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
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s390 update:
- various fixes
- cleanup in the s390x-ccw bios
# gpg: Signature made Fri 03 Jul 2020 11:04:08 BST
# gpg: using RSA key C3D0D66DC3624FF6A8C018CEDECF6B93C6F02FAF
# gpg: issuer "cohuck@redhat.com"
# gpg: Good signature from "Cornelia Huck <conny@cornelia-huck.de>" [marginal]
# gpg: aka "Cornelia Huck <huckc@linux.vnet.ibm.com>" [full]
# gpg: aka "Cornelia Huck <cornelia.huck@de.ibm.com>" [full]
# gpg: aka "Cornelia Huck <cohuck@kernel.org>" [marginal]
# gpg: aka "Cornelia Huck <cohuck@redhat.com>" [marginal]
# Primary key fingerprint: C3D0 D66D C362 4FF6 A8C0 18CE DECF 6B93 C6F0 2FAF
* remotes/cohuck/tags/s390x-20200703:
s390x/pci: fix set_ind_atomic
virtio-ccw: fix virtio_set_ind_atomic
target/s390x: Fix SQXBR
pc-bios/s390: Update s390-ccw bios binaries with the latest changes
pc-bios/s390-ccw: Generate and include dependency files in the Makefile
pc-bios: s390x: Make u32 ptr check explicit
pc-bios: s390x: Use ebcdic2ascii table
pc-bios: s390x: Move panic() into header and add infinite loop
pc-bios: s390x: Use PSW masks where possible and introduce PSW_MASK_SHORT_ADDR
pc-bios: s390x: Rename PSW_MASK_ZMODE to PSW_MASK_64
pc-bios: s390x: Get rid of magic offsets into the lowcore
pc-bios: s390x: Move sleep and yield to helper.h
pc-bios: s390x: Consolidate timing functions into time.h
pc-bios: s390x: cio.c cleanup and compile fix
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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... to make sure that the binaries match the current state of the
sources.
Signed-off-by: Thomas Huth <thuth@redhat.com>
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The Makefile of the s390-ccw bios does not handle dependencies of the
*.c files from the headers yet, so that you often have to run a "make
clean" to get the build right when one of the headers has been changed.
Let's make sure that we generate and include dependency files for all
*.c files now to avoid this problem in the future.
Acked-by: Cornelia Huck <cohuck@redhat.com>
Message-Id: <20200630142955.7662-1-thuth@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
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Let's make it a bit more clear that we check the full 64 bits to fit
into the 32 we return.
Signed-off-by: Janosch Frank <frankja@linux.ibm.com>
Suggested-by: David Hildenbrand <david@redhat.com>
Reviewed-by: David Hildenbrand <david@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20200624075226.92728-11-frankja@linux.ibm.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
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Why should we do conversion of a ebcdic value if we have a handy table
where we could look up the ascii value instead?
Signed-off-by: Janosch Frank <frankja@linux.ibm.com>
Reviewed-by: David Hildenbrand <david@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20200624075226.92728-10-frankja@linux.ibm.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
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panic() was defined for the ccw and net bios, i.e. twice, so it's
cleaner to rather put it into the header.
Also let's add an infinite loop into the assembly of disabled_wait() so
the caller doesn't need to take care of it.
Signed-off-by: Janosch Frank <frankja@linux.ibm.com>
Reviewed-by: Pierre Morel <pmorel@linux.ibm.com>
Reviewed-by: David Hildenbrand <david@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20200624075226.92728-9-frankja@linux.ibm.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
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Let's move some of the PSW mask defines into s390-arch.h and use them
in jump2ipl.c. Also let's introduce a new constant for the address
mask of 8 byte (short) PSWs.
Signed-off-by: Janosch Frank <frankja@linux.ibm.com>
Reviewed-by: David Hildenbrand <david@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20200624075226.92728-8-frankja@linux.ibm.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
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This constant enables 64 bit addressing, not the ESAME architecture,
so it shouldn't be named ZMODE.
Signed-off-by: Janosch Frank <frankja@linux.ibm.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20200624075226.92728-7-frankja@linux.ibm.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
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If we have a lowcore struct that has members for offsets that we want
to touch, why not use it?
Signed-off-by: Janosch Frank <frankja@linux.ibm.com>
Reviewed-by: David Hildenbrand <david@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Cornelia Huck <cohuck@redhat.com>
Message-Id: <20200624075226.92728-5-frankja@linux.ibm.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
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They are definitely helper functions.
Signed-off-by: Janosch Frank <frankja@linux.ibm.com>
Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: David Hildenbrand <david@redhat.com>
Message-Id: <20200624075226.92728-4-frankja@linux.ibm.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
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Let's consolidate timing related functions into one header.
Signed-off-by: Janosch Frank <frankja@linux.ibm.com>
Acked-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: David Hildenbrand <david@redhat.com>
Message-Id: <20200624075226.92728-3-frankja@linux.ibm.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
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Let's initialize the structs at the beginning to ease reading and also
zeroing all other fields. This also makes the compiler stop
complaining about sense_id_ccw.flags being ored into when it's not
initialized.
Signed-off-by: Janosch Frank <frankja@linux.ibm.com>
Reviewed-by: Pierre Morel <pmorel@linux.ibm.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: David Hildenbrand <david@redhat.com>
Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com>
Reviewed-by: Cornelia Huck <cohuck@redhat.com>
Message-Id: <20200624075226.92728-2-frankja@linux.ibm.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
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Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
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Upgrade OpenSBI from v0.6 to v0.7 and the pre-built bios images.
The v0.7 release includes the following commits:
f64f4b9 lib: Add a new platform feature to bringup secondary harts
b677a9b lib: Implement hart hotplug
5b48240 lib: Add possible hart status values
e3f69fc lib: Implement Hart State Management (HSM) SBI extension
6704216 lib: Check MSIP bit after returning from WFI
82ae8e8 makefile: Do setup of the install target more flexible
e1a5b73 platform: sifive: fu540: allow sv32 as an mmu-type
8c83fb2 lib: Fix return type of sbi_hsm_hart_started()
00d332b include: Move bits related defines and macros to sbi_bitops.h
a148996 include: sbi_bitops: More useful bit operations
4a603eb platform: kendryte/k210: Set per-HART stack size to 8KB
678c3c3 include: sbi_scratch: Set per-HART scratch size to 4KB
2abc55b lib: Sort build objects in alphabetical order
6e87507 platform: ae350: Sort build objects in alphabetical order
650c0e5 lib: sbi: Fix coding style issues
078686d lib: serial: Fix coding style issues
3226bd9 lib: Simple bitmap library
c741abc include: Simple hartmask library
d6d7e18 lib: sbi_init: Don't allow HARTID greater than SBI_HARTMASK_MAX_BITS
a4a6a81 lib: Introduce SBI_TLB_INFO_INIT() helper macro
d963164 lib: sbi_tlb: Use sbi_hartmask in sbi_tlb_info
71d2b83 lib: Move all coldboot wait APIs to sbi_init.c
2b945fc lib: sbi_init: Use hartmask for coldboot wait
44ce5b9 include: Remove disabled_hart_mask from sbi_platform
2db381f lib: Introduce sbi_hsm_hart_started_mask() API
61f7768 lib: sbi_ecall_legacy: Use sbi_hsm_hart_started_mask() API
466fecb lib: sbi_system: Use sbi_hsm_hart_started_mask() API
9aad831 lib: sbi_ipi: Use sbi_hsm_hart_started_mask() API
eede1aa lib: sbi_hart: Remove HART available mask and related APIs
757bb44 docs: Remove out-of-date documentation
86d37bb lib: sbi: Fix misaligned trap handling
ffdc858 platform: ariane-fpga: Change license for ariane-fpga from GPL-2.0 to BSD-2
4b2f594 sbi: Add definitions for true/false
0cfe49a libfdt: Add INT32_MAX and UINT32_MAX in libfdt_env.h
baac7e0 libfdt: Upgrade to v1.5.1 release
f92147c include: Make sbi_hart_id_to_scratch() as macro
eeae3d9 firmware: fw_base: Optimize _hartid_to_scratch() implementation
16e7071 lib: sbi_hsm: Optimize sbi_hsm_hart_get_state() implementation
823345e include: Make sbi_current_hartid() as macro in riscv_asm.h
9aabba2 Makefile: Fix distclean make target
9275ed3 platform: ariane-fpga: Set per-HART stack size to 8KB
2343efd platform: Set per-HART stack size to 8KB in the template platform codes
72a0628 platform: Use one unified per-HART stack size macro for all platforms
327ba36 scripts: Cover sifive/fu540 in the 32-bit build
5fbcd62 lib: sbi: Update pmp_get() to return decoded size directly
dce8846 libfdt: Compile fdt_addresses.c
fcb1ded lib: utils: Add a fdt_reserved_memory_fixup() helper
666be6d platform: Clean up include header files
6af5576 lib: utils: Move PLIC DT fix up codes to fdt_helper.c
e846ce1 platform: andes/ae350: Fix up DT for reserved memory
8135520 platform: ariane-fpga: Fix up DT for reserved memory
c9a5268 platform: qemu/virt: Fix up DT for reserved memory
6f9bb83 platform: sifive/fu540: Fix up DT for reserved memory
1071f05 platform: sifive/fu540: Remove "stdout-path" fix-up
dd9439f lib: utils: Add a fdt_cpu_fixup() helper
3f1c847 platform: sifive/fu540: Replace cpu0 node fix-up with the new helper
db6a2b5 lib: utils: Add a general device tree fix-up helper
3f8d754 platform: Update to call general DT fix-up helper
87a7ef7 lib: sbi_scratch: Introduce HART id to scratch table
e23d3ba include: Simplify HART id to scratch macro
19bd531 lib: sbi_hsm: Simplify hart_get_state() and hart_started() APIs
3ebfe0e lib: sbi_tlb: Simplify sbi_tlb_entry_process() function
209134d lib: Handle failure of sbi_hartid_to_scratch() API
bd6ef02 include: sbi_platform: Improve sbi_platform_hart_disabled() API
c9f60fc lib: sbi_scratch: Don't set hartid_to_scratch table for disabled HART
680b098 lib: sbi_hsm: Don't use sbi_platform_hart_count() API
db187d6 lib: sbi_hsm: Remove scratch parameter from hart_started_mask() API
814f38d lib: sbi_hsm: Don't use sbi_platform_hart_disabled() API
75eec9d lib: Don't use sbi_platform_hart_count() API
c51f02c include: sbi_platform: Introduce HART index to HART id table
315a877 platform: sifive/fu540: Remove FU540_ENABLED_HART_MASK option
a0c88dd lib: Fix sbi_ecall_register_extension to prevent extension IDs overlap
9a74a64 lib: Check MSIP bit after returning from WFI
5968894 platform: Move ariane standalone fpga project to its own project
ed265b4 platform: fpga/ariane: Remove redundant plic address macros
fb84879 platform: Add OpenPiton platform support
d1d6560 platform: fpga/common: Add a fdt parsing helper functions
040e4e2 lib: utils: Move fdt fixup helper routines to a different file
4c37451 platform: openpiton: Read the device configurations from device tree
4d93586 lib: prevent coldboot_lottery from overflowing
550ba88 scripts: Extend create-binary-archive.sh for unified binary tar ball
160c885 lib: utils: Improve fdt_cpu_fixup() implementation
1de66d1 lib: Optimize unpriv load/store implementation
626467c lib: Remove scratch parameter from unpriv load/store functions
cb78a48 lib: sbi_trap: Remove scratch parameter from sbi_trap_redirect()
d11c79c lib: sbi_emulate_csr: Remove scratch and hartid parameter
5a7bd0c lib: sbi_illegal_insn: Remove mcause, scratch and hartid parameters
fe37d7d lib: sbi_misaligned_ldst: Remove mcause, scratch and hartid parameters
7487116 lib: sbi_ecall: Remove mcause, scratch and hartid parameters
40b221b lib: sbi_trap: Simplify sbi_trap_handler() API
7b211ff include: sbi_platform: Remove priv parameter from hart_start() callback
5b6957e include: Use more consistent name for atomic xchg() and cmpxchg()
dd0f21c lib: sbi_scratch: Introduce sbi_scratch_last_hartid() API
54b2779 include: sbi_tlb: Remove scratch parameter from sbi_tlb_request()
9e52a45 include: sbi_ipi: Remove scratch parameter from most functions
ec0d80f include: sbi_system: Remove scratch parameter and redundant functions
0a28ea5 include: sbi_timer: Remove scratch parameter from most funcitons
648507a include: sbi_console: Remove scratch parameter from sbi_dprintf()
e5a7f55 platform: thead/c910: Use HSM extension to boot secondary cores
f281de8 lib: irqchip/plic: Fix maximum priority threshold value
6c7922e lib: Support vector extension
615587c docs: Update README about supported SBI versions
66d0184 lib: Allow overriding SBI implementation ID
9f1b72c include: Bump-up version to 0.7
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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This is a single regression fix for for 5.0:
Greg Kurz (1):
slof: Only close stdout for virtio-serial devices
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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into staging
ppc patch queue 2020-03-17
Here's my final pull request for the qemu-5.0 soft freeze. Sorry this
is just under the wire - I hit some last minute problems that took a
while to fix up and retest.
Highlights are:
* Numerous fixes for the FWNMI feature
* A handful of cleanups to the device tree construction code
* Numerous fixes for the spapr-vscsi device
* A number of fixes and cleanups for real mode (MMU off) softmmu
handling
* Fixes for handling of the PAPR RMA
* Better handling of hotplug/unplug events during boot
* Assorted other fixes
# gpg: Signature made Tue 17 Mar 2020 09:55:07 GMT
# gpg: using RSA key 75F46586AE61A66CC44E87DC6C38CACA20D9B392
# gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" [full]
# gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>" [full]
# gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>" [full]
# gpg: aka "David Gibson (kernel.org) <dwg@kernel.org>" [unknown]
# Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392
* remotes/dgibson/tags/ppc-for-5.0-20200317: (45 commits)
pseries: Update SLOF firmware image
ppc/spapr: Ignore common "ibm,nmi-interlock" Linux bug
ppc/spapr: Implement FWNMI System Reset delivery
target/ppc: allow ppc_cpu_do_system_reset to take an alternate vector
ppc/spapr: Allow FWNMI on TCG
ppc/spapr: Fix FWNMI machine check interrupt delivery
ppc/spapr: Add FWNMI System Reset state
ppc/spapr: Change FWNMI names
ppc/spapr: Fix FWNMI machine check failure handling
spapr: Rename DT functions to newer naming convention
spapr: Move creation of ibm,architecture-vec-5 property
spapr: Move creation of ibm,dynamic-reconfiguration-memory dt node
spapr/rtas: Reserve space for RTAS blob and log
pseries: Update SLOF firmware image
ppc/spapr: Move GPRs setup to one place
target/ppc: Fix rlwinm on ppc64
spapr/xive: use SPAPR_IRQ_IPI to define IPI ranges exposed to the guest
hw/scsi/spapr_vscsi: Convert debug fprintf() to trace event
hw/scsi/spapr_vscsi: Prevent buffer overflow
hw/scsi/spapr_vscsi: Do not mix SRP IU size with DMA buffer size
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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* Bugfixes all over the place
* get/set_uint cleanups (Felipe)
* Lock guard support (Stefan)
* MemoryRegion ownership cleanup (Philippe)
* AVX512 optimization for buffer_is_zero (Robert)
# gpg: Signature made Tue 17 Mar 2020 15:01:54 GMT
# gpg: using RSA key BFFBD25F78C7AE83
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full]
# gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full]
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1
# Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83
* remotes/bonzini/tags/for-upstream: (62 commits)
hw/arm: Let devices own the MemoryRegion they create
hw/arm: Remove unnecessary memory_region_set_readonly() on ROM alias
hw/ppc/ppc405: Use memory_region_init_rom() with read-only regions
hw/arm/stm32: Use memory_region_init_rom() with read-only regions
hw/char: Let devices own the MemoryRegion they create
hw/riscv: Let devices own the MemoryRegion they create
hw/dma: Let devices own the MemoryRegion they create
hw/display: Let devices own the MemoryRegion they create
hw/core: Let devices own the MemoryRegion they create
scripts/cocci: Patch to let devices own their MemoryRegions
scripts/cocci: Patch to remove unnecessary memory_region_set_readonly()
scripts/cocci: Patch to detect potential use of memory_region_init_rom
hw/sparc: Use memory_region_init_rom() with read-only regions
hw/sh4: Use memory_region_init_rom() with read-only regions
hw/riscv: Use memory_region_init_rom() with read-only regions
hw/ppc: Use memory_region_init_rom() with read-only regions
hw/pci-host: Use memory_region_init_rom() with read-only regions
hw/net: Use memory_region_init_rom() with read-only regions
hw/m68k: Use memory_region_init_rom() with read-only regions
hw/display: Use memory_region_init_rom() with read-only regions
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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The only change here is moving the decision about rtas-size
to QEMU.
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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This mainly fixes virtio-serial with and without
enabled iommu-platform.
The full list of changes is:
Alexey Kardashevskiy (3):
llfw: Fix debug printf warnings
virtio-serial: Close device completely
version: update to 20200312
Cédric Le Goater (1):
virtio: Fix typo in virtio_serial_init()
Greg Kurz (2):
virtio-serial: Don't override some words
virtio-serial: Rework shutdown sequence
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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Although the real world SiFive HiFive Unleashed board is a 64-bit
hardware configuration, with QEMU it is possible to test 32-bit
configuration with the same hardware features.
This updates the roms Makefile to add the build rules for creating
the 32-bit OpenSBI firmware image for sifive_u machine. A pre-built
OpenSBI v0.6 image has been added as the default bios for 32-bit
sifive_u machine.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
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Upgrade OpenSBI from v0.5 to v0.6 and the pre-built bios images.
The v0.6 release includes the following commits:
dd8ef28 firmware: Fix compile error for FW_PAYLOAD with latest GCC binutils
98f4a20 firmware: Introduce relocation lottery
f728a0b include: Sync-up encoding with priv v1.12-draft and hypervisor v0.5-draft
18897aa include: Use _UL() and _ULL() for defines in riscv_encoding.h
7a13beb firmware: Add preferred boot HART field in struct fw_dynamic_info
215421c lib: Remove date and time from init message
838657c include: Remove ilen member of struct unpriv_trap
b1d8c98 lib: No need to set VSSTATUS.MXR bit in get_insn()
0e1322b lib: Better naming of unpriv APIs for wider use
75f903d lib: Simplify trap parameters in sbi_ecall functions
c96cc03 lib: Fix CPU capabilities detection function
ab14f94 lib: Fix probe extension
813f7f4 lib: Add error detection for misa_extension
dc40042 include: sbi_platform: fix compilation for GCC-9
bd732ae include: Add guest external interrupt related defines
6590a7d lib: Delegate guest page faults to HS-mode
4370f18 include: Extend struct sbi_trap_info for mtval2 and mtinst
086dbdf lib: Fix sbi_get_insn() for load guest page fault
2be424b lib: Extend trap redirection for hypervisor v0.5 spec
7219477 lib: Use MTINST CSR in misaligned load/store emulation
b8732fe lib: Add replacement extension and function ids
aa0ed1d lib: Remove redundant IPI types
1092663 lib: Add TIME extension in SBI
9777aee lib: Add IPI extension in SBI
9407202 lib: Add hfence instruction encoding
331ff6a lib: Support stage1 and stage2 tlb flushing
86a31f5 lib: Implement RFENCE extension
c7d1b12 firmware: Return real DTB address when FW_xyz_FDT_ADDR is not defined
9beb573 firmware: Improve comments for fw_prev_arg1() and fw_next_arg1()
fc6bd90 docs: Improve docs for FDT address passing
46a90d9 lib: utils: Support CLINT with 32bit MMIO access on RV64 system
c0849cd platform: Add T-head C910 initial support
e746673 lib: Remove unnecessary checks from init_coldboot() and init_warmboot()
c3e406f lib: Add initial sbi_exit() API
55e191e lib: Add system early_exit and final_exit APIs
6469ed1 lib: Add timer exit API
b325f6b lib: Add ipi exit API
1993182 lib: Add irqchip exit API
2aa43a1 lib: save/restore MIE CSR in sbi_hart_wait_for_coldboot()
b0c9787 lib: do sbi_exit() upon halt IPI
15ed1e7 lib: improve system reboot and shutdown implementation
73c19e6 lib: zero-out memory allocated using sbi_scratch_alloc_offset()
a67fd68 lib: Add sbi_init_count() API
049ad0b build: Use -ffreestanding
e340bbf include: Add OPENSBI_EXTERNAL_SBI_TYPES in sbi_types.h
b28b8ac docs: Add description of using OPENSBI_EXTERNAL_SBI_TYPES
adf8b73 platform: thead/c910: Remove SBI_PLATFORM_HAS_PMP
f95dd39 docs: platform: Update SiFive FU540 doc as-per U-Boot v2020.01
6ffe1be firmware: Fix placement of .align directives
7daccae platform: thead/c910: Don't enable L2 cache in warm boot
a73d45c platform: thead/c910: Don't set plic/clint address in warm boot
30cdf00 scripts: Add C910 to platform list in the binary archive script
0492c5d include: Typo fix in comment for SBI_SCRATCH_SIZE define
046cc16 lib: Move struct sbi_ipi_data definition to sbi_ipi.c
3d2aaac lib: Introduce sbi_ipi_send_smode() API
da9b76b lib: Introduce sbi_ipi_send_halt() API
a8b4b83 lib: Introduce sbi_tlb_fifo_request() API
5f762d1 lib: Introduce sbi_ipi_event_create/destroy() APIs
817d50d lib: Drop _fifo from the name of various sbi_tlb_fifo_xyz() functions
84cd4fc lib: Initialize TLB management directly from coldboot/warmboot path
0a411bf include: Add generic and simple list handling APIs
37923c4 lib: Add dynamic registration of SBI extensions
7668502 lib: Factor-out SBI legacy extension
161b348 lib: Factor-out SBI replacement extensions
43ac621 lib: Factor-out SBI vendor extension
021b9e7 lib: Factor-out SBI base extension
85647a1 platform: template: typo fix in system reboot/shutdown names
ac1c229 platform: Update UART base addresses for qemu/sifve_u
d79173b platform: Add an platform ops to return platform specific tlb flush limit
2c2bbe7 platform: sifive/fu540: Set tlb range flush limit to zero
5ff1ab0 makefile: add support for building on macOS
6d0b4c5 platform: Drop qemu/sifive_u support
9a717ec platform: sifive: fu540: Add platform specific 'make run' cmd
d6fa7f9 doc: sifive: fu540: Update QEMU instruction when using U-Boot as the payload
179edde lib: sbi_scratch: use bitwise ops in sbi_scratch_alloc_offset()
897b8fb lib: Use __builtin_ctzl() in pmp_get()
1a8ca08 lib: Initialize out value in SBI calls
c2bfa2b lib: irqchip/plic: Disable all contexts and IRQs
c2f23cc platform: Add Spike initial support
a062200 platform: Remove stale options from config.mk files
c03c8a1 scripts: Add Spike to platform list of binary archive script
29bb2a6 docs: platform: Add documentation for Spike platform
48b06ad ThirdPartyNotices: Fix doc styles
892e879 doc: coreboot: Fix doc styles
fdfb533 doc: payload_linux: Fix doc styles
44d1296 doc: andes-ae350: Fix doc styles
a8ef0b5 doc: ariane-fpga: Fix doc styles
82fd42f doc: qemu_virt: Fix doc styles
f8ce996 doc: sifive_fu540: Fix doc styles
27a5c7f doc: thead-c910: Fix doc styles
0b41453 Revert "lib: Use __builtin_ctzl() in pmp_get()"
c66543d lib: utils: htif: Fix 32-bit build
bc874e3 lib: Don't check MIDELEG and MEDELEG at end of delegate_traps()
24c3082 lib: Print interrupt and exception delegation in boot prints
66fb729 platform: sifive: fu540: Add 32-bit specific fdt/payload addresses
3e7d666 platform: qemu: virt: Correct the typo in config.mk
c3b3b8f lib: Fix typo in atomic exchange functions
3936243 lib: Use available hart mask for correct hbase value
f8b3bb8 lib: Simplify the for-loop in sbi_ipi_send_many()
ac5e821 include: Bump-up version to 0.6
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
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This adds vTPM support, full-FDT-rebuild-on-CAS fixes and
basic ext4 support.
The full changelog is:
Alexey Kardashevskiy (10):
disk-label: Prepare for extenting
disk-label: Support Linux GPT partition type
ext2: Prepare for extending
ext2: Rename group-desc-size
ext2: Read size of group descriptors
ext2: Read all 64bit of inode number
ext2/4: Add basic extent tree support
elf64: Add LE64 ABIv1/2 support for loading images to given address
fdt: Fix creating new nodes at H_CAS
version: update to 20200221
Greg Kurz (2):
fdt: Fix update of "interrupt-controller" node at CAS
fdt: Delete nodes of devices removed between boot and CAS
Stefan Berger (8):
slof: Implement SLOF_get_keystroke() and SLOF_reset()
slof: Make linker script variables accessible
qemu: Make print_version variable accessible
tpm: Add TPM CRQ driver implementation
tpm: Add sha256 implementation
tcgbios: Add TPM 2.0 support and firmware API
tcgbios: Implement menu to clear TPM 2 and activate its PCR banks
tcgbios: Measure the GPT table
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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Description copied from Linux kernel commit from Gustavo A. R. Silva
(see [3]):
--v-- description start --v--
The current codebase makes use of the zero-length array language
extension to the C90 standard, but the preferred mechanism to
declare variable-length types such as these ones is a flexible
array member [1], introduced in C99:
struct foo {
int stuff;
struct boo array[];
};
By making use of the mechanism above, we will get a compiler
warning in case the flexible array does not occur last in the
structure, which will help us prevent some kind of undefined
behavior bugs from being unadvertenly introduced [2] to the
Linux codebase from now on.
--^-- description end --^--
Do the similar housekeeping in the QEMU codebase (which uses
C99 since commit 7be41675f7cb).
All these instances of code were found with the help of the
following Coccinelle script:
@@
identifier s, m, a;
type t, T;
@@
struct s {
...
t m;
- T a[0];
+ T a[];
};
@@
identifier s, m, a;
type t, T;
@@
struct s {
...
t m;
- T a[0];
+ T a[];
} QEMU_PACKED;
[1] https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html
[2] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=76497732932f
[3] https://git.kernel.org/pub/scm/linux/kernel/git/gustavoars/linux.git/commit/?id=17642a2fbd2c1
Inspired-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
Reviewed-by: David Hildenbrand <david@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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Right now the PVH option rom scans for the RSDP from 0xE0000 to
0xE1FFF. This is probobly a typo, it should scan from 0xE0000 to
0xFFFFF.
This is actually an issue on some QEMU versions/machines. For example,
when I run QEMU the RSDP is placed at 0xf5ad0 which will not be picked
up by the current implementation.
This bug still allows a Linux guest to boot (in most configurations) as
the kernel will just scan for the RSDP if one isn't provided.
Signed-off-by: Joe Richey <joerichey@google.com>
Reviewed-by: Stefano Garzarella <sgarzare@redhat.com>
Fixes: 2785dc7b17 ("optionrom: add new PVH option rom")
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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contains 98df96d4edae ("pc-bios: s390x: Save iplb location in lowcore")
Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
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The POP states that for a list directed IPL the IPLB is stored into
memory by the machine loader and its address is stored at offset 0x14
of the lowcore.
ZIPL currently uses the address in offset 0x14 to access the IPLB and
acquire flags about secure boot. If the IPLB address points into
memory which has an unsupported mix of flags set, ZIPL will panic
instead of booting the OS.
As the lowcore can have quite a high entropy for a guest that did drop
out of protected mode (i.e. rebooted) we encountered the ZIPL panic
quite often.
Signed-off-by: Janosch Frank <frankja@linux.ibm.com>
Tested-by: Marc Hartmayer <mhartmay@linux.ibm.com>
Message-Id: <20200304114231.23493-19-frankja@linux.ibm.com>
Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com>
Reviewed-by: David Hildenbrand <david@redhat.com>
Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
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It's been deprecated since QEMU v3.1. The 40p machine should be
used nowadays instead.
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Acked-by: Hervé Poussineau <hpoussin@reactos.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20200114114617.28854-1-thuth@redhat.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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Helge Deller (13):
Add PDC_MEM_MAP and ENTRY_INIT_SRCH_FRST for OSF/MkLinux
Return non-existant BTLB for PDC_BLOCK_TLB
Add serial, parallel and LAN port support of LASI chip
Implement ENTRY_IO_BBLOCK_IN IODC function
Do not print \r on parisc SeaBIOS
Fix serial ports and add PDC_MODEL functions for special instructions enablement
Implement SeaBIOS returning additional addresses. Fixes HP-UX boot.
Fix mod_pgs (number of pages) for graphic cards
Merge pull request #3 from svenschnelle/sti
Merge pull request #4 from svenschnelle/parisc-qemu-4.1.0
parisc: Implement PDC rendenzvous
parisc: Improve soft power button emulation
parisc: Fix line wrapping in STI console code
Sven Schnelle (7):
parisc: fix PDC info for graphics adapter
parisc: add missing header guard to hppa.h
parisc: add LASI PS/2 emulation.
parisc: Add STI support
parisc: wire up graphics console
parisc: Add support for setting STI screen resolution
parisc: support LASI RTC register
Required for STI and LASI support. Also adds a few Bugfixes.
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Message-Id: <20191220211512.3289-7-svens@stackframe.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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'remotes/kraxel/tags/seabios-20191220-pull-request' into staging
seabios: update to 1.13.0 final
# gpg: Signature made Fri 20 Dec 2019 06:07:53 GMT
# gpg: using RSA key 4CB6D8EED3E87138
# gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" [full]
# gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" [full]
# gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" [full]
# Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138
* remotes/kraxel/tags/seabios-20191220-pull-request:
seabios: update to 1.13.0 final
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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