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2019-08-19target/mips: rationalise softfloat includesAlex Bennée1-0/+1
We should avoid including the whole of softfloat headers in cpu.h and explicitly include it only where we will be calling softfloat functions. We can use the -types.h in cpu.h for the few bits that are global. We also move the restore_snan_bit_mode into internal.h and include -helpers.h there. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2019-08-16Include qemu/queue.h slightly lessMarkus Armbruster4-1/+3
Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20190812052359.30071-20-armbru@redhat.com>
2019-07-26linux-user: Make sigaltstack stacks per-threadPeter Maydell5-18/+28
The alternate signal stack set up by the sigaltstack syscall is supposed to be per-thread. We were incorrectly implementing it as process-wide. This causes problems for guest binaries that rely on this. Notably the Go runtime does, and so we were seeing crashes caused by races where two guest threads might incorrectly both execute on the same stack simultaneously. Replace the global target_sigaltstack_used with a field sigaltstack_used in the TaskState, and make all the references to the old global instead get a pointer to the TaskState and use the field. Fixes: https://bugs.launchpad.net/qemu/+bug/1696773 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Tested-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20190725131645.19501-1-peter.maydell@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-07-19linux-user: fix to handle variably sized SIOCGSTAMP with new kernelsDaniel P. Berrangé4-38/+159
The SIOCGSTAMP symbol was previously defined in the asm-generic/sockios.h header file. QEMU sees that header indirectly via sys/socket.h In linux kernel commit 0768e17073dc527ccd18ed5f96ce85f9985e9115 the asm-generic/sockios.h header no longer defines SIOCGSTAMP. Instead it provides only SIOCGSTAMP_OLD, which only uses a 32-bit time_t on 32-bit architectures. The linux/sockios.h header then defines SIOCGSTAMP using either SIOCGSTAMP_OLD or SIOCGSTAMP_NEW as appropriate. If SIOCGSTAMP_NEW is used, then the tv_sec field is 64-bit even on 32-bit architectures To cope with this we must now convert the old and new type from the target to the host one. Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Message-Id: <20190718130641.15294-1-laurent@vivier.eu> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-07-18linux-user: check valid address in access_ok()Rémi Denis-Courmont1-1/+3
Fix a crash with LTP testsuite and aarch64: tst_test.c:1015: INFO: Timeout per run is 0h 05m 00s qemu-aarch64: .../qemu/accel/tcg/translate-all.c:2522: page_check_range: Assertion `start < ((target_ulong)1 << L1_MAP_ADDR_SPACE_BITS)' failed. qemu:handle_cpu_signal received signal outside vCPU context @ pc=0x60001554 page_check_range() should never be called with address outside the guest address space. This patch adds a guest_addr_valid() check in access_ok() to only call page_check_range() with a valid address. Fixes: f6768aa1b4c6 ("target/arm: fix AArch64 virtual address space size") Signed-off-by: Rémi Denis-Courmont <remi@remlab.net> Signed-off-by: Laurent Vivier <lvivier@redhat.com> Message-Id: <20190704084115.24713-1-lvivier@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-07-16linux-user: Fix structure target_ucontext for MIPSAleksandar Markovic1-3/+2
Structure ucontext for MIPS is defined in the following way in Linux kernel: (arch/mips/include/uapi/asm/ucontext.h, lines 54-64) struct ucontext { /* Historic fields matching asm-generic */ unsigned long uc_flags; struct ucontext *uc_link; stack_t uc_stack; struct sigcontext uc_mcontext; sigset_t uc_sigmask; /* Extended context structures may follow ucontext */ unsigned long long uc_extcontext[0]; }; Fix the structure target_ucontext for MIPS to reflect the definition above, except the correction for field uc_extcontext, which will follow at some later time. Fixes: 94c5495d Reported-by: Dragan Mladjenovic <dmladjenovic@wavecomp.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <1562931470-3700-2-git-send-email-aleksandar.markovic@rt-rk.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-07-04Merge remote-tracking branch ↵Peter Maydell1-1/+14
'remotes/palmer/tags/riscv-for-master-4.1-sf1-v3' into staging RISC-V Patches for the 4.1 Soft Freeze, Part 2 v3 This pull request contains a handful of patches that I'd like to target for the 4.1 soft freeze. There are a handful of new features: * Support for the 1.11.0, the latest privileged specification. * Support for reading and writing the PRCI registers. * Better control over the ISA of the target machine. * Support for the cpu-topology device tree node. Additionally, there are a handful of bug fixes including: * Load reservations are now broken by both store conditional and by scheduling, which fixes issues with parallel applications. * Various fixes to the PMP implementation. * Fixes to the 32-bit linux-user syscall ABI. * Various fixes for instruction decodeing. * A fix to the PCI device tree "bus-range" property. This boots 32-bit and 64-bit OpenEmbedded. Changes since v2 [riscv-for-master-4.1-sf1-v2]: * Dropped OpenSBI. Changes since v1 [riscv-for-master-4.1-sf1]: * Contains a fix to the sifive_u OpenSBI integration. # gpg: Signature made Wed 03 Jul 2019 09:39:09 BST # gpg: using RSA key 00CE76D1834960DFCE886DF8EF4CA1502CCBAB41 # gpg: issuer "palmer@dabbelt.com" # gpg: Good signature from "Palmer Dabbelt <palmer@dabbelt.com>" [unknown] # gpg: aka "Palmer Dabbelt <palmer@sifive.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 00CE 76D1 8349 60DF CE88 6DF8 EF4C A150 2CCB AB41 * remotes/palmer/tags/riscv-for-master-4.1-sf1-v3: (32 commits) hw/riscv: Extend the kernel loading support hw/riscv: Add support for loading a firmware hw/riscv: Split out the boot functions riscv: sifive_u: Update the plic hart config to support multicore riscv: sifive_u: Do not create hard-coded phandles in DT disas/riscv: Fix `rdinstreth` constraint disas/riscv: Disassemble reserved compressed encodings as illegal riscv: virt: Add cpu-topology DT node. RISC-V: Update syscall list for 32-bit support. RISC-V: Clear load reservations on context switch and SC RISC-V: Add support for the Zicsr extension RISC-V: Add support for the Zifencei extension target/riscv: Add support for disabling/enabling Counters target/riscv: Remove user version information target/riscv: Require either I or E base extension qemu-deprecated.texi: Deprecate the RISC-V privledge spec 1.09.1 target/riscv: Set privledge spec 1.11.0 as default target/riscv: Add the mcountinhibit CSR target/riscv: Add the privledge spec version 1.11.0 target/riscv: Restructure deprecatd CPUs ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-07-02linux-user: move QEMU_IFLA_BR_MULTI_BOOLOPT to the good functionLaurent Vivier1-6/+6
QEMU_IFLA_BR_MULTI_BOOLOPT has been added to the wrong function host_to_target_slave_data_bridge_nlattr(). Move it to host_to_target_data_bridge_nlattr(). This fixes following error: Unknown QEMU_IFLA_BR type 46 Fixes: 61b463fbf6cb ("linux-user: add new netlink types") Message-Id: <20190626150855.27446-1-laurent@vivier.eu> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-07-02linux-user: Handle EXCP_FPE properly for MIPSAleksandar Markovic1-0/+17
Handle EXCP_FPE properly for MIPS in cpu loop. Note that a vast majority of FP instructions are not affected by the absence of the code in this patch, as they use alternative code paths for handling floating point exceptions (see, for example, invocations of update_fcr31()) - they rely on softfloat library for keeping track on exceptions that needs to be raised. However, there are few MIPS FP instructions (an example is CTC1) that use function do_raise_exception() directly, and they need the case that is added in this patch to propagate the FPE exception as designed. The code is based on kernel's function force_fcr31_sig() in arch/mips/kernel.traps.c. Reported-by: Yunqiang Su <ysu@wavecomp.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <1561718618-20218-6-git-send-email-aleksandar.markovic@rt-rk.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-07-02linux-user: Introduce TARGET_HAVE_ARCH_STRUCT_FLOCKAleksandar Markovic2-7/+18
Bring target_flock definitions to be more in sync with the way flock is defined in kernel. Basically, the rules from the kernel are: 1. Majority of architectures have a common flock definition. 2. Architectures with 32-bit MIPS ABIs have a sligtly different flock definition; those architectures are the only arcitectures that have HAVE_ARCH_STRUCT_FLOCK defined, and that preprocessor constant is used in the common header as a flag for including or not including common flock definition. 3. Sparc architectures also have a sligtly different flock definition, but the difference is only the padding at the end of the structure. The presence of that padding is determined by preprocessor constants __ARCH_FLOCK6_PAD and __ARCH_FLOCK64_PAD. QEMU linux-user already implements rules 1. and 3. in a very similar way as they are implemented in kernel. However, rule 2. is implemented in a dissimilar way (for example, the constant TARGET_HAVE_ARCH_STRUCT_FLOCK is missing), and this patch brings QEMU implementation much closer to the kernel implementation. TARGET_HAVE_ARCH_STRUCT_FLOCK64 constant is also introduced to mimic HAVE_ARCH_STRUCT_FLOCK64 from kernel, but it is not defined anywhere, however, this is the case with HAVE_ARCH_STRUCT_FLOCK64 in kernel as well. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <1561718618-20218-5-git-send-email-aleksandar.markovic@rt-rk.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-07-02linux-user: Fix target_flock structure for MIPS O64 ABIAleksandar Markovic2-1/+5
Among MIPS ABIs, only MIPS O32 and N32 have special (different than other architectures) definition of structure flock in kernel. Bring target_flock definition in QEMU for MIPS O64 ABI to the correct state, which is currently different than the most common definition, and it should actually be the same. Reported-by: Dragan Mladjenovic <dmladjenovic@wavecomp.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <1561718618-20218-4-git-send-email-aleksandar.markovic@rt-rk.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-07-02linux-user: Add support for strace for statx() syscallJim Wilson2-0/+89
All of the flags need to be conditional as old systems don't have statx support. Otherwise it works the same as other stat family syscalls. This requires the pending patch to add statx support. Tested on Ubuntu 16.04 (no host statx) and Ubuntu 19.04 (with host statx) using a riscv32-linux toolchain. Signed-off-by: Jim Wilson <jimw@sifive.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <1561718618-20218-3-git-send-email-aleksandar.markovic@rt-rk.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-07-02linux-user: Add support for translation of statx() syscallAleksandar Rikalo2-1/+151
Implement support for translation of system call statx(). The implementation is based on "best effort" approach: if host is capable of executing statx(), host statx() is used. If not, the implementation includes invoking a more mature system call fstatat() on the host side to achieve as close as possible functionality. Support for statx() in kernel and glibc was, however, introduced at different points of time (the difference is more than a year): - kernel: Linux 4.11 (30 April 2017) - glibc: glibc 2.28 (1 Aug 2018) In this patch, the availability of statx() support is established via __NR_statx (if it is defined, statx() is considered available). This coincedes with statx() introduction in kernel. However, the structure statx definition may not be available in any header for hosts with glibc older than 2.28 (and it is, by design, to be defined in one of glibc headers), even though the full statx() functionality may be supported in kernel. Hence, a structure "target_statx" is defined in this patch, to remove that dependency on glibc headers, and to use statx() functionality as soon as the host kernel is capable of supporting it. Such statx structure definition is used for both target and host structures statx (of course, this doesn't mean the endian arrangement is the same on target and host - the endian conversion is done in all necessary cases). Signed-off-by: Aleksandar Rikalo <arikalo@wavecomp.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <1561718618-20218-2-git-send-email-aleksandar.markovic@rt-rk.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-07-01Merge remote-tracking branch 'remotes/vivier/tags/m68k-next-pull-request' ↵Peter Maydell5-183/+1
into staging remove m68k simulator syscall interface Fix comments format Fix gdbstub # gpg: Signature made Wed 26 Jun 2019 17:20:41 BST # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C # gpg: issuer "laurent@vivier.eu" # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full] # gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full] # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full] # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * remotes/vivier/tags/m68k-next-pull-request: linux-user/m68k: remove simulator syscall interface m68k comments break patch submission due to being incorrectly formatted The m68k gdbstub SR reg request doesnt include Condition-Codes Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-06-26linux-user/m68k: remove simulator syscall interfaceLaurent Vivier5-183/+1
This interface has been introduced in 2005 with the coldfire implementation (e6e5906b6e ColdFire target.) and looks like to do what the linux-user interface already does with the TRAP exception rather than the ILLEGAL exception. This interface has not been maintained since that. The semi-hosting interface is not removed so coldfire kernel with semi-hosting is always supported. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20190524162049.806-1-laurent@vivier.eu> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-06-25RISC-V: Update syscall list for 32-bit support.Jim Wilson1-1/+14
32-bit RISC-V uses _llseek instead of lseek as syscall number 62. Update syscall list from open-embedded build, primarily because 32-bit RISC-V requires statx support. Tested with cross gcc testsuite runs for rv32 and rv64, with the pending statx patch also applied. Signed-off-by: Jim Wilson <jimw@sifive.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2019-06-24linux-user: set default PPC64 CPULaurent Vivier1-1/+1
The default CPU for pseries has been set to POWER9 by default. We can use the same default for linux-user Signed-off-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20190609143521.19374-2-laurent@vivier.eu> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-06-24linux-user: update PPC64 HWCAP2 feature listLaurent Vivier1-2/+10
QEMU_PPC_FEATURE2_VEC_CRYPTO enables the use of VSX instructions in libcrypto that are accelerated by the TCG vector instructions now. QEMU_PPC_FEATURE2_DARN allows to use the new builtin qemu_guest_getrandom() function. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20190609143521.19374-1-laurent@vivier.eu> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-06-24linux-user: Add support for setsockopt() options IPV6_<ADD|DROP>_MEMBERSHIPNeng Chen1-0/+19
Add support for the option IPV6_<ADD|DROP>_MEMBERSHIP of the syscall setsockopt(). This option controls membership in multicast groups. Argument is a pointer to a struct ipv6_mreq. The glibc <netinet/in.h> header defines the ipv6_mreq structure, which includes the following members: struct in6_addr ipv6mr_multiaddr; unsigned int ipv6mr_interface; Whereas the kernel in its <linux/in6.h> header defines following members of the same structure: struct in6_addr ipv6mr_multiaddr; int ipv6mr_ifindex; POSIX defines ipv6mr_interface [1]. __UAPI_DEF_IVP6_MREQ appears in kernel headers with v3.12: cfd280c91253 net: sync some IP headers with glibc Without __UAPI_DEF_IVP6_MREQ, kernel defines ipv6mr_ifindex, and this is explained in cfd280c91253: "If you include the kernel headers first you get those, and if you include the glibc headers first you get those, and the following patch arranges a coordination and synchronization between the two." So before 3.12, a program can't include both <netinet/in.h> and <linux/in6.h>. In linux-user/syscall.c, we only include <netinet/in.h> (glibc) and not <linux/in6.h> (kernel headers), so ipv6mr_interface is the one to use. [1] http://pubs.opengroup.org/onlinepubs/009695399/basedefs/netinet/in.h.html Signed-off-by: Neng Chen <nchen@wavecomp.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <1560953834-29584-2-git-send-email-aleksandar.markovic@rt-rk.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-06-24linux-user: Add support for setsockopt() option SOL_ALGYunqiang Su1-0/+31
Add support for options SOL_ALG of the syscall setsockopt(). This option is used in relation to Linux kernel Crypto API, and allows a user to set additional information for the cipher operation via syscall setsockopt(). The field "optname" must be one of the following: - ALG_SET_KEY – seting the key - ALG_SET_AEAD_AUTHSIZE – set the authentication tag size SOL_ALG is relatively newer setsockopt() option. Therefore, the code that handles SOL_ALG is enclosed in "ifdef" so that the build does not fail for older kernels that do not contain support for SOL_ALG. "ifdef" also contains check if ALG_SET_KEY and ALG_SET_AEAD_AUTHSIZE are defined. Signed-off-by: Yunqiang Su <ysu@wavecomp.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <1560953834-29584-3-git-send-email-aleksandar.markovic@rt-rk.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-06-24linux-user: emulate msgsnd(), msgrcv() and semtimedop()Laurent Vivier2-31/+31
When we have updated kernel headers to 5.2-rc1 we have introduced new syscall numbers that can be not supported by older kernels and fail with ENOSYS while the guest emulation succeeded before because the syscalls were emulated with ipc(). This patch fixes the problem by using ipc() if the new syscall returns ENOSYS. Fixes: 86e636951ddc ("linux-user: fix __NR_semtimedop undeclared error") Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Cornelia Huck <cohuck@redhat.com> Message-Id: <20190529084804.25950-1-laurent@vivier.eu> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-06-12semihosting: split console_out into string and char versionsAlex Bennée1-3/+28
This is ostensibly to avoid the weirdness of len looking like it might come from a guest and sometimes being used. While we are at it fix up the error checking for the arm-linux-user implementation of the API which got flagged up by Coverity (CID 1401700). Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
2019-06-12Supply missing header guardsMarkus Armbruster44-3/+222
Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20190604181618.19980-5-armbru@redhat.com>
2019-06-12Include qemu-common.h exactly where neededMarkus Armbruster19-3/+16
No header includes qemu-common.h after this commit, as prescribed by qemu-common.h's file comment. Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20190523143508.25387-5-armbru@redhat.com> [Rebased with conflicts resolved automatically, except for include/hw/arm/xlnx-zynqmp.h hw/arm/nrf51_soc.c hw/arm/msf2-soc.c block/qcow2-refcount.c block/qcow2-cluster.c block/qcow2-cache.c target/arm/cpu.h target/lm32/cpu.h target/m68k/cpu.h target/mips/cpu.h target/moxie/cpu.h target/nios2/cpu.h target/openrisc/cpu.h target/riscv/cpu.h target/tilegx/cpu.h target/tricore/cpu.h target/unicore32/cpu.h target/xtensa/cpu.h; bsd-user/main.c and net/tap-bsd.c fixed up]
2019-06-12Include qemu/module.h where needed, drop it from qemu-common.hMarkus Armbruster1-0/+1
Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20190523143508.25387-4-armbru@redhat.com> [Rebased with conflicts resolved automatically, except for hw/usb/dev-hub.c hw/misc/exynos4210_rng.c hw/misc/bcm2835_rng.c hw/misc/aspeed_scu.c hw/display/virtio-vga.c hw/arm/stm32f205_soc.c; ui/cocoa.m fixed up]
2019-06-11qemu-common: Move tcg_enabled() etc. to sysemu/tcg.hMarkus Armbruster1-0/+2
Other accelerators have their own headers: sysemu/hax.h, sysemu/hvf.h, sysemu/kvm.h, sysemu/whpx.h. Only tcg_enabled() & friends sit in qemu-common.h. This necessitates inclusion of qemu-common.h into headers, which is against the rules spelled out in qemu-common.h's file comment. Move tcg_enabled() & friends into their own header sysemu/tcg.h, and adjust #include directives. Cc: Richard Henderson <rth@twiddle.net> Cc: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20190523143508.25387-2-armbru@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> [Rebased with conflicts resolved automatically, except for accel/tcg/tcg-all.c]
2019-06-10target/xtensa: Use env_cpu, env_archcpuRichard Henderson1-1/+1
Cleanup in the boilerplate that each target must define. Replace xtensa_env_get_cpu with env_archcpu. The combination CPU(xtensa_env_get_cpu) should have used ENV_GET_CPU to begin; use env_cpu now. Move cpu_get_tb_cpu_state below the include of "exec/cpu-all.h" so that the definition of env_cpu is available. Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2019-06-10target/tilegx: Use env_cpuRichard Henderson1-1/+1
Cleanup in the boilerplate that each target must define. Replace tilegx_env_get_cpu with env_archcpu. The combination CPU(tilegx_env_get_cpu) should have used ENV_GET_CPU to begin; use env_cpu now. Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2019-06-10target/sparc: Use env_cpu, env_archcpuRichard Henderson1-1/+1
Cleanup in the boilerplate that each target must define. Replace sparc_env_get_cpu with env_archcpu. The combination CPU(sparc_env_get_cpu) should have used ENV_GET_CPU to begin; use env_cpu now. Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2019-06-10target/sh4: Use env_cpu, env_archcpuRichard Henderson1-1/+1
Cleanup in the boilerplate that each target must define. Replace sh_env_get_cpu with env_archcpu. The combination CPU(sh_env_get_cpu) should have used ENV_GET_CPU to begin; use env_cpu now. Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2019-06-10target/s390x: Use env_cpu, env_archcpuRichard Henderson1-1/+1
Cleanup in the boilerplate that each target must define. Replace s390_env_get_cpu with env_archcpu. The combination CPU(s390_env_get_cpu) should have used ENV_GET_CPU to begin; use env_cpu now. Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2019-06-10target/riscv: Use env_cpu, env_archcpuRichard Henderson1-1/+1
Cleanup in the boilerplate that each target must define. Replace riscv_env_get_cpu with env_archcpu. The combination CPU(riscv_env_get_cpu) should have used ENV_GET_CPU to begin; use env_cpu now. Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2019-06-10target/ppc: Use env_cpu, env_archcpuRichard Henderson1-1/+1
Cleanup in the boilerplate that each target must define. Replace ppc_env_get_cpu with env_archcpu. The combination CPU(ppc_env_get_cpu) should have used ENV_GET_CPU to begin; use env_cpu now. Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2019-06-10target/openrisc: Use env_cpu, env_archcpuRichard Henderson1-1/+1
Cleanup in the boilerplate that each target must define. Replace openrisc_env_get_cpu with env_archcpu. The combination CPU(openrisc_env_get_cpu) should have used ENV_GET_CPU to begin; use env_cpu now. Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2019-06-10target/mips: Use env_cpu, env_archcpuRichard Henderson1-1/+1
Cleanup in the boilerplate that each target must define. Replace mips_env_get_cpu with env_archcpu. The combination CPU(mips_env_get_cpu) should have used ENV_GET_CPU to begin; use env_cpu now. Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2019-06-10target/microblaze: Use env_cpu, env_archcpuRichard Henderson1-1/+1
Cleanup in the boilerplate that each target must define. Replace mb_env_get_cpu with env_archcpu. The combination CPU(mb_env_get_cpu) should have used ENV_GET_CPU to begin; use env_cpu now. Move cpu_mmu_index below the include of "exec/cpu-all.h", so that the definition of env_archcpu is available. Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2019-06-10target/m68k: Use env_cpuRichard Henderson3-4/+3
Cleanup in the boilerplate that each target must define. The combination CPU(m68k_env_get_cpu) should have used ENV_GET_CPU to begin; use env_cpu now. Acked-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2019-06-10target/i386: Use env_cpu, env_archcpuRichard Henderson3-11/+11
Cleanup in the boilerplate that each target must define. Replace x86_env_get_cpu with env_archcpu. The combination CPU(x86_env_get_cpu) should have used ENV_GET_CPU to begin; use env_cpu now. Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2019-06-10target/hppa: Use env_cpu, env_archcpuRichard Henderson1-1/+1
Cleanup in the boilerplate that each target must define. Replace hppa_env_get_cpu with env_archcpu. The combination CPU(hppa_env_get_cpu) should have used ENV_GET_CPU to begin; use env_cpu now. Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2019-06-10target/cris: Use env_cpu, env_archcpuRichard Henderson1-1/+1
Cleanup in the boilerplate that each target must define. Replace cris_env_get_cpu with env_archcpu. The combination CPU(cris_env_get_cpu) should have used ENV_GET_CPU to begin; use env_cpu now. Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2019-06-10target/arm: Use env_cpu, env_archcpuRichard Henderson4-10/+10
Cleanup in the boilerplate that each target must define. Replace arm_env_get_cpu with env_archcpu. The combination CPU(arm_env_get_cpu) should have used ENV_GET_CPU to begin; use env_cpu now. Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2019-06-10target/alpha: Use env_cpu, env_archcpuRichard Henderson1-1/+1
Cleanup in the boilerplate that each target must define. Replace alpha_env_get_cpu with env_archcpu. The combination CPU(alpha_env_get_cpu) should have used ENV_GET_CPU to begin; use env_cpu now. Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2019-06-10cpu: Replace ENV_GET_CPU with env_cpuRichard Henderson12-25/+25
Now that we have both ArchCPU and CPUArchState, we can define this generically instead of via macro in each target's cpu.h. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2019-06-07linux-user: elf: ELF_HWCAP for s390xDavid Hildenbrand1-0/+28
Let's add all HWCAPs that we can support under TCG right now, when the respective CPU facilities are enabled. Cc: Riku Voipio <riku.voipio@iki.fi> Cc: Laurent Vivier <laurent@vivier.eu> Cc: Cornelia Huck <cohuck@redhat.com> Cc: Laurent Vivier <laurent@vivier.eu> Cc: Richard Henderson <richard.henderson@linaro.org> Acked-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
2019-06-07s390x: Use uint64_t for vector registersDavid Hildenbrand1-2/+2
CPU_DoubleU is primarily used to reinterpret between integer and floats. We don't really need this functionality. So let's just keep it simple and use an uint64_t. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
2019-05-28Merge remote-tracking branch ↵Peter Maydell2-0/+26
'remotes/stsquad/tags/pull-testing-next-280519-2' into staging Various testing updates - semihosting re-factor (used in system tests) - aarch64 and alpha system tests - editorconfig tweak for .S - some docker image updates - iotests clean-up (without make check inclusion) # gpg: Signature made Tue 28 May 2019 17:26:34 BST # gpg: using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2A44 # gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" [full] # Primary key fingerprint: 6685 AE99 E751 67BC AFC8 DF35 FBD0 DB09 5A9E 2A44 * remotes/stsquad/tags/pull-testing-next-280519-2: (27 commits) tests/qemu-iotests: re-format output to for make check-block tests/qemu-iotests/group: Re-use the "auto" group for tests that can always run Makefile.target: support per-target coverage reports Makefile: include per-target build directories in coverage report Makefile: fix coverage-report reference to BUILD_DIR .travis.yml: enable aarch64-softmmu and alpha-softmmu tcg tests tests/tcg/alpha: add system boot.S tests/tcg/multiarch: expand system memory test to cover more tests/tcg/minilib: support %c format char tests/tcg/multiarch: move the system memory test tests/tcg/aarch64: add system boot.S editorconfig: add settings for .s/.S files tests/tcg/multiarch: add hello world system test tests/tcg/multiarch: add support for multiarch system tests tests/docker: Test more components on the Fedora default image tests/docker: add ubuntu 18.04 MAINTAINERS: update for semihostings new home target/mips: convert UHI_plog to use common semihosting code target/mips: only build mips-semi for softmmu target/arm: correct return values for WRITE/READ in arm-semi ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-05-28Merge remote-tracking branch ↵Peter Maydell1-8/+16
'remotes/amarkovic/tags/mips-queue-may-19-2019-v3' into staging MIPS queue for May 19th, 2019 - v3 # gpg: Signature made Sun 26 May 2019 17:07:07 BST # gpg: using RSA key D4972A8967F75A65 # gpg: Good signature from "Aleksandar Markovic <amarkovic@wavecomp.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 8526 FBF1 5DA3 811F 4A01 DD75 D497 2A89 67F7 5A65 * remotes/amarkovic/tags/mips-queue-may-19-2019-v3: BootLinuxSshTest: Test some userspace commands on Malta target/mips: realign comments to fix checkpatch warnings target/mips: add or remove space to fix checkpatch errors linux-user: fix __NR_semtimedop undeclared error mips: Decide to map PAGE_EXEC in map_address target/mips: Refactor and fix INSERT.<B|H|W|D> instructions target/mips: Refactor and fix COPY_U.<B|H|W> instructions target/mips: Refactor and fix COPY_S.<B|H|W|D> instructions target/mips: Fix MSA instructions ST.<B|H|W|D> on big endian host target/mips: Fix MSA instructions LD.<B|H|W|D> on big endian host target/mips: Make the results of MOD_<U|S>.<B|H|W|D> the same as on hardware target/mips: Make the results of DIV_<U|S>.<B|H|W|D> the same as on hardware Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-05-28target/arm: use the common interface for WRITE0/WRITEC in arm-semiAlex Bennée2-0/+26
Now we have a common semihosting console interface use that for our string output. However ARM is currently unique in also supporting semihosting for linux-user so we need to replicate the API in linux-user. If other architectures gain this support we can move the file later. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2019-05-26linux-user: fix __NR_semtimedop undeclared errorLaurent Vivier1-8/+16
In current code, __NR_msgrcv and__NR_semtimedop are supposed to be defined if __NR_msgsnd is defined. But linux headers 5.2-rc1 for MIPS define __NR_msgsnd without defining __NR_semtimedop and it breaks the QEMU build. __NR_semtimedop is defined in asm-mips/unistd_n64.h and asm-mips/unistd_n32.h but not in asm-mips/unistd_o32.h. Commit d9cb4336159a ("linux headers: update against Linux 5.2-rc1") has updated asm-mips/unistd_o32.h and added __NR_msgsnd but not __NR_semtimedop. It introduces __NR_semtimedop_time64 instead. This patch fixes the problem by checking for each __NR_XXX symbol before defining the corresponding syscall. Fixes: d9cb4336159a ("linux headers: update against Linux 5.2-rc1") Reported-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Cornelia Huck <cohuck@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20190523175413.14448-1-laurent@vivier.eu>
2019-05-24linux-user/riscv: Add the CPU type as a commentAlistair Francis1-0/+1
Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
generated by cgit v1.1 at 2024-10-01 07:01:02 +0000