aboutsummaryrefslogtreecommitdiff
path: root/linux-user
AgeCommit message (Collapse)AuthorFilesLines
2021-12-21linux-user: Implement CPU-specific signal handler for loongarch64 hostsWANG Xuerui1-0/+87
Signed-off-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211221054105.178795-30-git@xen0n.name> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-20Merge tag 'pull-user-20211220' of https://gitlab.com/rth7680/qemu into stagingRichard Henderson65-1155/+626
Move errno processing from safe_syscall() to safe_syscall_base(). Move safe_syscall() from linux-user to common-user. Add FreeBSD support to safe_syscall_base(). Tidy top-level meson.build wrt {bsd,linux}-user. # gpg: Signature made Mon 20 Dec 2021 11:46:11 AM PST # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * tag 'pull-user-20211220' of https://gitlab.com/rth7680/qemu: meson: Move bsd_user_ss to bsd-user/ meson: Move linux_user_ss to linux-user/ linux-user: Move thunk.c from top-level common-user: Adjust system call return on FreeBSD common-user: Move safe-syscall.* from linux-user bsd-user: Create special-errno.h linux-user: Create special-errno.h linux-user: Rename TARGET_QEMU_ESIGRETURN to QEMU_ESIGRETURN bsd-user: Rename TARGET_ERESTARTSYS to QEMU_ERESTARTSYS linux-user: Rename TARGET_ERESTARTSYS to QEMU_ERESTARTSYS linux-user: Remove HAVE_SAFE_SYSCALL and hostdep.h linux-user/host/sparc64: Add safe-syscall.inc.S linux-user/host/mips: Add safe-syscall.inc.S linux-user: Move syscall error detection into safe_syscall_base linux-user: Untabify all safe-syscall.inc.S Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-20meson: Move linux_user_ss to linux-user/Richard Henderson1-0/+4
We have no need to reference linux_user_ss outside of linux-user. Go ahead and merge it directly into specific_ss. Reviewed-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-20linux-user: Move thunk.c from top-levelRichard Henderson2-0/+482
So far, linux-user is the only user of these functions. Clean up the build machinery by restricting it to linux-user. Reviewed-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-20common-user: Move safe-syscall.* from linux-userRichard Henderson15-1088/+5
Move linux-user safe-syscall.S and safe-syscall-error.c to common-user so that bsd-user can also use it. Also move safe-syscall.h to include/user/. Since there is nothing here that is related to the guest, as opposed to the host, build it once. Reviewed-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-20riscv: Set 5.4 as minimum kernel version for riscv32Khem Raj1-1/+2
5.4 is first stable API as far as rv32 is concerned see [1] [1] https://sourceware.org/git/?p=glibc.git;a=commit;h=7a55dd3fb6d2c307a002a16776be84310b9c8989 Signed-off-by: Khem Raj <raj.khem@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Cc: Palmer Dabbelt <palmer@dabbelt.com> Cc: Alistair Francis <alistair.francis@wdc.com> Cc: Bin Meng <bin.meng@windriver.com> Message-Id: <20211216073111.2890607-1-raj.khem@gmail.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2021-12-19linux-user: Create special-errno.hRichard Henderson6-18/+37
Pull the two internal errno used by qemu internally into their own header file. This includes the one define required by safe-syscall.S. Reviewed-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-19linux-user: Rename TARGET_QEMU_ESIGRETURN to QEMU_ESIGRETURNRichard Henderson35-70/+70
This value is fully internal to qemu, and so is not a TARGET define. Reviewed-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-19linux-user: Rename TARGET_ERESTARTSYS to QEMU_ERESTARTSYSRichard Henderson31-46/+45
This value is fully internal to qemu, and so is not a TARGET define. We use this as an extra marker for both host and target errno. Reviewed-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-19linux-user: Remove HAVE_SAFE_SYSCALL and hostdep.hRichard Henderson19-254/+1
All supported hosts now define HAVE_SAFE_SYSCALL, so remove the ifdefs. This leaves hostdep.h empty, so remove it. Reviewed-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-19linux-user/host/sparc64: Add safe-syscall.inc.SRichard Henderson2-0/+92
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-19linux-user/host/mips: Add safe-syscall.inc.SRichard Henderson2-0/+151
Reviewed-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-19linux-user: Move syscall error detection into safe_syscall_baseRichard Henderson10-84/+144
The current api from safe_syscall_base() is to return -errno, which is the interface provided by *some* linux kernel abis. The wrapper macro, safe_syscall(), detects error, stores into errno, and returns -1, to match the api of the system syscall(). For those kernel abis that do not return -errno natively, this leads to double syscall error detection. E.g. Linux ppc64, which sets the SO flag for error. Simplify the usage from C by moving the error detection into assembly, and usage from assembly by providing a C helper with which to set errno. Reviewed-by: Warner Losh <imp@bsdimp.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-19linux-user: Untabify all safe-syscall.inc.SRichard Henderson7-396/+396
Reviewed-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Suggested-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-15target/hexagon/cpu.h: don't include qemu-common.hPeter Maydell1-0/+1
The qemu-common.h header is not supposed to be included from any other header files, only from .c files (as documented in a comment at the start of it). Move the include to linux-user/hexagon/cpu_loop.c, which needs it for the declaration of cpu_exec_step_atomic(). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Taylor Simpson <tsimpson@quicinc.com> Message-id: 20211129200510.1233037-3-peter.maydell@linaro.org
2021-12-15target/arm: Take an exception if PC is misalignedRichard Henderson1-19/+27
For A64, any input to an indirect branch can cause this. For A32, many indirect branch paths force the branch to be aligned, but BXWritePC does not. This includes the BX instruction but also other interworking changes to PC. Prior to v8, this case is UNDEFINED. With v8, this is CONSTRAINED UNPREDICTABLE and may either raise an exception or force align the PC. We choose to raise an exception because we have the infrastructure, it makes the generated code for gen_bx simpler, and it has the possibility of catching more guest bugs. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-11-29linux-user: implement more loop ioctlsAndreas Schwab4-0/+16
LOOP_CONFIGURE is now used by losetup, and it cannot cope with ENOSYS. Signed-off-by: Andreas Schwab <schwab@suse.de> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <mvmtug4mbfx.fsf_-_@suse.de> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-11-23linux-user/signal.c: Create a common rewind_if_in_safe_syscallWarner Losh9-143/+15
All instances of rewind_if_in_safe_syscall are the same, differing only in how the instruction point is fetched from the ucontext and the size of the registers. Use host_signal_pc and new host_signal_set_pc interfaces to fetch the pointer to the PC and adjust if needed. Delete all the old copies of rewind_if_in_safe_syscall. Acked-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211113045603.60391-3-imp@bsdimp.com> [rth: include safe-syscall.h, simplify ifdefs] Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-11-23linux-user: Add host_signal_set_pc to set pc in mcontextWarner Losh10-0/+54
Add a new function host_signal_set_pc to set the next pc in an mcontext. The caller should ensure this is a valid PC for execution. Acked-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20211113045603.60391-2-imp@bsdimp.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-11-22linux-user: fix Coverity CID 1464101Laurent Vivier1-3/+7
target_mmap() can fail and return -1, but we don't check for that and instead assume it's always valid. Fixes: db2af69d6ba8 ("linux-user: Add infrastructure for a signal trampoline page") Cc: richard.henderson@linaro.org Reported-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20211121151711.331653-1-laurent@vivier.eu> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-11-21linux-user: Rewrite do_getdents, do_getdents64Richard Henderson1-139/+122
Always allocate host storage; this ensures that the struct is sufficiently aligned for the host. Merge the three host implementations of getdents via a few ifdefs. Utilize the same method for do_getdents64. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/704 Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211114103539.298686-5-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-11-21linux-user: Fix member types of target_dirent64Richard Henderson1-3/+3
The host uint64_t (etc) does not have the correct alignment constraint as the guest: use abi_* types. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211114103539.298686-4-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-11-21linux-user: Always use flexible arrays for dirent d_nameRichard Henderson2-5/+7
We currently use a flexible array member for target_dirent, but use incorrectly fixed length arrays for target_dirent64, linux_dirent and linux_dirent64. This requires that we adjust the definition of the VFAT READDIR ioctls which hard-code the 256 namelen size into the ioctl constant. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211114103539.298686-3-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-11-21linux-user: Split out do_getdents, do_getdents64Richard Henderson1-153/+172
Retain all 3 implementations of getdents for now. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211114103539.298686-2-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-11-02Merge remote-tracking branch 'remotes/philmd/tags/mips-20211102' into stagingRichard Henderson1-2/+0
MIPS patches queue - Fine-grained MAINTAINERS sections - Fix MSA MADDV.B / MSUBV.B opcodes - Convert MSA opcodes to decodetree - Correct Loongson-3A4000 MSAIR register - Do not accept ELF nanoMIPS binaries on linux-user - Use ISA instead of PCI interrupts in VT82C686 PCI device # gpg: Signature made Tue 02 Nov 2021 09:41:04 AM EDT # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] * remotes/philmd/tags/mips-20211102: (41 commits) Revert "elf: Relax MIPS' elf_check_arch() to accept EM_NANOMIPS too" hw/usb/vt82c686-uhci-pci: Use ISA instead of PCI interrupts usb/uhci: Replace pci_set_irq with qemu_set_irq usb/uhci: Disallow user creating a vt82c686-uhci-pci device usb/uhci: Misc clean up target/mips: Remove obsolete FCR0_HAS2008 comment on P5600 CPU target/mips: Fix Loongson-3A4000 MSAIR config register target/mips: Remove one MSA unnecessary decodetree overlap group target/mips: Remove generic MSA opcode target/mips: Convert CTCMSA opcode to decodetree target/mips: Convert CFCMSA opcode to decodetree target/mips: Convert MSA MOVE.V opcode to decodetree target/mips: Convert MSA COPY_S and INSERT opcodes to decodetree target/mips: Convert MSA COPY_U opcode to decodetree target/mips: Convert MSA ELM instruction format to decodetree target/mips: Convert MSA 3R instruction format to decodetree (part 4/4) target/mips: Convert MSA 3R instruction format to decodetree (part 3/4) target/mips: Convert MSA 3R instruction format to decodetree (part 2/4) target/mips: Convert MSA 3R instruction format to decodetree (part 1/4) target/mips: Convert MSA 3RF instruction format to decodetree (DF_WORD) ... Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-11-02Revert "elf: Relax MIPS' elf_check_arch() to accept EM_NANOMIPS too"Philippe Mathieu-Daudé1-2/+0
Per the "P32 Porting Guide" (rev 1.2) [1], chapter 2: p32 ABI Overview ---------------- The Application Binary Interface, or ABI, is the set of rules that all binaries must follow in order to run on a nanoMIPS system. This includes, for example, object file format, instruction set, data layout, subroutine calling convention, and system call numbers. The ABI is one part of the mechanism that maintains binary compatibility across all nanoMIPS platforms. p32 improves on o32 to provide an ABI that is efficient in both code density and performance. p32 is required for the nanoMIPS architecture. So far QEMU only support the MIPS o32 / n32 / n64 ABIs. The p32 ABI is not implemented, therefore we can not run any nanoMIPS binary. Revert commit f72541f3a59 ("elf: Relax MIPS' elf_check_arch() to accept EM_NANOMIPS too"). See also the "ELF ABI Supplement" [2]. [1] http://codescape.mips.com/components/toolchain/nanomips/2019.03-01/docs/MIPS_nanoMIPS_p32_ABI_Porting_Guide_01_02_DN00184.pdf [2] http://codescape.mips.com/components/toolchain/nanomips/2019.03-01/docs/MIPS_nanoMIPS_ABI_supplement_01_03_DN00179.pdf Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20211101114800.2692157-1-f4bug@amsat.org>
2021-11-02linux-user: Handle BUS_ADRALN in host_signal_handlerRichard Henderson1-0/+3
Handle BUS_ADRALN via cpu_loop_exit_sigbus, but allow other SIGBUS si_codes to continue into the host-to-guest signal conversion code. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-11-02linux-user/ppc: Remove POWERPC_EXCP_ALIGN handlingRichard Henderson1-8/+0
We will raise SIGBUS directly from cpu_loop_exit_sigbus. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-11-02linux-user/hppa: Remove EXCP_UNALIGN handlingRichard Henderson1-7/+0
We will raise SIGBUS directly from cpu_loop_exit_sigbus. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-11-02target/arm: Implement arm_cpu_record_sigbusRichard Henderson2-7/+35
Because of the complexity of setting ESR, re-use the existing arm_cpu_do_unaligned_access function. This means we have to handle the exception ourselves in cpu_loop, transforming it to the appropriate signal. Reviewed-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-11-02target/alpha: Implement alpha_cpu_record_sigbusRichard Henderson1-7/+0
Record trap_arg{0,1,2} for the linux-user signal frame. Raise SIGBUS directly from cpu_loop_exit_sigbus, which means we can remove the code for EXCP_UNALIGN in cpu_loop. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-11-02linux-user: Add cpu_loop_exit_sigbusRichard Henderson1-0/+14
This is a new interface to be provided by the os emulator for raising SIGBUS on fault. Use the new record_sigbus target hook. Reviewed-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-11-02accel/tcg: Restrict TCGCPUOps::tlb_fill() to sysemuRichard Henderson1-3/+0
We have replaced tlb_fill with record_sigsegv for user mode. Move the declaration to restrict it to system emulation. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-11-02target/xtensa: Make xtensa_cpu_tlb_fill sysemu onlyRichard Henderson1-9/+0
The fallback code in cpu_loop_exit_sigsegv is sufficient for xtensa linux-user. Remove the code from cpu_loop that raised SIGSEGV. Acked-by: Max Filippov <jcmvbkbc@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-11-02target/sparc: Make sparc_cpu_tlb_fill sysemu onlyRichard Henderson1-25/+0
The fallback code in cpu_loop_exit_sigsegv is sufficient for sparc linux-user. This makes all of the code in mmu_helper.c sysemu only, so remove the ifdefs and move the file to sparc_softmmu_ss. Remove the code from cpu_loop that handled TT_DFAULT and TT_TFAULT. Cc: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-11-02target/sh4: Make sh4_cpu_tlb_fill sysemu onlyRichard Henderson1-8/+0
The fallback code in cpu_loop_exit_sigsegv is sufficient for sh4 linux-user. Remove the code from cpu_loop that raised SIGSEGV. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-11-02target/s390x: Implement s390_cpu_record_sigsegvRichard Henderson1-7/+6
Move the masking of the address from cpu_loop into s390_cpu_record_sigsegv -- this is governed by hw, not linux. This does mean we have to raise our own exception, rather than return to the fallback. Use maperr to choose between PGM_PROTECTION and PGM_ADDRESSING. Use the appropriate si_code for each in cpu_loop. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-11-02target/riscv: Make riscv_cpu_tlb_fill sysemu onlyRichard Henderson1-7/+0
The fallback code in cpu_loop_exit_sigsegv is sufficient for riscv linux-user. Remove the code from cpu_loop that raised SIGSEGV. Reviewed-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-11-02target/openrisc: Make openrisc_cpu_tlb_fill sysemu onlyRichard Henderson1-8/+0
The fallback code in cpu_loop_exit_sigsegv is sufficient for openrisc linux-user. This makes all of the code in mmu.c sysemu only, so remove the ifdefs and move the file to openrisc_softmmu_ss. Remove the code from cpu_loop that handled EXCP_DPF. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-11-02linux-user/openrisc: Abort for EXCP_RANGE, EXCP_FPERichard Henderson1-8/+9
QEMU does not allow the system control bits for either exception to be enabled in linux-user, therefore both exceptions are dead code. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-11-02target/mips: Make mips_cpu_tlb_fill sysemu onlyRichard Henderson1-11/+0
The fallback code in cpu_loop_exit_sigsegv is sufficient for mips linux-user. This means we can remove tcg/user/tlb_helper.c entirely. Remove the code from cpu_loop that raised SIGSEGV. Reviewed-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-11-02target/microblaze: Make mb_cpu_tlb_fill sysemu onlyRichard Henderson1-10/+0
The fallback code in cpu_loop_exit_sigsegv is sufficient for microblaze linux-user. Remove the code from cpu_loop that handled the unnamed 0xaa exception. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-11-02target/m68k: Make m68k_cpu_tlb_fill sysemu onlyRichard Henderson1-10/+0
The fallback code in cpu_loop_exit_sigsegv is sufficient for m68k linux-user. Remove the code from cpu_loop that handled EXCP_ACCESS. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-11-02target/hppa: Make hppa_cpu_tlb_fill sysemu onlyRichard Henderson1-16/+0
The fallback code in cpu_loop_exit_sigsegv is sufficient for hppa linux-user. Remove the code from cpu_loop that raised SIGSEGV. This makes all of the code in mem_helper.c sysemu only, so remove the ifdefs and move the file to hppa_softmmu_ss. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-11-02target/hexagon: Remove hexagon_cpu_tlb_fillRichard Henderson1-23/+1
The fallback code in cpu_loop_exit_sigsegv is sufficient for hexagon linux-user. Remove the code from cpu_loop that raises SIGSEGV. Reviewed-by: Taylor Simpson <tsimpson@quicinc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-11-02target/cris: Make cris_cpu_tlb_fill sysemu onlyRichard Henderson1-10/+0
The fallback code in cpu_loop_exit_sigsegv is sufficient for cris linux-user. Remove the code from cpu_loop that handled the unnamed 0xaa exception. This makes all of the code in helper.c sysemu only, so remove the ifdefs and move the file to cris_softmmu_ss. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-11-02target/alpha: Implement alpha_cpu_record_sigsegvRichard Henderson1-8/+0
Record trap_arg{0,1,2} for the linux-user signal frame. Fill in the stores to trap_arg{1,2} that were missing from the previous user-only alpha_cpu_tlb_fill function. Use maperr to simplify computation of trap_arg1. Remove the code for EXCP_MMFAULT from cpu_loop, as that part is now handled by cpu_loop_exit_sigsegv. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-11-02linux-user: Add cpu_loop_exit_sigsegvRichard Henderson1-8/+22
This is a new interface to be provided by the os emulator for raising SIGSEGV on fault. Use the new record_sigsegv target hook. Reviewed by: Warner Losh <imp@bsdimp.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-11-02linux-user/signal: Drop HOST_SIGNAL_PLACEHOLDERRichard Henderson1-14/+0
Now that all of the linux-user hosts have been converted to host-signal.h, drop the compatibility code. Reviewed by: Warner Losh <imp@bsdimp.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-11-02linux-user/host/riscv: Improve host_signal_writeRichard Henderson1-55/+28
Do not read 4 bytes before we determine the size of the insn. Simplify triple switches in favor of checking major opcodes. Include the missing cases of compact fsd and fsdsp. Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
generated by cgit v1.1 at 2024-09-28 21:14:32 +0000