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2014-03-13exec: Change cpu_watchpoint_{insert,remove{,_by_ref,_all}} argumentAndreas Färber1-2/+3
Use CPUState. This lets us drop a few local env usages. Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-03-13cpu: Move breakpoints field from CPU_COMMON to CPUStateAndreas Färber1-2/+2
Most targets were using offsetof(CPUFooState, breakpoints) to determine how much of CPUFooState to clear on reset. Use the next field after CPU_COMMON instead, if any, or sizeof(CPUFooState) otherwise. Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-03-13cpu: Move watchpoint fields from CPU_COMMON to CPUStateAndreas Färber1-2/+3
Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-03-13cpu: Move opaque field from CPU_COMMON to CPUStateAndreas Färber7-37/+60
Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-03-13cpu: Move exception_index field from CPU_COMMON to CPUStateAndreas Färber1-3/+4
Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-03-10Merge remote-tracking branch 'remotes/riku/linux-user-for-upstream' into stagingPeter Maydell20-33/+143
* remotes/riku/linux-user-for-upstream: linux-user: set minimum kernel version to 2.6.32 linux-user: correct handling of break exception for MIPS linux-user: translate signal number on return from sigtimedwait linux-user: Implement sendmmsg syscall linux-user: Fix getresuid, getresgid if !USE_UID16 linux-user: Don't use UID16 on AArch64 linux-user: AArch64: Implement SA_RESTORER for signal handlers linux-user/signal.c: Fix AArch64 big-endian FP register restore Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-03-10linux-user: set minimum kernel version to 2.6.32Riku Voipio16-3/+16
Popular glibc based distributions[1] require minimum 2.6.32 as kernel version. For some targets 2.6.18 would be enough, but dropping so low would mean some suboptimal system calls could get used. Set the minimum kernel advertized to 2.6.32 for all architectures but aarch64 to ensure working qemu linux-user in case host kernel is older. [1] https://bugs.launchpad.net/ubuntu/+source/eglibc/+bug/921078 Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
2014-03-05target-ppc: Add Store Quadword ConditionalTom Musta1-1/+17
This patch adds the Store Quadword Conditionl (stqcx.) instruction which is introduced in Power ISA 2.07. Signed-off-by: Tom Musta <tommusta@gmail.com> [agraf: fix compile error when !TARGET_PPC64] Signed-off-by: Alexander Graf <agraf@suse.de>
2014-03-03linux-user: correct handling of break exception for MIPSPetar Jovanovic1-0/+4
Exception with break instruction has not been correctly propagated as SIGTRAP. This resolves crash issues with examples that use break instruction on MIPS. Signed-off-by: Petar Jovanovic <petar.jovanovic@imgtec.com> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
2014-03-03linux-user: translate signal number on return from sigtimedwaitPetar Jovanovic1-5/+11
On success, sigtimedwait() returns a signal number that needs to be translated from a host value to a target value. This change also fixes issues with sigwait (that is implemented using sigtimedwait()). Signed-off-by: Petar Jovanovic <petar.jovanovic@imgtec.com> Signed-off-by: Riku Voipio <riku.voipio@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
2014-03-03linux-user: Implement sendmmsg syscallAlexander Graf2-10/+80
Glibc when built for newer kernels assumes that the sendmmsg syscall is available. Without it, dns resolution simply fails to work. Wrap the syscall with existing infrastructure so that we don't have a host dependency on sendmmsg. To avoid locking the same area of guest memory twice (which will break if DEBUG_REMAP is defined) we pull the lock/unlock part of do_sendrecvmsg() out into its own function so the actual implementation can be shared. Signed-off-by: Alexander Graf <agraf@suse.de> [PMM: add recvmmsg support; handle errors (which also implies support for non-blocking operations); cap the vector length as the kernel implementation does; don't lock guest memory twice; support MSG_WAITFORONE flag] Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Riku Voipio <riku.voipio@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
2014-03-03linux-user: Fix getresuid, getresgid if !USE_UID16Peter Maydell1-6/+12
The size of the UID/GID types depends on whether USE_UID16 is defined. Define a new put_user_id() which writes a uid/gid type to guest memory. This fixes getresuid and getresgid, which were always storing 16 bits even if the uid type was 32 bits. Reported-by: Michael Matz <matz@suse.de> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Riku Voipio <riku.voipio@linaro.org> Reviewed-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Richard Henderson <rth@twiddle.net>
2014-03-03linux-user: Don't use UID16 on AArch64Andreas Schwab1-1/+2
The AArch64 kernel defines its __kernel_uid_t type as 32 bits, unlike 32 bit ARM, so don't enable our 16-bit UID wrapper handling. Signed-off-by: Andreas Schwab <schwab@suse.de> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Riku Voipio <riku.voipio@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
2014-03-03linux-user: AArch64: Implement SA_RESTORER for signal handlersMichael Matz1-6/+10
Implement support for signal handlers with the SA_RESTORER flag set. Signed-off-by: Michael Matz <matz@suse.de> [PMM: minor tweaks to make patch apply to current master] Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Riku Voipio <riku.voipio@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
2014-03-03linux-user/signal.c: Fix AArch64 big-endian FP register restorePeter Maydell1-2/+8
Fix the loop restoring the FP registers from the signal frame to match the one used when setting up the signal frame, so that it handles TARGET_WORDS_BIGENDIAN being set. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Riku Voipio <riku.voipio@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
2014-02-21Merge remote-tracking branch ↵Peter Maydell1-2/+4
'remotes/pmaydell/tags/pull-target-arm-20140220' into staging target-arm queue: * Fix a bug causing an assertion in the NVIC on ARMv7M models * More A64 Neon instructions * Refactor cpreg API to separate out access check functions, as groundwork for AArch64 system mode * Fix bug in linux-user A64 store-exclusive of XZR # gpg: Signature made Thu 20 Feb 2014 11:12:57 GMT using RSA key ID 14360CDE # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" * remotes/pmaydell/tags/pull-target-arm-20140220: (30 commits) linux-user: AArch64: Fix exclusive store of the zero register target-arm: A64: Implement unprivileged load/store target-arm: A64: Implement narrowing three-reg-diff operations target-arm: A64: Implement the wide 3-reg-different operations target-arm: A64: Add most remaining three-reg-diff widening ops target-arm: A64: Add opcode comments to disas_simd_three_reg_diff target-arm: A64: Implement store-exclusive for system mode target-arm: Fix incorrect type for value argument to write_raw_cp_reg target-arm: Remove failure status return from read/write_raw_cp_reg target-arm: Remove unnecessary code now read/write fns can't fail target-arm: Drop success/fail return from cpreg read and write functions target-arm: Convert miscellaneous reginfo structs to accessfn target-arm: Convert generic timer reginfo to accessfn target-arm: Convert performance monitor reginfo to accessfn target-arm: Split cpreg access checks out from read/write functions target-arm: Stop underdecoding ARM946 PRBS registers target-arm: Log bad system register accesses with LOG_UNIMP target-arm: Remove unused ARMCPUState sr substruct target-arm: Restrict check_ap() use of S and R bits to v6 and earlier target-arm: Define names for SCTLR bits ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-02-20linux-user: AArch64: Fix exclusive store of the zero registerJanne Grunau1-2/+4
Signed-off-by: Janne Grunau <j@jannau.net> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-02-19linux-user: Fix error handling in target_to_host_semarray()Peter Maydell1-1/+6
Fix two issues in error handling in target_to_host_semarray(): * don't leak the host_array buffer if lock_user fails * return an error if malloc() fails v2: added missing * -Riku Voipio Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
2014-02-19linux-user: Implement BLKPG ioctlAndreas Färber4-0/+16
Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
2014-02-18linux-user: Fix error handling in lock_iovec()Peter Maydell1-5/+7
In lock_iovec() if lock_user() failed we were doing an unlock_user but not a free(vec), which is the wrong way round. We were also assuming that free() and unlock_user() don't touch errno, which is not guaranteed. Fix both these problems. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
2014-02-18linux-user/signal.c: Don't pass sigaction uninitialised sa_flagsPeter Maydell1-0/+1
When forcing a fatal signal, we weren't initialising the sa_flags field in the struct sigaction we used to reset the signal handler to SIG_DFL. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
2014-02-18linux-user/elfload.c: Avoid calling g_free() on uninitialized dataPeter Maydell1-4/+12
Avoid calling g_free() on unintialized data in the error-handling paths in elf_core_dump() by splitting the initialization of the elf_note_info struct out of fill_note_info() so that it's always valid to call free_note_info() whether we got to the point of being able to fill_note_info() or not. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
2014-02-18linux-user: sync syscall numbers upto 3.13Riku Voipio15-3/+94
All others updated except unicore, which doesn't look right to begin with. Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
2014-02-15linux-user: refactor do_socketcall()Michael Tokarev1-258/+68
Refactor do_socketcall() to do argument conversion/checking first, according to a lookup table (which call has how many args) and by calling the right function second with ready-to-go arguments. This ensures that all arguments are handled as abi_long, according to socketcall prototype, and simplifies argument handling alot too. Signed-off-by: Michael Tokarev <mjt@tls.msk.ru> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
2014-02-03linux-user: Fix trampoline code for CRISStefan Weil1-4/+4
__put_user can write bytes, words (2 bytes) or longwords (4 bytes). Here obviously words should have been written, but bytes were written, so values like 0x9c5f were truncated to 0x5f. Fix this by changing retcode from uint8_t to to uint16_t in target_signal_frame and also in the unused rt_signal_frame. This problem was reported by static code analysis (smatch). Cc: qemu-stable@nongnu.org Signed-off-by: Stefan Weil <sw@weilnetz.de> Acked-by: Riku Voipio <riku.voipio@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2014-01-15linux-user: fixed recvfrom() addrlenPavel Zbitskiy1-1/+1
addrlen parameter of recvfrom() of type socklen_t* was read into variable of type socklen_t, that caused zeroing out of upper 4 bytes when running s390x on top of x86_64. This patch changes addrlen type to abi_ulong. Signed-off-by: Pavel Zbitskiy <pavel.zbitskiy@gmail.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2014-01-15linux-user: fixed getsockopt() optlenPavel Zbitskiy1-1/+1
optlen parameter of getsockopt() of type socklen_t* was read into variable of type socklen_t, that caused zeroing out of upper 4 bytes when running s390x on top of x86_64. This patch changes optlen type to abi_ulong. Signed-off-by: Pavel Zbitskiy <pavel.zbitskiy@gmail.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2014-01-15linux-user: fixed s390x clone() argument orderPavel Zbitskiy1-1/+1
It was broken by 4ce6243dc6216e35b5b691078ffa856463bfa8db, where TARGET_CLONE_BACKWARDS was specified instead of TARGET_CLONE_BACKWARDS2. Signed-off-by: Pavel Zbitskiy <pavel.zbitskiy@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2014-01-10linux-user: Remove regs parameter of load_elf_binary and load_flt_binaryWill Newton4-10/+6
The regs parameter is not used anywhere, so remove it. Signed-off-by: Will Newton <will.newton@linaro.org> Reviewed-by: Erik de Castro Lopo <erikd@mega-nerd.com> Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
2014-01-10linux-user: Support the accept4 socketcallAndré Hentschel2-0/+17
Cc: Riku Voipio <riku.voipio@iki.fi> Signed-off-by: André Hentschel <nerv@dawncrow.de> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Erik de Castro Lopo <erikd@mega-nerd.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
2014-01-09Merge remote-tracking branch 'mjt/trivial-patches' into stagingAnthony Liguori1-4/+4
* mjt/trivial-patches: acpi unit-test: Remove temporary disk after test mainstone: Fix duplicate array values for key 'space' pxa27x: Add 'const' attribute to keyboard maps pxa27x: Reduce size of keyboard matrix mapping doc: Mention chardev:id in available devices for -serial configure: Python tests must be done before help message configure: Rewrite code for help message fix -boot strict regressed in commit 6ef4716 vl: make boot_strict variable static (not used outside vl.c) x86: only allow real mode to access 32bit without LMA linux-user: Use macro TARGET_NSIG_WORDS where possible exynos4210: Use macro ARRAY_SIZE where possible ui/cocoa: Use macro ARRAY_SIZE where possible misc: Use macro ARRAY_SIZE where possible openrisc: Fix spelling in comment (transaltion -> translation) hw/arm/highbank: Simplify code (memory region in device state) Message-id: 1388182050-10270-1-git-send-email-mjt@msgid.tls.msk.ru Signed-off-by: Anthony Liguori <aliguori@amazon.com>
2014-01-08linux-user: AArch64: Use correct values for FPSR/FPCR in sigcontextWill Newton1-3/+7
Use the helpers provided for getting the correct FPSR and FPCR values for the signal context. Signed-off-by: Will Newton <will.newton@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
2014-01-08linux-user: AArch64: define TARGET_CLONE_BACKWARDSClaudio Fontana1-0/+1
The AArch64 linux-user support was written before but merged after commit 4ce6243dc621 which cleaned up the handling of the clone() syscall argument order, so we failed to notice that AArch64 also needs TARGET_CLONE_BACKWARDS to be defined. Add this define so that clone and fork syscalls work correctly. Signed-off-by: Claudio Fontana <claudio.fontana@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
2014-01-08target-arm: A64: support for ld/st/cl exclusiveMichael Matz1-3/+124
This implement exclusive loads/stores for aarch64 along the lines of arm32 and ppc implementations. The exclusive load remembers the address and loaded value. The exclusive store throws an an exception which uses those values to check for equality in a proper exclusive region. This is not actually the architecture mandated semantics (for either AArch32 or AArch64) but it is close enough for typical guest code sequences to work correctly, and saves us from having to monitor all guest stores. It's fairly easy to come up with test cases where we don't behave like hardware - we don't for example model cache line behaviour. However in the common patterns this works, and the existing 32 bit ARM exclusive access implementation has the same limitations. AArch64 also implements new acquire/release loads/stores (which may be either exclusive or non-exclusive). These imposes extra ordering constraints on memory operations (ie they act as if they have an implicit barrier built into them). As TCG is single-threaded all our barriers are no-ops, so these just behave like normal loads and stores. Signed-off-by: Michael Matz <matz@suse.de> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
2014-01-08target-arm: Widen exclusive-access support struct fields to 64 bitsPeter Maydell1-10/+15
In preparation for adding support for A64 load/store exclusive instructions, widen the fields in the CPU state struct that deal with address and data values for exclusives from 32 to 64 bits. Although in practice AArch64 and AArch32 exclusive accesses will be generally separate there are some odd theoretical corner cases (eg you should be able to do the exclusive load in AArch32, take an exception to AArch64 and successfully do the store exclusive there), and it's also easier to reason about. The changes in semantics for the variables are: exclusive_addr -> extended to 64 bits; -1ULL for "monitor lost", otherwise always < 2^32 for AArch32 exclusive_val -> extended to 64 bits. 64 bit exclusives in AArch32 now use the high half of exclusive_val instead of a separate exclusive_high exclusive_high -> is no longer used in AArch32; extended to 64 bits as it will be needed for AArch64's pair-of-64-bit-values exclusives. exclusive_test -> extended to 64 bits, as it is an address. Since this is a linux-user-only field, in arm-linux-user it will always have the top 32 bits zero. exclusive_info -> stays 32 bits, as it is neither data nor address, but simply holds register indexes etc. AArch64 will be able to fit all its information into 32 bits as well. Note that the refactoring of gen_store_exclusive() coincidentally fixes a minor bug where ldrexd would incorrectly update the first CPU register even if the load for the second register faulted. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-arm: Widen thread-local register state fields to 64 bitsPeter Maydell3-3/+6
The common pattern for system registers in a 64-bit capable ARM CPU is that when in AArch32 the cp15 register is a view of the bottom 32 bits of the 64-bit AArch64 system register; writes in AArch32 leave the top half unchanged. The most natural way to model this is to have the state field in the CPU struct be a 64 bit value, and simply have the AArch32 TCG code operate on a pointer to its lower half. For aarch64-linux-user the only registers we need to share like this are the thread-local-storage ones. Widen their fields to 64 bits and provide the 64 bit reginfo struct to make them visible in AArch64 state. Note that minor cleanup of the AArch64 system register encoding space means We can share the TPIDR_EL1 reginfo but need split encodings for TPIDR_EL0 and TPIDRRO_EL0. Since we're touching almost every line in QEMU that uses the c13_tls* fields in this patch anyway, we take the opportunity to rename them in line with the standard ARM architectural names for these registers. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
2013-12-23linux-user: Use macro TARGET_NSIG_WORDS where possibleStefan Weil1-4/+4
This improves readability and simplifies the code. Cc: Riku Voipio <riku.voipio@iki.fi> Signed-off-by: Stefan Weil <sw@weilnetz.de> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2013-12-17target-arm: Clean up handling of AArch64 PSTATEPeter Maydell1-2/+4
The env->pstate field is a little odd since it doesn't strictly speaking represent an architectural register. However it's convenient for QEMU to use it to hold the various PSTATE architectural bits in the same format the architecture specifies for SPSR registers (since this is the same format the kernel uses for signal handlers and the KVM register). Add some structure to how we deal with it: * document what env->pstate is * add some #defines for various bits in it * add helpers for reading/writing it taking account of caching of NZCV, and use them where appropriate * reset it on startup Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1385645602-18662-3-git-send-email-peter.maydell@linaro.org Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
2013-12-06Merge remote-tracking branch 'rth/auxv-2' into stagingAnthony Liguori1-27/+8
# By Richard Henderson # Via Richard Henderson * rth/auxv-2: linux-user: Use qemu_getauxval for AT_EXECFD util: Use qemu_getauxval in linux qemu_cache_utils_init tcg-s390: Use qemu_getauxval in query_facilities tcg-arm: Use qemu_getauxval tcg-ppc64: Use qemu_getauxval osdep: Create qemu_getauxval and qemu_init_auxval Message-id: 1385757754-10702-1-git-send-email-rth@twiddle.net Signed-off-by: Anthony Liguori <aliguori@amazon.com>
2013-11-30linux-user: Use qemu_getauxval for AT_EXECFDRichard Henderson1-26/+6
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-11-30util: Use qemu_getauxval in linux qemu_cache_utils_initRichard Henderson1-1/+1
With this we no longer pass down envp, and thus all systems can have the same void prototype. So also eliminate a useless thunk. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-11-30osdep: Create qemu_getauxval and qemu_init_auxvalRichard Henderson1-0/+1
Abstract away dependence on a system implementation of getauxval. Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-11-29linux-user: pass correct parameter to do_shmctl()Petar Jovanovic1-1/+1
Fix shmctl issue by passing correct parameter buf to do_shmctl(). Signed-off-by: Petar Jovanovic <petar.jovanovic@imgtec.com> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
2013-11-29linux-user: create target_structs header to place ipc_perm and shmid_dsPetar Jovanovic20-48/+963
Creating target_structs header in linux-user/$arch/ and making target_ipc_perm and target_shmid_ds its first inhabitants. The struct defintions may/should be further fine-tuned by arch maintainers. Signed-off-by: Petar Jovanovic <petar.jovanovic@imgtec.com> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
2013-11-29flatload: fix non-GOT relocationsCorey J. Boyle1-1/+1
Use target address rather than host address when performing non-GOT relocations Signed-off-by: Corey J. Boyle <corey@kansanian.com> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
2013-11-29linux-user: Implement handling of 5 POSIX timer syscalls.Erik de Castro Lopo1-0/+176
Implement timer_create, timer_settime, timer_gettime, timer_getoverrun and timer_delete. Signed-off-by: Erik de Castro Lopo <erikd@mega-nerd.com> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
2013-11-29linux-user: Add target struct defs needed for POSIX timer syscalls.Erik de Castro Lopo1-0/+25
Signed-off-by: Erik de Castro Lopo <erikd@mega-nerd.com> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
2013-11-07linux-user: Fix stat64 syscall for SPARC64Stefan Weil2-3/+17
Some targets use a stat64 structure for the stat64 syscall while others use a stat structure. SPARC64 used the wrong kind. Instead of extending the conditional compilation in syscall.c, now a macro TARGET_HAS_STRUCT_STAT64 is defined whenever a target has a target_stat64. Signed-off-by: Stefan Weil <sw@weilnetz.de> Reviewed-by: Erik de Castro Lopo <erikd@mega-nerd.com>
2013-10-07cpu: Drop cpu_model_str from CPU_COMMONAndreas Färber1-2/+2
Since this is only read in cpu_copy() and linux-user has a global cpu_model, drop the field from generic code. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-10-07cpu: Move cpu_copy() into linux-userAndreas Färber1-0/+31
It is only used there and is deemed very fragile if not incorrect in its current memcpy() form. Moving it into linux-user will allow to move parts into target_cpu.h headers and only copy what the ABI mandates. Signed-off-by: Andreas Färber <afaerber@suse.de>
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