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2021-03-24linux-user/riscv: initialise the TaskState heap/stack infoAlex Bennée1-0/+5
Arguably the target_cpu_copy_regs function for each architecture is misnamed as a number of the architectures also take the opportunity to fill out the TaskState structure. This could arguably be factored out into common code but that would require a wider audit of the architectures. For now just replicate for riscv so we can correctly report semihosting information for SYS_HEAPINFO. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Acked-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20210323165308.15244-9-alex.bennee@linaro.org>
2021-03-10semihosting: Move include/hw/semihosting/ -> include/semihosting/Philippe Mathieu-Daudé1-1/+1
We want to move the semihosting code out of hw/ in the next patch. This patch contains the mechanical steps, created using: $ git mv include/hw/semihosting/ include/ $ sed -i s,hw/semihosting,semihosting, $(git grep -l hw/semihosting) Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20210226131356.3964782-2-f4bug@amsat.org> Message-Id: <20210305135451.15427-2-alex.bennee@linaro.org>
2021-01-18riscv: Add semihosting support for user modeKito Cheng1-0/+5
This could made testing more easier and ARM/AArch64 has supported on their linux user mode too, so I think it should be reasonable. Verified GCC testsuite with newlib/semihosting. Signed-off-by: Kito Cheng <kito.cheng@sifive.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Keith Packard <keithp@keithp.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210107170717.2098982-7-keithp@keithp.com> Message-Id: <20210108224256.2321-18-alex.bennee@linaro.org>
2020-10-26linux-user: update syscall_nr.h to Linux 5.9-rc7Laurent Vivier2-2/+14
Update gensyscalls.sh not to generate an empty line at the end of the file And then automatically update syscall_nr.h running scripts/gensyscalls.sh Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200930003033.554124-2-laurent@vivier.eu> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-08-27linux-user: Add generic 'termbits.h' for some archsFilip Bozuta1-227/+1
This patch introduces a generic 'termbits.h' file for following archs: 'aarch64', 'arm', 'i386, 'm68k', 'microblaze', 'nios2', 'openrisc', 'riscv', 's390x', 'x86_64'. Since all of these archs have the same termios flag values and same ioctl_tty numbers, there is no need for a separate 'termbits.h' file for each one of them. For that reason one generic 'termbits.h' file was added for all of them and an '#include' directive was added for this generic file in every arch 'termbits.h' file. Also, some of the flag values that were missing were added in this generic file so that it matches the generic 'termibts.h' and 'ioctls.h' files from the kernel: 'asm-generic/termbits.h' and 'asm-generic/ioctls.h'. Signed-off-by: Filip Bozuta <Filip.Bozuta@syrmia.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20200723210233.349690-2-Filip.Bozuta@syrmia.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-08-27linux-user: Add strace support for printing arguments of syscalls used to ↵Filip Bozuta1-2/+3
lock and unlock memory This patch implements strace argument printing functionality for following syscalls: * mlock, munlock, mlockall, munlockall - lock and unlock memory int mlock(const void *addr, size_t len) int munlock(const void *addr, size_t len) int mlockall(int flags) int munlockall(void) man page: https://man7.org/linux/man-pages/man2/mlock.2.html Implementation notes: Syscall mlockall() takes an argument that is composed of predefined values which represent flags that determine the type of locking operation that is to be performed. For that reason, a printing function "print_mlockall" was stated in file "strace.list". This printing function uses an already existing function "print_flags()" to print the "flags" argument. These flags are stated inside an array "mlockall_flags" that contains values of type "struct flags". These values are instantiated using an existing macro "FLAG_TARGET()" that crates aproppriate target flag values based on those defined in files '/target_syscall.h'. These target flag values were changed from "TARGET_MLOCKALL_MCL*" to "TARGET_MCL_*" so that they can be aproppriately set and recognised in "strace.c" with "FLAG_TARGET()". Value for "MCL_ONFAULT" was added in this patch. This value was also added in "syscall.c" in function "target_to_host_mlockall_arg()". Because this flag value was added in kernel version 4.4, it is enwrapped in an #ifdef directive (both in "syscall.c" and in "strace.c") as to support older kernel versions. The other syscalls have only primitive argument types, so the rest of the implementation was handled by stating an appropriate printing format in file "strace.list". Syscall mlock2() is not implemented in "syscall.c" and thus it's argument printing is not implemented in this patch. Signed-off-by: Filip Bozuta <Filip.Bozuta@syrmia.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20200811164553.27713-4-Filip.Bozuta@syrmia.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-04-29linux-user/riscv: fix up struct target_ucontext definitionLIU Zhiwei1-1/+2
As struct target_ucontext will be transfered to signal handler, it must keep pace with struct ucontext_t defined in Linux kernel. Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20200412020830.607-1-zhiwei_liu@c-sky.com Message-Id: <20200412020830.607-1-zhiwei_liu@c-sky.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2020-03-20linux-user/riscv: Update the syscall_nr's to the 5.5 kernelAlistair Francis3-292/+598
Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <8e512fa2dc885aafc4d9c4013ee033442827a4a0.1584051142.git.alistair.francis@wdc.com> [lv: guard sys_futex with TARGET_NR_exit] Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-11-06linux-user: Introduce cpu_clone_regs_parentRichard Henderson1-0/+4
We will need a target-specific hook for adjusting registers in the parent during clone. Add an empty inline function for each target, and invoke it from the proper places. Reviewed-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20191106113318.10226-11-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-11-06linux-user: Rename cpu_clone_regs to cpu_clone_regs_childRichard Henderson1-1/+2
We will need a target-specific hook for adjusting registers in the parent during clone. To avoid confusion, rename the one we have to make it clear it affects the child. At the same time, pass in the flags from the clone syscall. We will need them for correct behaviour for Sparc. Reviewed-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20191106113318.10226-10-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-10-28linux-user/riscv: Propagate fault addressGiuseppe Musacchio1-1/+2
The CPU loop tagged all the queued signals as QEMU_SI_KILL while it was filling the `_sigfault` part of `siginfo`: this caused QEMU to copy the wrong fields over to the userspace program. Make sure the fault address recorded by the MMU is is stored in the CPU environment structure. In case of memory faults store the exception address into `siginfo`. Signed-off-by: Giuseppe Musacchio <thatlemon@gmail.com> Reviewed-by: Palmer Dabbelt <palmer@sifive.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2019-06-25RISC-V: Update syscall list for 32-bit support.Jim Wilson1-1/+14
32-bit RISC-V uses _llseek instead of lseek as syscall number 62. Update syscall list from open-embedded build, primarily because 32-bit RISC-V requires statx support. Tested with cross gcc testsuite runs for rv32 and rv64, with the pending statx patch also applied. Signed-off-by: Jim Wilson <jimw@sifive.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2019-06-12Supply missing header guardsMarkus Armbruster3-0/+15
Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20190604181618.19980-5-armbru@redhat.com>
2019-06-12Include qemu-common.h exactly where neededMarkus Armbruster1-0/+1
No header includes qemu-common.h after this commit, as prescribed by qemu-common.h's file comment. Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20190523143508.25387-5-armbru@redhat.com> [Rebased with conflicts resolved automatically, except for include/hw/arm/xlnx-zynqmp.h hw/arm/nrf51_soc.c hw/arm/msf2-soc.c block/qcow2-refcount.c block/qcow2-cluster.c block/qcow2-cache.c target/arm/cpu.h target/lm32/cpu.h target/m68k/cpu.h target/mips/cpu.h target/moxie/cpu.h target/nios2/cpu.h target/openrisc/cpu.h target/riscv/cpu.h target/tilegx/cpu.h target/tricore/cpu.h target/unicore32/cpu.h target/xtensa/cpu.h; bsd-user/main.c and net/tap-bsd.c fixed up]
2019-06-10target/riscv: Use env_cpu, env_archcpuRichard Henderson1-1/+1
Cleanup in the boilerplate that each target must define. Replace riscv_env_get_cpu with env_archcpu. The combination CPU(riscv_env_get_cpu) should have used ENV_GET_CPU to begin; use env_cpu now. Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2019-06-10cpu: Replace ENV_GET_CPU with env_cpuRichard Henderson1-1/+1
Now that we have both ArchCPU and CPUArchState, we can define this generically instead of via macro in each target's cpu.h. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2019-05-24linux-user/riscv: Add the CPU type as a commentAlistair Francis1-0/+1
Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2019-05-13linux-user/nios2 linux-user/riscv: Clean up header guardsMarkus Armbruster3-7/+7
Reuse of the same guard symbol in multiple headers is okay as long as they cannot be included together. scripts/clean-header-guards.pl can't tell, so it warns. Since we can avoid guard symbol reuse easily, do so: use guard symbol ${target^^}_${fname^^} for linux-user/$target/$fname, just like we did in commit a9c94277f0..3500385697. Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20190315145123.28030-4-armbru@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-03-19RISC-V: linux-user support for RVE ABIKito Cheng1-1/+14
This change checks elf_flags for EF_RISCV_RVE and if present uses the RVE linux syscall ABI which uses t0 for the syscall number instead of a7. Warn and exit if a non-RVE ABI binary is run on a cpu with the RVE extension as it is incompatible. Cc: Palmer Dabbelt <palmer@sifive.com> Cc: Sagar Karandikar <sagark@eecs.berkeley.edu> Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Cc: Alistair Francis <Alistair.Francis@wdc.com> Co-authored-by: Kito Cheng <kito.cheng@gmail.com> Co-authored-by: Michael Clark <mjc@sifive.com> Signed-off-by: Michael Clark <mjc@sifive.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2019-02-11RISC-V: Use riscv prefix consistently on cpu helpersMichael Clark1-2/+2
* Add riscv prefix to raise_exception function * Add riscv prefix to CSR read/write functions * Add riscv prefix to signal handler function * Add riscv prefix to get fflags function * Remove redundant declaration of riscv_cpu_init and rename cpu_riscv_init to riscv_cpu_init * rename riscv_set_mode to riscv_cpu_set_mode Signed-off-by: Michael Clark <mjc@sifive.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2018-11-12linux-user: Don't call gdb_handlesig() before queue_signal()Peter Maydell1-1/+1
The CPU main-loop routines for linux-user generally call gdb_handlesig() when they're about to queue a SIGTRAP signal. This is wrong, because queue_signal() will cause us to pend a signal, and process_pending_signals() will then call gdb_handlesig() itself. So the effect is that we notify gdb of the SIGTRAP, and then if gdb says "OK, continue with signal X" we will incorrectly notify gdb of the signal X as well. We don't do this double-notify for anything else, only SIGTRAP. Remove this unnecessary and incorrect code from all the targets except for nios2 (whose main loop is doing something different and broken, and will be handled in a separate patch). This bug only manifests if the user responds to the reported SIGTRAP using "signal SIGFOO" rather than "continue"; since the latter is the overwhelmingly common thing to do after a breakpoint most people won't have hit this. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20181019174958.26616-2-peter.maydell@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2018-06-04linux-user: move generic signal definitions to generic/signal.hLaurent Vivier1-0/+2
No code change. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20180529194207.31503-10-laurent@vivier.eu>
2018-06-04linux-user: move get_sp_from_cpustate() to target_cpu.hLaurent Vivier3-7/+4
Remove useless includes Fix HPPA include guard. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Acked-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20180529194207.31503-9-laurent@vivier.eu>
2018-06-04linux-user: move generic fcntl definitions to generic/fcntl.hLaurent Vivier1-0/+11
add a per target target_fcntl.h and include the generic one from them No code change. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20180529194207.31503-2-laurent@vivier.eu>
2018-05-25linux-user: move socket.h generic definitions to generic/sockbits.hLaurent Vivier1-0/+1
and include the file from architectures without specific definitions Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20180519092956.15134-5-laurent@vivier.eu>
2018-05-03linux-user: introduce target_sigsp() and target_save_altstack()Laurent Vivier1-19/+9
Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20180411192347.30228-1-laurent@vivier.eu>
2018-04-30linux-user: move riscv cpu loop to riscv directoryLaurent Vivier1-0/+92
No code change, only move code from main.c to riscv/cpu_loop.c. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Michael Clark <mjc@sifive.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20180411185651.21351-18-laurent@vivier.eu>
2018-04-30linux-user: create a dummy per arch cpu_loop.cLaurent Vivier1-0/+26
Create a cpu_loop-common.h for future use by these new files and use it in the existing main.c Introduce target_cpu_copy_regs(): declare the function in cpu_loop-common.h and an empty function for each target, to move all the cpu_loop prologues to this function. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20180411185651.21351-2-laurent@vivier.eu>
2018-04-30linux-user: define TARGET_ARCH_HAS_SETUP_FRAMELaurent Vivier1-4/+0
Instead of calling setup_frame() conditionally to a list of known targets, define TARGET_ARCH_HAS_SETUP_FRAME if the target provides the function and call it only if the macro is defined. Move declarations of setup_frame() and setup_rt_frame() to linux-user/signal-common.h Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20180424192635.6027-21-laurent@vivier.eu>
2018-04-30linux-user: move riscv signal.c parts to riscv directoryLaurent Vivier2-0/+203
No code change, only move code from signal.c to riscv/signal.c, except adding includes and exporting setup_rt_frame(). Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20180424192635.6027-14-laurent@vivier.eu>
2018-04-30linux-user: create a dummy per arch signal.cLaurent Vivier1-0/+18
Create a signal-common.h for future use by these new files and use it in the existing signal.c Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20180424192635.6027-2-laurent@vivier.eu>
2018-04-30linux-user: set minimum uname for RISC-VAlex Bennée1-1/+1
As support for RISC-V was only merged into the mainline kernel at 4.15 it is unlikely that glibc will be happy with a reported kernel version of 3.8.0. Indeed when I testing binaries created by the current Debian Sid compiler the tests failed with: FATAL: kernel too old Bump the version to the minimum a RISC-V glibc would expect: https://sourceware.org/git/?p=glibc.git;a=blob;f=sysdeps/unix/sysv/linux/riscv/configure.ac Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Palmer Dabbelt <palmer@sifive.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20180425100218.24785-1-alex.bennee@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2018-03-07RISC-V Linux User EmulationMichael Clark7-0/+666
Implementation of linux user emulation for RISC-V. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Sagar Karandikar <sagark@eecs.berkeley.edu> Signed-off-by: Michael Clark <mjc@sifive.com>
generated by cgit v1.1 at 2024-08-19 00:29:02 +0000