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2021-11-02target/arm: Implement arm_cpu_record_sigbusRichard Henderson1-4/+26
Because of the complexity of setting ESR, re-use the existing arm_cpu_do_unaligned_access function. This means we have to handle the exception ourselves in cpu_loop, transforming it to the appropriate signal. Reviewed-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-10-01linux-user/arm: Implement setup_sigtrampRichard Henderson2-71/+110
Mirror what the kernel does in arch/arm/kernel/signal.h, using the old sigframe struct in the rt sigframe struct. Update the trampoline code to match the kernel: this uses sp-relative accesses rather than pc-relative. Copy the code into frame->retcode from the trampoline page. This minimises the different cases wrt arm vs thumb vs fdpic. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20210929130553.121567-6-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-10-01linux-user/arm: Drop "_v2" from symbols in signal.cRichard Henderson1-70/+45
Since we no longer support "v1", there's no need to distinguish "v2". Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210929130553.121567-5-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-10-01linux-user/arm: Drop v1 signal framesRichard Henderson1-216/+4
Version 2 signal frames are used from 2.6.12 and since cbc14e6f286, we have set UNAME_MINIMUM_RELEASE to 2.6.32. Suggested-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210929130553.121567-4-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-09-23linux-user/arm: Use force_sig_fault()Peter Maydell1-38/+15
Use the new force_sig_fault() function instead of setting up a target_siginfo_t and calling queue_signal(). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210813131809.28655-7-peter.maydell@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-09-23linux-user/arm: Use force_sig() to deliver fpa11 emulation SIGFPEPeter Maydell1-7/+4
In the Arm target code, when the fpa11 emulation code tells us we need to send the guest a SIGFPE, we do this with queue_signal(), but we are using the wrong si_type, and we aren't setting the _sifields union members corresponding to either the si_type we are using or the si_type we should be using. As the existing comment notes, the kernel code for this calls the old send_sig() function to deliver the signal. This eventually results in the kernel's signal handling code fabricating a siginfo_t with a SI_KERNEL code and a zero pid and uid. For QEMU this means we need to use QEMU_SI_KILL. We already have a function for that: force_sig() sets up the whole target_siginfo_t the way we need it. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210813131809.28655-4-peter.maydell@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-09-23linux-user/arm: Set siginfo_t addr field for SIGTRAP signalsPeter Maydell1-0/+1
When generating a TRAP_BRKPT SIGTRAP, set the siginfo_t addr field to the PC where the breakpoint/singlestep trap occurred; this is what the kernel does for this signal for this architecture. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210813131809.28655-3-peter.maydell@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-09-13linux-user: Split linux-user internals out of qemu.hPeter Maydell2-0/+2
qemu.h is included in various non-linux-user files (which mostly want the TaskState struct and the functions for doing usermode access to guest addresses like lock_user(), unlock_user(), get_user*(), etc). Split out the parts that are only used in linux-user itself into a new user-internals.h. This leaves qemu.h with basically three things: * the definition of the TaskState struct * the user-access functions and macros * do_brk() all of which are needed by code outside linux-user that includes qemu.h. The addition of all the extra #include lines was done with sed -i '/include.*qemu\.h/a #include "user-internals.h"' $(git grep -l 'include.*qemu\.h' linux-user) (and then undoing the change to fpa11.h). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210908154405.15417-8-peter.maydell@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-09-13linux-user: Split signal-related prototypes into signal-common.hPeter Maydell1-0/+1
Split the signal related prototypes into the existing header file signal-common.h, and include it in those places that now require it. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210908154405.15417-4-peter.maydell@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-08-26target/arm: Do hflags rebuild in cpsr_write()Peter Maydell1-2/+0
Currently we rely on all the callsites of cpsr_write() to rebuild the cached hflags if they change one of the CPSR bits which we use as a TB flag and cache in hflags. This is a bit awkward when we want to change the set of CPSR bits that we cache, because it means we need to re-audit all the cpsr_write() callsites to see which flags they are writing and whether they now need to rebuild the hflags. Switch instead to making cpsr_write() call arm_rebuild_hflags() itself if one of the bits being changed is a cached bit. We don't do the rebuild for the CPSRWriteRaw write type, because that kind of write is generally doing something special anyway. For the CPSRWriteRaw callsites in the KVM code and inbound migration we definitely don't want to recalculate the hflags; the callsites in boot.c and arm-powerctl.c have to do a rebuild-hflags call themselves anyway because of other CPU state changes they make. This allows us to drop explicit arm_rebuild_hflags() calls in a couple of places where the only reason we needed to call it was the CPSR write. This fixes a bug where we were incorrectly failing to rebuild hflags in the code path for a gdbstub write to CPSR, which meant that you could make QEMU assert by breaking into a running guest, altering the CPSR to change the value of, for example, CPSR.E, and then continuing. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210817201843.3829-1-peter.maydell@linaro.org
2021-07-13linux-user: update syscall.tbl to Linux v5.13Laurent Vivier1-0/+7
Updated running scripts/update-syscalltbl.sh Signed-off-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20210708215756.268805-4-laurent@vivier.eu> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-07-12linux-user: Extract target errno to 'target_errno_defs.h'Philippe Mathieu-Daudé1-0/+7
We want to access the target errno indepently of the rest of the linux-user code. Move the header containing the generic errno definitions ('errno_defs.h') to 'generic/target_errno_defs.h', create a new 'target_errno_defs.h' in each target which itself includes 'generic/target_errno_defs.h'. Suggested-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210708170550.1846343-4-f4bug@amsat.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-06-03softfloat: Introduce Floatx80RoundPrecRichard Henderson1-20/+21
Use an enumeration instead of raw 32/64/80 values. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-05-15linux-user: Pass CPUArchState to target_restore_altstackRichard Henderson1-2/+2
In most cases we were already passing get_sp_from_cpustate directly to the function. In other cases, we were passing a local variable which already contained the same value. In the rest of the cases, we were passing the stack pointer out of env directly. Reviewed by: Warner Losh <imp@bsdimp.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210426025334.1168495-5-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-05-15linux-user: Use target_restore_altstack in all sigreturnRichard Henderson1-7/+2
Note that target_restore_altstack uses the host memory pointer that we have already verified, so TARGET_EFAULT is not a possible return value. Note that using -EFAULT was a bug. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210426025334.1168495-3-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-05-15linux-user/arm: Simplify accumulating and raising fpa11 exceptionsRichard Henderson1-32/+18
Use bit masking instead of an if tree. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20210423165413.338259-5-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-05-15linux-user/arm: Do not fill in si_code for fpa11 exceptionsRichard Henderson1-20/+6
There is no such decoding in linux/arch/arm/nwfpe/fpmodule.c. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20210423165413.338259-4-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-05-15linux-user/arm: Do not emulate fpa11 in thumb modeRichard Henderson1-1/+1
These antiquated instructions are arm-mode only. Buglink: https://bugs.launchpad.net/bugs/1925512 Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20210423165413.338259-3-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-05-15linux-user/arm: Split out emulate_arm_fpa11Richard Henderson1-59/+94
Pull out the fpa11 emulation to a helper function. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20210423165413.338259-2-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-03-10semihosting: Move include/hw/semihosting/ -> include/semihosting/Philippe Mathieu-Daudé1-1/+1
We want to move the semihosting code out of hw/ in the next patch. This patch contains the mechanical steps, created using: $ git mv include/hw/semihosting/ include/ $ sed -i s,hw/semihosting,semihosting, $(git grep -l hw/semihosting) Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20210226131356.3964782-2-f4bug@amsat.org> Message-Id: <20210305135451.15427-2-alex.bennee@linaro.org>
2021-01-18semihosting: Change common-semi API to be architecture-independentKeith Packard1-1/+2
The public API is now defined in hw/semihosting/common-semi.h. do_common_semihosting takes CPUState * instead of CPUARMState *. All internal functions have been renamed common_semi_ instead of arm_semi_ or arm_. Aside from the API change, there are no functional changes in this patch. Signed-off-by: Keith Packard <keithp@keithp.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20210107170717.2098982-3-keithp@keithp.com> Message-Id: <20210108224256.2321-14-alex.bennee@linaro.org>
2021-01-18semihosting: Move ARM semihosting code to shared directoriesKeith Packard2-79/+0
This commit renames two files which provide ARM semihosting support so that they can be shared by other architectures: 1. target/arm/arm-semi.c -> hw/semihosting/common-semi.c 2. linux-user/arm/semihost.c -> linux-user/semihost.c The build system was modified use a new config variable, CONFIG_ARM_COMPATIBLE_SEMIHOSTING, which has been added to the ARM softmmu and linux-user default configs. The contents of the source files has not been changed in this patch. Signed-off-by: Keith Packard <keithp@keithp.com> [AJB: rename arm-compat-semi, select SEMIHOSTING] Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20210107170717.2098982-2-keithp@keithp.com> Message-Id: <20210108224256.2321-13-alex.bennee@linaro.org>
2020-11-23linux-user/arm: Deliver SIGTRAP for UDF patterns used as breakpointsPeter Maydell1-0/+28
The Linux kernel doesn't use the official bkpt insn for breakpoints; instead it uses three instructions in the guaranteed-to-UNDEF space, and generates SIGTRAP for these rather than the SIGILL that most UNDEF insns generate: https://elixir.bootlin.com/linux/v5.9.8/source/arch/arm/kernel/ptrace.c#L197 Make QEMU treat these insns specially too. The main benefit of this is that if you're running a debugger on a guest program that runs into a GCC __builtin_trap() or LLVM "trap because execution should never reach here" then you'll get the expected signal rather than a SIGILL. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20201117155634.6924-1-peter.maydell@linaro.org
2020-11-15linux user: Fix Lesser GPL version numberChetan Pant2-2/+2
There is no "version 2" of the "Lesser" General Public License. It is either "GPL version 2.0" or "Lesser GPL version 2.1". This patch replaces all occurrences of "Lesser GPL version 2" with "Lesser GPL version 2.1" in comment section. Signed-off-by: Chetan Pant <chetan4windows@gmail.com> Message-Id: <20201023122455.19417-1-chetan4windows@gmail.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2020-11-11linux-user: Correct definition of stack_tLemonBoy1-3/+3
Some platforms used the wrong definition of stack_t where the flags and size fields were swapped or where the flags field had type ulong instead of int. Due to the presence of padding space in the structure and the prevalence of little-endian machines this problem went unnoticed for a long time. The type definitions have been cross-checked with the ones defined in the Linux kernel v5.9, plus some older versions for a few architecture that have been removed and Xilinx's kernel fork for NiosII [1]. The bsd-user headers remain unchanged as I don't know if they are wrong or not. [1] https://github.com/Xilinx/linux-xlnx/blob/master/arch/nios2/include/uapi/asm/signal.h Signed-off-by: Giuseppe Musacchio <thatlemon@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <e9d47692-ee92-009f-6007-0abc3f502b97@gmail.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-10-26linux-user: update syscall.tbl to Linux 5.9-rc7Laurent Vivier1-1/+3
Updated running scripts/update-syscalltbl.sh Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200930003033.554124-4-laurent@vivier.eu> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-08-27linux-user: Add generic 'termbits.h' for some archsFilip Bozuta1-222/+1
This patch introduces a generic 'termbits.h' file for following archs: 'aarch64', 'arm', 'i386, 'm68k', 'microblaze', 'nios2', 'openrisc', 'riscv', 's390x', 'x86_64'. Since all of these archs have the same termios flag values and same ioctl_tty numbers, there is no need for a separate 'termbits.h' file for each one of them. For that reason one generic 'termbits.h' file was added for all of them and an '#include' directive was added for this generic file in every arch 'termbits.h' file. Also, some of the flag values that were missing were added in this generic file so that it matches the generic 'termibts.h' and 'ioctls.h' files from the kernel: 'asm-generic/termbits.h' and 'asm-generic/ioctls.h'. Signed-off-by: Filip Bozuta <Filip.Bozuta@syrmia.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20200723210233.349690-2-Filip.Bozuta@syrmia.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-08-27linux-user: Add strace support for printing arguments of syscalls used to ↵Filip Bozuta1-2/+4
lock and unlock memory This patch implements strace argument printing functionality for following syscalls: * mlock, munlock, mlockall, munlockall - lock and unlock memory int mlock(const void *addr, size_t len) int munlock(const void *addr, size_t len) int mlockall(int flags) int munlockall(void) man page: https://man7.org/linux/man-pages/man2/mlock.2.html Implementation notes: Syscall mlockall() takes an argument that is composed of predefined values which represent flags that determine the type of locking operation that is to be performed. For that reason, a printing function "print_mlockall" was stated in file "strace.list". This printing function uses an already existing function "print_flags()" to print the "flags" argument. These flags are stated inside an array "mlockall_flags" that contains values of type "struct flags". These values are instantiated using an existing macro "FLAG_TARGET()" that crates aproppriate target flag values based on those defined in files '/target_syscall.h'. These target flag values were changed from "TARGET_MLOCKALL_MCL*" to "TARGET_MCL_*" so that they can be aproppriately set and recognised in "strace.c" with "FLAG_TARGET()". Value for "MCL_ONFAULT" was added in this patch. This value was also added in "syscall.c" in function "target_to_host_mlockall_arg()". Because this flag value was added in kernel version 4.4, it is enwrapped in an #ifdef directive (both in "syscall.c" and in "strace.c") as to support older kernel versions. The other syscalls have only primitive argument types, so the rest of the implementation was handled by stating an appropriate printing format in file "strace.list". Syscall mlock2() is not implemented in "syscall.c" and thus it's argument printing is not implemented in this patch. Signed-off-by: Filip Bozuta <Filip.Bozuta@syrmia.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20200811164553.27713-4-Filip.Bozuta@syrmia.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-08-21meson: linux-userMarc-André Lureau4-10/+20
The most interesting or most complicated part here is the syscall_nr.h generators. In order to keep the generation logic all in meson.build, I am adding to config_target the name of the .tbl file, and making the generated file syscall<SUFFIX>_nr.h for input file syscall<SUFFIX>.tbl. For architectures where the input file is not named syscall_nr.tbl, syscall_nr.h has to be a source file; it's just a forwarder for x86 (i386/x86_64), while for MIPS64 it chooses between N32 and N64 ABIs. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-05-21linux-user/arm/signal.c: Drop TARGET_CONFIG_CPU_32Peter Maydell1-6/+0
The Arm signal-handling code has some parts ifdeffed with a TARGET_CONFIG_CPU_32, which is always defined. This is a leftover from when this code's structure was based on the Linux kernel signal handling code, where it was intended to support 26-bit Arm CPUs. The kernel dropped its CONFIG_CPU_32 in kernel commit 4da8b8208eded0ba21e3 in 2009. QEMU has never had 26-bit CPU support and is unlikely to ever add it; we certainly aren't going to support 26-bit Linux binaries via linux-user mode. The ifdef is just unhelpful noise, so remove it entirely. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200518143014.20689-1-peter.maydell@linaro.org
2020-05-21linux-user/arm: Reset CPSR_E when entering a signal handlerAmanieu d'Antras1-1/+7
This fixes signal handlers running with the wrong endianness if the interrupted code used SETEND to dynamically switch endianness. Signed-off-by: Amanieu d'Antras <amanieu@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20200511131117.2486486-1-amanieu@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-05-21target/arm: Allow user-mode code to write CPSR.E via MSRPeter Maydell1-0/+1
Using the MSR instruction to write to CPSR.E is deprecated, but it is required to work from any mode including unprivileged code. We were incorrectly forbidding usermode code from writing it because CPSR_USER did not include the CPSR_E bit. We use CPSR_USER in only three places: * as the mask of what to allow userspace MSR to write to CPSR * when deciding what bits a linux-user signal-return should be able to write from the sigcontext structure * in target_user_copy_regs() when we set up the initial registers for the linux-user process In the first two cases not being able to update CPSR.E is a bug, and in the third case it doesn't matter because CPSR.E is always 0 there. So we can fix both bugs by adding CPSR_E to CPSR_USER. Because the cpsr_write() in restore_sigcontext() is now changing a CPSR bit which is cached in hflags, we need to add an arm_rebuild_hflags() call there; the callsite in target_user_copy_regs() was already rebuilding hflags for other reasons. (The recommended way to change CPSR.E is to use the 'SETEND' instruction, which we do correctly allow from usermode code.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200518142801.20503-1-peter.maydell@linaro.org
2020-05-21linux-user/arm: Fix identification of syscall numbersPeter Maydell1-66/+77
Our code to identify syscall numbers has some issues: * for Thumb mode, we never need the immediate value from the insn, but we always read it anyway * bad immediate values in the svc insn should cause a SIGILL, but we were abort()ing instead (via "goto error") We can fix both these things by refactoring the code that identifies the syscall number to more closely follow the kernel COMPAT_OABI code: * for Thumb it is always r7 * for Arm, if the immediate value is 0, then this is an EABI call with the syscall number in r7 * otherwise, we XOR the immediate value with 0x900000 (ARM_SYSCALL_BASE for QEMU; __NR_OABI_SYSCALL_BASE in the kernel), which converts valid syscall immediates into the desired value, and puts all invalid immediates in the range 0x100000 or above * then we can just let the existing "value too large, deliver SIGILL" case handle invalid numbers, and drop the 'goto error' Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 20200420212206.12776-5-peter.maydell@linaro.org
2020-05-21linux-user/arm: Handle invalid arm-specific syscalls correctlyPeter Maydell1-4/+26
The kernel has different handling for syscalls with invalid numbers that are in the "arm-specific" range 0x9f0000 and up: * 0x9f0000..0x9f07ff return -ENOSYS if not implemented * other out of range syscalls cause a SIGILL (see the kernel's arch/arm/kernel/traps.c:arm_syscall()) Implement this distinction. (Note that our code doesn't look quite like the kernel's, because we have removed the 0x900000 prefix by this point, whereas the kernel retains it in arm_syscall().) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20200420212206.12776-4-peter.maydell@linaro.org
2020-05-21linux-user/arm: Remove bogus SVC 0xf0002 handlingPeter Maydell1-3/+1
We incorrectly treat SVC 0xf0002 as a cacheflush request (which is a NOP for QEMU). This is the wrong syscall number, because in the svc-immediate OABI syscall numbers are all offset by the ARM_SYSCALL_BASE value and so the correct insn is SVC 0x9f0002. (This is handled further down in the code with the other Arm-specific syscalls like NR_breakpoint.) When this code was initially added in commit 6f1f31c069b20611 in 2004, ARM_NR_cacheflush was defined as (ARM_SYSCALL_BASE + 0xf0000 + 2) so the value in the comparison took account of the extra 0x900000 offset. In commit fbb4a2e371f2fa7 in 2008, the ARM_SYSCALL_BASE was removed from the definition of ARM_NR_cacheflush and handling for this group of syscalls was added below the point where we subtract ARM_SYSCALL_BASE from the SVC immediate value. However that commit forgot to remove the now-obsolete earlier handling code. Remove the spurious ARM_NR_cacheflush condition. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 20200420212206.12776-3-peter.maydell@linaro.org
2020-05-21linux-user/arm: BKPT should cause SIGTRAP, not be a syscallPeter Maydell1-22/+8
In linux-user/arm/cpu-loop.c we incorrectly treat EXCP_BKPT similarly to EXCP_SWI, which means that if the guest executes a BKPT insn then QEMU will perform a syscall for it (which syscall depends on what value happens to be in r7...). The correct behaviour is that the guest process should take a SIGTRAP. This code has been like this (more or less) since commit 06c949e62a098f in 2006 which added BKPT in the first place. This is probably because at the time the same code path was used to handle both Linux syscalls and semihosting calls, and (on M profile) BKPT with a suitable magic number is used for semihosting calls. But these days we've moved handling of semihosting out to an entirely different codepath, so we can fix this bug by simply removing this handling of EXCP_BKPT and instead making it deliver a SIGTRAP like EXCP_DEBUG (as we do already on aarch64). Reported-by: <omerg681@gmail.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20200420212206.12776-2-peter.maydell@linaro.org Fixes: https://bugs.launchpad.net/qemu/+bug/1873898 Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-03-20linux-user: update syscall.tbl from linux 0bf999f9c5e7Laurent Vivier1-0/+2
Run scripts/update-syscalltbl.sh with linux commit 0bf999f9c5e7 Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Taylor Simpson <tsimpson@quicinc.com> Message-Id: <20200310103403.3284090-20-laurent@vivier.eu> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-03-20linux-user, arm: add syscall table generation supportLaurent Vivier4-447/+490
Copy syscall.tbl and syscallhdr.sh from linux/arch/arm/tools/syscalls v5.5 Update syscallhdr.sh to generate QEMU syscall_nr.h Update syscall.c to manage TARGET_NR_arm_sync_file_range as it has replaced TARGET_NR_sync_file_range2 Move existing stuff from linux-user/Makefile.objs to linux-user/arm/Makefile.objs Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200310103403.3284090-9-laurent@vivier.eu> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-02-28target/arm: Add isar_feature_aa32_vfp_simdRichard Henderson1-2/+2
Use this in the places that were checking ARM_FEATURE_VFP, and are obviously testing for the existance of the register set as opposed to testing for some particular instruction extension. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20200224222232.13807-2-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-02-19linux-user: Use `qemu_log' for non-strace loggingJosh Kunz1-2/+3
Since most calls to `gemu_log` are actually logging unimplemented features, this change replaces most non-strace calls to `gemu_log` with calls to `qemu_log_mask(LOG_UNIMP, ...)`. This allows the user to easily log to a file, and to mask out these log messages if they desire. Note: This change is slightly backwards incompatible, since now these "unimplemented" log messages will not be logged by default. Signed-off-by: Josh Kunz <jkz@google.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20200204025416.111409-2-jkz@google.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-02-17linux-user: arm: Update syscall numbers to kernel 5.5 levelAleksandar Markovic1-0/+44
Update arm syscall numbers based on Linux kernel v5.5. CC: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <1581596954-2305-3-git-send-email-aleksandar.markovic@rt-rk.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-01-09semihosting: add qemu_semihosting_console_inc for SYS_READCKeith Packard1-0/+27
Provides a blocking call to read a character from the console using semihosting.chardev, if specified. This takes some careful command line options to use stdio successfully as the serial ports, monitor and semihost all want to use stdio. Here's a sample set of command line options which share stdio between semihost, monitor and serial ports: qemu \ -chardev stdio,mux=on,id=stdio0 \ -serial chardev:stdio0 \ -semihosting-config enable=on,chardev=stdio0 \ -mon chardev=stdio0,mode=readline This creates a chardev hooked to stdio and then connects all of the subsystems to it. A shorter mechanism would be good to hear about. Signed-off-by: Keith Packard <keithp@keithp.com> Message-Id: <20191104204230.12249-1-keithp@keithp.com> [AJB: fixed up deadlock, minor commit title reword] Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Cc: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Keith Packard <keithp@keithp.com> Tested-by: Keith Packard <keithp@keithp.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2020-01-09target/arm: only update pc after semihosting completesAlex Bennée1-0/+1
Before we introduce blocking semihosting calls we need to ensure we can restart the system on semi hosting exception. To be able to do this the EXCP_SEMIHOST operation should be idempotent until it finally completes. Practically this means ensureing we only update the pc after the semihosting call has completed. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Keith Packard <keithp@keithp.com> Tested-by: Keith Packard <keithp@keithp.com>
2019-11-06linux-user: Introduce cpu_clone_regs_parentRichard Henderson1-0/+4
We will need a target-specific hook for adjusting registers in the parent during clone. Add an empty inline function for each target, and invoke it from the proper places. Reviewed-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20191106113318.10226-11-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-11-06linux-user: Rename cpu_clone_regs to cpu_clone_regs_childRichard Henderson1-1/+2
We will need a target-specific hook for adjusting registers in the parent during clone. To avoid confusion, rename the one we have to make it clear it affects the child. At the same time, pass in the flags from the clone syscall. We will need them for correct behaviour for Sparc. Reviewed-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20191106113318.10226-10-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-10-24linux-user/arm: Rebuild hflags for TARGET_WORDS_BIGENDIANRichard Henderson1-0/+1
Continue setting, but not relying upon, env->hflags. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20191023150057.25731-24-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-09-27target/arm: remove run-time semihosting checks for linux-userAlex Bennée2-6/+0
Now we do all our checking at translate time we can make cpu_loop a little bit simpler. We also introduce a simple linux-user semihosting test case to defend the functionality. The out-of-tree softmmu based semihosting tests are still more comprehensive. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20190913151845.12582-6-alex.bennee@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-09-11linux-user/arm: Adjust MAX_RESERVED_VA for M-profileRichard Henderson1-3/+21
Limit the virtual address space for M-profile cpus to 2GB, so that we avoid all of the magic addresses in the top half of the M-profile system map. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20190822185929.16891-3-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-09-11linux-user: Pass CPUState to MAX_RESERVED_VARichard Henderson1-1/+1
Turn the scalar macro into a functional macro. Move the creation of the cpu up a bit within main() so that we can pass it to the invocation of MAX_RESERVED_VA. Delay the validation of the -R parameter until MAX_RESERVED_VA is computed. So far no changes to any of the MAX_RESERVED_VA macros to actually use the cpu in any way, but ARM will need it. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20190822185929.16891-2-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-06-12semihosting: split console_out into string and char versionsAlex Bennée1-3/+28
This is ostensibly to avoid the weirdness of len looking like it might come from a guest and sometimes being used. While we are at it fix up the error checking for the arm-linux-user implementation of the API which got flagged up by Coverity (CID 1401700). Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
generated by cgit v1.1 at 2024-08-22 16:35:32 +0000