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2025-04-28tcg: Merge INDEX_op_muls2_{i32,i64}Richard Henderson1-2/+1
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28tcg: Merge INDEX_op_ctpop_{i32,i64}Richard Henderson1-2/+1
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28tcg: Merge INDEX_op_ctz_{i32,i64}Richard Henderson1-2/+1
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28tcg: Merge INDEX_op_clz_{i32,i64}Richard Henderson1-2/+1
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28tcg: Merge INDEX_op_rot{l,r}_{i32,i64}Richard Henderson1-4/+2
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28tcg: Merge INDEX_op_sar_{i32,i64}Richard Henderson1-2/+1
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28tcg: Merge INDEX_op_shr_{i32,i64}Richard Henderson1-2/+1
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28tcg: Merge INDEX_op_shl_{i32,i64}Richard Henderson1-2/+1
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28tcg: Merge INDEX_op_remu_{i32,i64}Richard Henderson1-4/+1
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28tcg: Merge INDEX_op_rem_{i32,i64}Richard Henderson1-2/+1
Rename to INDEX_op_rems to emphasize signed inputs, and mirroring INDEX_op_remu_*. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28tcg: Merge INDEX_op_divu2_{i32,i64}Richard Henderson1-2/+1
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28tcg: Merge INDEX_op_div2_{i32,i64}Richard Henderson1-2/+1
Rename to INDEX_op_divs2 to emphasize signed inputs, and mirroring INDEX_op_divu2_*. Document the opcode. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28tcg: Merge INDEX_op_divu_{i32,i64}Richard Henderson1-2/+1
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28tcg: Merge INDEX_op_div_{i32,i64}Richard Henderson1-2/+1
Rename to INDEX_op_divs to emphasize signed inputs, and mirroring INDEX_op_divu_*. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28tcg: Merge INDEX_op_mulsh_{i32,i64}Richard Henderson1-2/+1
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28tcg: Merge INDEX_op_muluh_{i32,i64}Richard Henderson1-2/+1
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28tcg: Merge INDEX_op_mul_{i32,i64}Richard Henderson1-2/+1
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28tcg: Merge INDEX_op_not_{i32,i64}Richard Henderson1-2/+1
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28tcg: Merge INDEX_op_neg_{i32,i64}Richard Henderson1-2/+1
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28tcg: Merge INDEX_op_sub_{i32,i64}Richard Henderson1-2/+1
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28tcg: Merge INDEX_op_nor_{i32,i64}Richard Henderson1-2/+1
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28tcg: Merge INDEX_op_nand_{i32,i64}Richard Henderson1-2/+1
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28tcg: Merge INDEX_op_eqv_{i32,i64}Richard Henderson1-2/+1
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28tcg: Merge INDEX_op_xor_{i32,i64}Richard Henderson1-2/+1
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28tcg: Merge INDEX_op_orc_{i32,i64}Richard Henderson1-2/+1
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28tcg: Merge INDEX_op_or_{i32,i64}Richard Henderson1-2/+1
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28tcg: Merge INDEX_op_andc_{i32,i64}Richard Henderson1-2/+1
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28tcg: Merge INDEX_op_and_{i32,i64}Richard Henderson1-2/+1
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28tcg: Merge INDEX_op_add_{i32,i64}Richard Henderson1-2/+2
Rely on TCGOP_TYPE instead of opcodes specific to each type. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28tcg: Merge INDEX_op_mov_{i32,i64}Richard Henderson2-2/+4
Begin to rely on TCGOp.type to discriminate operations, rather than two different opcodes. Convert mov first. Introduce TCG_OPF_INT in order to keep opcode dumps the same. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28tcg: Remove INDEX_op_ext{8,16,32}*Richard Henderson1-10/+0
Use the fully general extract opcodes instead. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-27Merge tag 'for-upstream' of https://repo.or.cz/qemu/kevin into stagingStefan Hajnoczi1-4/+0
Block layer patches - Discard alignment fixes - Remove unused callback .bdrv_aio_pdiscard() - qemu-img bench: Input validation fix # -----BEGIN PGP SIGNATURE----- # # iQJFBAABCAAvFiEE3D3rFZqa+V09dFb+fwmycsiPL9YFAmgLy7QRHGt3b2xmQHJl # ZGhhdC5jb20ACgkQfwmycsiPL9YB4A//Zsbb+tVsyLBKeffwPpHF/cAzHVH7Q2dV # GC2JJvfrwq0gykfjj+u4akVQnPh49QiQM623PX7O15IikwdLy45ddQcYL1qflYCs # ZGmBOuz/deI74qjl67bZVqIm8WeRhwHkdutfXOL7GRe2IHbceLbwwGUcbCgOVavt # LHu3E2MIbvkLJoHEgg8UbJhZZY9DTLGDaMt00Yhy3UvNHU8UDeIr8o4dxMVv3gOf # +8kIjGQkYNqpWp7aCxy8vofdSFjbBp4lSCK4G83xikUw49qkwWcgZ6jyTzXALg0G # V+nMjH+DnfIRqhi1skFTHQNmFc6upxr7FIOgC+G5amkKLHCPnX9j5/2pBwrk63R7 # kXqzIPfRmfOTnJX+m7a9K/pE6RU9aPfr8mQdokEcQtlJkEjc6QN9HKfy/CLnJ5Id # Le8jQODSZ1zRsP6Z8jyG4unj0AuOucUoXjAKQ5EWK5RoRoLMirxqDEDd9tBjcPYB # JQmB/j7aTrF3aDWBs5ragCQYdcoXJbAbqLAwhaofyVRmVyjYJmWEIkPGGo946GPd # /BFgaUaea4qW5+iIpWFTD9TCQEY/A7RRpT4teu7anZ/hDzLUyXLJU28xYC6LxiDZ # Yoy5M/U6MLvgkBVTNuss4T3CIutBrUI7a/DLuGB+cSM6KkigQvNwLuBqPzTDfEQP # sQJOP4UsX6k= # =8amc # -----END PGP SIGNATURE----- # gpg: Signature made Fri 25 Apr 2025 13:51:48 EDT # gpg: using RSA key DC3DEB159A9AF95D3D7456FE7F09B272C88F2FD6 # gpg: issuer "kwolf@redhat.com" # gpg: Good signature from "Kevin Wolf <kwolf@redhat.com>" [full] # Primary key fingerprint: DC3D EB15 9A9A F95D 3D74 56FE 7F09 B272 C88F 2FD6 * tag 'for-upstream' of https://repo.or.cz/qemu/kevin: qemu-img: improve queue depth validation in img_bench block: Remove unused callback function *bdrv_aio_pdiscard block/io: skip head/tail requests on EINVAL file-posix: probe discard alignment on Linux block devices Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2025-04-27Merge tag 'single-binary-20250425' of https://github.com/philmd/qemu into ↵Stefan Hajnoczi13-44/+115
staging Various patches loosely related to single binary work: - Replace cpu_list() definition by CPUClass::list_cpus() callback - Remove few MO_TE definitions on Hexagon / X86 targets - Remove target_ulong uses in ARMMMUFaultInfo and ARM CPUWatchpoint - Remove DEVICE_HOST_ENDIAN definition - Evaluate TARGET_BIG_ENDIAN at compile time and use target_needs_bswap() more - Rename target_words_bigendian() as target_big_endian() - Convert target_name() and target_cpu_type() to TargetInfo API - Constify QOM TypeInfo class_data/interfaces fields - Get default_cpu_type calling machine_class_default_cpu_type() - Correct various uses of GLibCompareDataFunc prototype - Simplify ARM/Aarch64 gdb_get_core_xml_file() handling a bit - Move device tree files in their own pc-bios/dtb/ subdir - Correctly check strchrnul() symbol availability on macOS SDK - Move target-agnostic methods out of cpu-target.c and accel-target.c - Unmap canceled USB XHCI packet - Use deposit/extract API in designware model - Fix MIPS16e translation - Few missing header fixes # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmgLqb8ACgkQ4+MsLN6t # wN6nCQ//cmv1M+NsndhO5TAK8T1eUSXKlTZh932uro6ZgxKwN4p+j1Qo7bq3O9gu # qUMHNbcfQl8sHSytiXBoxCjLMCXC3u38iyz75WGXuPay06rs4wqmahqxL4tyno3l # 1RviFts9xlLn+tJqqrAR6+pRdALld0TY+yXUjXgr4aK5pIRpLz9U/sIEoh7qbA5U # x0MTaceDG3A91OYo0TgrNbcMe1b9GqQZ+a4tbaP+oE37wbiKdyQ68LjrEbV08Y1O # qrFF4oxquV31QJcUiuII1W7hC6psGrMsUA1f1qDu7QvmybAZWNZNsR9T66X9jH5J # wXMShJmmXwxugohmuPPFnDshzJy90aFL6Jy2shrfqcG2v0W66ARY1ZnbJLCcfczt # 073bnE2dnOVhd/ny37RrIJNJLLmYM0yFDeKuYtNNAzpK9fpA7Q2PI8QiqNacQ3Pa # TdEYrGlMk7OeNck8xJmJMY5rATthi1D4dIBv3rjQbUolQvPJe2Y9or0R2WL1jK5v # hhr6DY01iSPES3CravmUs/aB1HRMPi/nX45OmFR6frAB7xqWMreh81heBVuoTTK8 # PuXtRQgRMRKwDeTxlc6p+zba4mIEYG8rqJtPFRgViNCJ1KsgSIowup3BNU05YuFn # NoPoRayMDVMgejVgJin3Mg2DCYvt/+MBmO4IoggWlFsXj59uUgA= # =DXnZ # -----END PGP SIGNATURE----- # gpg: Signature made Fri 25 Apr 2025 11:26:55 EDT # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * tag 'single-binary-20250425' of https://github.com/philmd/qemu: (58 commits) qemu: Convert target_name() to TargetInfo API accel: Move target-agnostic code from accel-target.c -> accel-common.c accel: Make AccelCPUClass structure target-agnostic accel: Include missing 'qemu/accel.h' header in accel-internal.h accel: Implement accel_init_ops_interfaces() for both system/user mode cpus: Move target-agnostic methods out of cpu-target.c cpus: Replace CPU_RESOLVING_TYPE -> target_cpu_type() qemu: Introduce target_cpu_type() qapi: Rename TargetInfo structure as QemuTargetInfo hw/microblaze: Evaluate TARGET_BIG_ENDIAN at compile time hw/mips: Evaluate TARGET_BIG_ENDIAN at compile time target/xtensa: Evaluate TARGET_BIG_ENDIAN at compile time target/mips: Check CPU endianness at runtime using env_is_bigendian() accel/kvm: Use target_needs_bswap() linux-user/elfload: Use target_needs_bswap() target/hexagon: Include missing 'accel/tcg/getpc.h' accel/tcg: Correct list of included headers in tcg-stub.c system/kvm: make functions accessible from common code meson: Use osdep_prefix for strchrnul() meson: Share common C source prefixes ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2025-04-25qemu: Convert target_name() to TargetInfo APIPhilippe Mathieu-Daudé3-2/+33
Have target_name() be a target-agnostic method, dispatching to a per-target TargetInfo singleton structure. By default a stub singleton is used. No logical change expected. Inspired-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250424222112.36194-3-philmd@linaro.org>
2025-04-25accel: Make AccelCPUClass structure target-agnosticPhilippe Mathieu-Daudé2-11/+24
Move the target-agnostic parts of "accel/accel-cpu-target.h" to "accel/accel-cpu.h". Doing so we need to include missing "hw/core/cpu.h" header in "accel/accel-cpu.h" otherwise we get: include/accel/accel-cpu-target.h:39:28: error: unknown type name 'CPUClass' 39 | void (*cpu_class_init)(CPUClass *cc); | ^ Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20250417165430.58213-7-philmd@linaro.org>
2025-04-25qemu: Introduce target_cpu_type()Philippe Mathieu-Daudé1-0/+19
Introduce the target_cpu_type() helper to access the CPU_RESOLVING_TYPE target-specific definition from target-agnostic code. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20250417165430.58213-2-philmd@linaro.org>
2025-04-25system/kvm: make functions accessible from common codePierrick Bouvier1-4/+4
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20250424232829.141163-8-pierrick.bouvier@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2025-04-25system/datadir: Add new type constant for DTB filesBALATON Zoltan1-3/+8
Currently DTB files are mixed with ROMs under BIOS type. Separate them under a new type constant and turn defines into an enum while at it. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <ae793d1f81e3577605759c43871722324a1ef2cb.1745402140.git.balaton@eik.bme.hu> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2025-04-25system/memory: Remove DEVICE_HOST_ENDIAN definitionPhilippe Mathieu-Daudé1-6/+0
Since the previous commit ("exec/memory.h: make devend_memop "target defines" agnostic") there is a single use of the DEVICE_HOST_ENDIAN definition in ram_device_mem_ops: inline it and remove its definition altogether. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: David Hildenbrand <david@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250423111625.10424-1-philmd@linaro.org>
2025-04-25block: Remove unused callback function *bdrv_aio_pdiscardSunny Zhu1-4/+0
The bytes type in *bdrv_aio_pdiscard should be int64_t rather than int. There are no drivers implementing the *bdrv_aio_pdiscard() callback, it appears to be an unused function. Therefore, we'll simply remove it instead of fixing it. Additionally, coroutine-based callbacks are preferred. If someone needs to implement bdrv_aio_pdiscard, a coroutine-based version would be straightforward to implement. Signed-off-by: Sunny Zhu <sunnyzhyy@qq.com> Message-ID: <tencent_7140D2E54157D98CF3D9E64B1A007A1A7906@qq.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Kevin Wolf <kwolf@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2025-04-25exec: Rename target_words_bigendian() -> target_big_endian()Philippe Mathieu-Daudé1-6/+6
In commit 98ed8ecfc9d ("exec: introduce target_words_bigendian() helper") target_words_bigendian() was matching the definition it was depending on (TARGET_WORDS_BIGENDIAN). Later in commit ee3eb3a7ce7 ("Replace TARGET_WORDS_BIGENDIAN") the definition was renamed as TARGET_BIG_ENDIAN but we didn't update the helper. Do it now mechanically using: $ sed -i -e s/target_words_bigendian/target_big_endian/g \ $(git grep -wl target_words_bigendian) Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Message-Id: <20250417210025.68322-1-philmd@linaro.org>
2025-04-25gdbstub: Allow gdb_core_xml_file to be set at runtimePeter Maydell1-0/+5
Currently the CPUClass:gdb_core_xml_file setting is a simple 'const char *' which the CPU class must set to a fixed string. Allow the CPU class to instead set a new method gdb_get_core_xml_file() which returns this string. This will allow Arm CPUs to use different XML files for AArch32 vs AArch64 without having to have an extra AArch64-specific class type purely to give somewhere to set cc->gdb_core_xml_file differently. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20250317142819.900029-3-peter.maydell@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2025-04-25hw/core/cpu: gdb_arch_name string should not be freedPeter Maydell1-1/+2
The documentation for the CPUClass::gdb_arch_name method claims that the returned string should be freed with g_free(). This is not correct: in commit a650683871ba728 we changed this method to instead return a simple constant string, but forgot to update the documentation. Make the documentation match the new semantics. Fixes: a650683871ba728 ("hw/core/cpu: Return static value with gdb_arch_name()") Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20250317142819.900029-2-peter.maydell@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2025-04-25qom: Make InterfaceInfo[] uses constPhilippe Mathieu-Daudé1-1/+1
Mechanical change using: $ sed -i -E 's/\(InterfaceInfo.?\[/\(const InterfaceInfo\[/g' \ $(git grep -lE '\(InterfaceInfo.?\[\]\)') Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20250424194905.82506-7-philmd@linaro.org>
2025-04-25qom: Constify TypeInfo::interfacesPhilippe Mathieu-Daudé2-2/+2
Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20250424194905.82506-6-philmd@linaro.org>
2025-04-25qom: Constify TypeInfo::class_dataPhilippe Mathieu-Daudé1-1/+1
All callers now correctly expect a const class data. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250424194905.82506-5-philmd@linaro.org>
2025-04-25qom: Have class_init() take a const data argumentPhilippe Mathieu-Daudé4-6/+7
Mechanical change using gsed, then style manually adapted to pass checkpatch.pl script. Suggested-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250424194905.82506-4-philmd@linaro.org>
2025-04-25qom: Have class_base_init() take a const data argumentPhilippe Mathieu-Daudé1-1/+1
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250424194905.82506-3-philmd@linaro.org>
2025-04-25cpus: Introduce CPUClass::list_cpus() callbackPhilippe Mathieu-Daudé1-0/+2
Some targets define cpu_list to a method listing their CPUs on stdout. In order to make list_cpus() generic, introduce the CPUClass::list_cpus() callback. When no callback is registered, list_cpus() defaults to the cpu_list definition. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Message-Id: <20250324185837.46506-2-philmd@linaro.org>
2025-04-25vfio: Remove hiod_typename propertyZhenzhong Duan1-3/+0
Because we handle host IOMMU device creation in each container backend, we know which type name to use, so hiod_typename property is useless now, just remove it. Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250423072824.3647952-6-zhenzhong.duan@intel.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
generated by cgit v1.1 at 2025-09-20 23:58:49 +0000