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2024-12-20accel/tcg: Move page_[un]protect() to 'user/page-protection.h'Philippe Mathieu-Daudé2-5/+20
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20241212185341.2857-7-philmd@linaro.org>
2024-12-20accel/tcg: Use tb_page_addr_t type in page_unprotect()Philippe Mathieu-Daudé1-1/+1
Match with the page_protect() prototype, use a tb_page_addr_t argument instead of target_ulong. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20241212185341.2857-6-philmd@linaro.org>
2024-12-20accel/tcg: Declare mmap_[un]lock() in 'exec/page-protection.h'Philippe Mathieu-Daudé2-17/+24
Move mmap_lock(), mmap_unlock() declarations and the WITH_MMAP_LOCK_GUARD() definition to 'exec/page-protection.h'. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20241212185341.2857-5-philmd@linaro.org>
2024-12-20include: Include missing 'qemu/clang-tsa.h' headerPhilippe Mathieu-Daudé1-0/+1
The next commit will remove "qemu/clang-tsa.h" of "exec/exec-all.h", however the following files indirectly include it: $ git grep -L qemu/clang-tsa.h $(git grep -wl TSA_NO_TSA) block/create.c include/block/block_int-common.h tests/unit/test-bdrv-drain.c tests/unit/test-block-iothread.c util/qemu-thread-posix.c Explicitly include it so we can process with the removal in the next commit. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20241212185341.2857-4-philmd@linaro.org>
2024-12-20exec/ram_addr: Include missing 'exec/hwaddr.h' and 'exec/cpu-common.h'Philippe Mathieu-Daudé1-0/+3
'hwaddr' is defined in "exec/hwaddr.h", 'ram_addr_t' in "exec/cpu-common.h". Include these headers in order to avoid when refactoring unrelated headers: In file included from ../../hw/s390x/s390-virtio-ccw.c:17: include/sysemu/physmem-target.h:37:24: error: unknown type name 'hwaddr' 37 | (MemoryRegion *mr, hwaddr offset, hwaddr length, unsigned client); | ^ In file included from ../../hw/s390x/s390-virtio-ccw.c:16: include/exec/ram_addr.h:52:36: error: unknown type name 'ram_addr_t' 52 | RAMBlock *qemu_ram_alloc_from_file(ram_addr_t size, MemoryRegion *mr, | ^ Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20241218155202.71931-4-philmd@linaro.org>
2024-12-20user: Introduce 'user/guest-host.h' headerPhilippe Mathieu-Daudé3-79/+89
Extract all declarations related to 'guest from/to host' address translation to a new "user/guest-host.h" header. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20241212185341.2857-2-philmd@linaro.org>
2024-12-20exec/translation-block: Include missing 'exec/vaddr.h' headerPhilippe Mathieu-Daudé1-0/+1
'vaddr' type is declared in "exec/vaddr.h". "exec/translation-block.h" uses this type without including the corresponding header. It works because this header is indirectly included, but won't work when the other headers are refactored: include/exec/translation-block.h:56:5: error: unknown type name 'vaddr' 56 | vaddr pc; | ^ Explitly include "exec/vaddr.h" to avoid such problem in a few commits. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20241114011310.3615-4-philmd@linaro.org>
2024-12-20exec/cpu-defs: Remove unnecessary headersPhilippe Mathieu-Daudé1-8/+0
"exec/cpu-defs.h" should be kept as minimal as possible; besides these includes don't seem necessary. Remove them. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Tested-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20241114011310.3615-3-philmd@linaro.org>
2024-12-20exec/cpu-all: Include missing 'exec/cpu-defs.h' headerPhilippe Mathieu-Daudé1-1/+1
TARGET_PAGE_BITS is defined in each target "cpu-param.h", itself included by "exec/cpu-defs.h". Include the latter in order to avoid when refactoring: In file included from ../../system/watchpoint.c:23: include/exec/cpu-all.h:356:19: error: use of undeclared identifier 'TARGET_PAGE_BITS' 356 | QEMU_BUILD_BUG_ON(TLB_FLAGS_MASK & TLB_SLOW_FLAGS_MASK); | ^ Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20241114011310.3615-2-philmd@linaro.org>
2024-12-20accel/tcg: Have tlb_vaddr_to_host() use vaddr typePhilippe Mathieu-Daudé1-1/+2
abi_ptr is expected to be used in user emulation. tlb_vaddr_to_host() uses it, but can be used in system emulation. Replace the type by 'vaddr' which is equivalent on user emulation but also works on system. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20241114011310.3615-13-philmd@linaro.org>
2024-12-20system: Move 'exec/confidential-guest-support.h' to system/Philippe Mathieu-Daudé1-3/+3
"exec/confidential-guest-support.h" is specific to system emulation, so move it under the system/ namespace. Mechanical change doing: $ sed -i \ -e 's,exec/confidential-guest-support.h,sysemu/confidential-guest-support.h,' \ $(git grep -l exec/confidential-guest-support.h) Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Message-Id: <20241218155913.72288-2-philmd@linaro.org>
2024-12-20include: Rename sysemu/ -> system/Philippe Mathieu-Daudé101-108/+108
Headers in include/sysemu/ are not only related to system *emulation*, they are also used by virtualization. Rename as system/ which is clearer. Files renamed manually then mechanical change using sed tool. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Tested-by: Lei Yang <leiyang@redhat.com> Message-Id: <20241203172445.28576-1-philmd@linaro.org>
2024-12-20qom: New object_property_add_new_container()Peter Xu1-0/+12
To move towards explicit creations of containers, starting that by providing a helper for creating container objects. Signed-off-by: Peter Xu <peterx@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20241121192202.4155849-3-peterx@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-12-20qom: Add TYPE_CONTAINER macroPeter Xu1-0/+1
Provide a macro for the container type across QEMU source tree, rather than hard code it every time. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Peter Xu <peterx@redhat.com> Message-ID: <20241121192202.4155849-2-peterx@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-12-20log: Add separate debug option for logging invalid memory accessesBALATON Zoltan1-0/+1
Currently -d guest_errors enables logging of different invalid actions by the guest such as misusing hardware, accessing missing features or invalid memory areas. The memory access logging can be quite verbose which obscures the other messages enabled by this debug switch so separate it by adding a new -d invalid_mem option to make it possible to control it independently of other guest error logs. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-ID: <1bb0d0e91ba14aca13056df3b0a774f89cbf966c.1730549443.git.balaton@eik.bme.hu> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-12-19hw/intc/loongarch_extioi: Code cleanup about loongarch_extioiBibo Mao1-2/+0
Remove definition about LoongArchExtIOI and LOONGARCH_EXTIOI, and replace them with LoongArchExtIOICommonState and macro LOONGARCH_EXTIOI_COMMON separately. Also remove unnecessary header files. Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn>
2024-12-19hw/intc/loongarch_extioi: Add pre_save interfaceBibo Mao1-0/+1
Add vmstate pre_save interface, which can be used extioi kvm driver in future. Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn>
2024-12-19hw/intc/loongarch_extioi: Inherit from loongarch_extioi_commonBibo Mao2-2/+27
Set TYPE_LOONGARCH_EXTIOI inherit from TYPE_LOONGARCH_EXTIOI_COMMON object, it shares vmsate and property of TYPE_LOONGARCH_EXTIOI_COMMON, and has its own realize() function. Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn>
2024-12-19include: Rename LoongArchExtIOI with LoongArchExtIOICommonStateBibo Mao2-1/+2
Rename structure LoongArchExtIOI with LoongArchExtIOICommonState, since it is defined in file loongarch_extioi_common.h Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn>
2024-12-19include: Move struct LoongArchExtIOI to header file loongarch_extioi_commonBibo Mao2-26/+27
Move definiton of structure LoongArchExtIOI from header file loongarch_extioi.h to file loongarch_extioi_common.h. Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn>
2024-12-19include: Add loongarch_extioi_common header fileBibo Mao2-49/+59
Add common header file include/hw/intc/loongarch_extioi_common.h, and move some macro definition from include/hw/intc/loongarch_extioi.h to the common header file. Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn>
2024-12-19hw/intc/loongarch_pch: Code cleanup about loongarch_pch_picBibo Mao1-4/+0
Remove definition about LoongArchPCHPIC and LOONGARCH_PCH_PIC, and replace them with LoongArchPICCommonState and LOONGARCH_PIC_COMMON separately. Also remove unnecessary header files. Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn>
2024-12-19hw/intc/loongarch_pch: Add pre_save and post_load interfacesBibo Mao1-0/+2
Add vmstate pre_save and post_load interfaces, which can be used by pic kvm driver in future. Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn>
2024-12-19hw/intc/loongarch_pch: Inherit from loongarch_pic_commonBibo Mao2-4/+27
Set TYPE_LOONGARCH_PIC inherit from TYPE_LOONGARCH_PIC_COMMON object, it shares vmsate and property of TYPE_LOONGARCH_PIC_COMMON, and has its own realize() function. Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn>
2024-12-19include: Move struct LoongArchPCHPIC to loongarch_pic_common header fileBibo Mao2-26/+29
Move structure LoongArchPCHPIC from header file loongarch_pch_pic.h to file loongarch_pic_common.h, and rename structure name with LoongArchPICCommonState. Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn>
2024-12-19include: Add loongarch_pic_common header fileBibo Mao2-31/+47
Add common header file hw/intc/loongarch_pic_common.h, and move some macro definition from hw/intc/loongarch_pch_pic.h to the common header file. Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn>
2024-12-16x86/loader: add -shim optionGerd Hoffmann1-0/+1
Add new -shim command line option, wire up for the x86 loader. When specified load shim into the new "etc/boot/shim" fw_cfg file. Needs OVMF changes too to be actually useful. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-ID: <20240905141211.1253307-6-kraxel@redhat.com>
2024-12-14hw/ide/ahci: Decouple from PCIBernhard Beschow2-2/+2
In some adhoc profiling booting Linux VMs, it's observed that ahci_irq_lower() can be a hot path (10000+ triggers until login prompt appears). Even though the parent device never changes, this method re-determines whether the parent device is a PCI device or not using the rather expensive object_dynamic_cast() function. Avoid this overhead by pushing the interrupt handling to the parent device, essentially turning AHCIState into an "IP block". Note that this change also frees AHCIState from the PCI dependency which wasn't reflected in Kconfig. Reported-by: Peter Xu <peterx@redhat.com> Inspired-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20241212110926.23548-2-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-12-14hw/nvram/fw_cfg: Remove fw_cfg_add_extra_pci_roots()Philippe Mathieu-Daudé1-9/+0
Now that all uses of fw_cfg_add_extra_pci_roots() have been converted to the newer pci_bus_add_fw_cfg_extra_pci_roots(), we can remove that bogus method. hw/nvram/fw_cfg must stay generic. Device specific entries have to be implemented using TYPE_FW_CFG_DATA_GENERATOR_INTERFACE. This mostly reverts commit 0abd38885ac0fcdb08653922f339849cad387961 ("fw_cfg: Refactor extra pci roots addition"). Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-Id: <20241206181352.6836-7-philmd@linaro.org>
2024-12-14hw/pci: Add pci_bus_add_fw_cfg_extra_pci_roots() helperPhilippe Mathieu-Daudé1-0/+3
pci_bus_add_fw_cfg_extra_pci_roots() calls the fw_cfg API with PCI bus specific arguments. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-Id: <20241206181352.6836-5-philmd@linaro.org>
2024-12-14hw/nvram/fw_cfg: Skip FW_CFG_DATA_GENERATOR when no data to generatePhilippe Mathieu-Daudé1-5/+8
Allow the FW_CFG_DATA_GENERATOR interface get_data() handler to return NULL when there is nothing to generate. In that case fw_cfg_add_file_from_generator() will not add any item and return %true. Reported-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20241213133352.10915-4-philmd@linaro.org>
2024-12-13hw/nvram/fw_cfg: Pass QOM parent to fw_cfg_add_file_from_generator()Philippe Mathieu-Daudé1-4/+6
Currently fw_cfg_add_file_from_generator() is restricted to command line created objects which reside in the '/objects' QOM container. In order to extend to other types of containers, pass the QOM parent by argument. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-Id: <20241206181352.6836-3-philmd@linaro.org>
2024-12-13hw/nvram/fw_cfg: Rename fw_cfg_add_[file]_from_generator()Philippe Mathieu-Daudé1-3/+3
fw_cfg_add_from_generator() is adding a 'file' entry, so rename as fw_cfg_add_file_from_generator() for clarity. Besides, we might introduce generators for other entry types. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-Id: <20241206181352.6836-2-philmd@linaro.org>
2024-12-13hw/core/eif: Use stateful qcrypto apisDorjoy Chowdhury1-8/+8
We were storing the pointers to buffers in a GList due to lack of stateful crypto apis and instead doing the final hash computation at the end after we had all the necessary buffers. Now that we have the stateful qcrypto apis available, we can instead update the hashes inline in the read_eif_* functions which makes the code much simpler. Signed-off-by: Dorjoy Chowdhury <dorjoychy111@gmail.com> Reviewed-by: Alexander Graf <graf@amazon.com> Message-ID: <20241109123039.24180-1-dorjoychy111@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-12-12Merge tag 'pull-tcg-20241212' of https://gitlab.com/rth7680/qemu into stagingStefan Hajnoczi2-0/+9
tcg: Reset free_temps before tcg_optimize tcg/riscv: Fix StoreStore barrier generation include/exec: Introduce fpst alias in helper-head.h.inc target/sparc: Use memcpy() and remove memcpy32() # -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmdbS7YdHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV9pFgf/RB1zSPYiID5psp+S # yL4raw8um4a3AbgI5g0wOY8PgIeN0anQxG0Yupo3Ka5rvhy9p7S36OOCJMFEJRbP # Sf2o4DG9Bqt6ycLh/mjQ8OqvL31T6f02GrkbUrevYVR7mYKjj+aJSbkIGKQqUOy3 # eptf9bbgtEe87oTXFZPxh24eEGE01WpHqDx3KQCCLlnsAR5ad9E8StWswu+8MiA/ # HttTGj8zqGu1N+wMtYfUuHtv8JdDK5H25gVbX/f+mLwNdWMXntsTw08Td3eY3EB0 # u44sEE+NSO04UiIu8U7NRrBNbUJsKautG90q4ZTOk5l8qVGIFWOP9kl0K1JjJZdd # jIR27g== # =+5lt # -----END PGP SIGNATURE----- # gpg: Signature made Thu 12 Dec 2024 15:46:46 EST # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * tag 'pull-tcg-20241212' of https://gitlab.com/rth7680/qemu: target/sparc: Use memcpy() and remove memcpy32() include/exec: Introduce fpst alias in helper-head.h.inc tcg/riscv: Fix StoreStore barrier generation tcg: Reset free_temps before tcg_optimize Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2024-12-12Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into stagingStefan Hajnoczi4-24/+17
* rust: better integration with clippy, rustfmt and rustdoc * rust: interior mutability types * rust: add a bit operations module * rust: first part of QOM rework * kvm: remove unnecessary #ifdef * clock: small cleanups, improve handling of Clock lifetimes # -----BEGIN PGP SIGNATURE----- # # iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAmdZqFkUHHBib256aW5p # QHJlZGhhdC5jb20ACgkQv/vSX3jHroOzRwf/SYUD+CJCn2x7kUH/JG893jwN1WbJ # meGZ0PQDUpOZJFWg6T4g0MuW4O+Wevy2pF4SfGojgqaYxKBbTQVkeliDEMyNUxpr # vSKXego0K3pkX3cRDXNVTaXFbsHsMt/3pfzMQM6ocF9qbL+Emvx7Og6WdAcyJ4hc # lA17EHlnrWKUSnqN/Ow/pZXsa4ijCklXFFh4barfbdGVhMQc2QekUU45GsP2AvGT # NkXTQC05HqxBaAIDeSxbprDSzNihyT71dAooVoxqKboprPu5uoUSJwgaD8rADPr4 # EOfsz61V4mji+DWDcIzTtYoAdY41vVXI9lvCKOcCFkimA29xO0W6P7mG2w== # =JSh5 # -----END PGP SIGNATURE----- # gpg: Signature made Wed 11 Dec 2024 09:57:29 EST # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * tag 'for-upstream' of https://gitlab.com/bonzini/qemu: (49 commits) rust: qom: change the parent type to an associated type rust: qom: split ObjectType from ObjectImpl trait rust: qom: move bridge for TypeInfo functions out of pl011 rust: qdev: move bridge for realize and reset functions out of pl011 rust: qdev: move device_class_init! body to generic function, ClassInitImpl implementation to macro rust: qom: move ClassInitImpl to the instance side rust: qom: convert type_info! macro to an associated const rust: qom: rename Class trait to ClassInitImpl rust: qom: add default definitions for ObjectImpl rust: add a bit operation module rust: add bindings for interrupt sources rust: define prelude rust: cell: add BQL-enforcing RefCell variant rust: cell: add BQL-enforcing Cell variant bql: check that the BQL is not dropped within marked sections qom/object: Remove type_register() script/codeconverter/qom_type_info: Deprecate MakeTypeRegisterStatic and MakeTypeRegisterNotStatic ui: Replace type_register() with type_register_static() target/xtensa: Replace type_register() with type_register_static() target/sparc: Replace type_register() with type_register_static() ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2024-12-12Merge tag 'pull-target-arm-20241211' of ↵Stefan Hajnoczi5-11/+168
https://git.linaro.org/people/pmaydell/qemu-arm into staging target-arm queue: * hw/net/lan9118: Extract PHY model, reuse with imx_fec, fix bugs * fpu: Make muladd NaN handling runtime-selected, not compile-time * fpu: Make default NaN pattern runtime-selected, not compile-time * fpu: Minor NaN-related cleanups * MAINTAINERS: email address updates # -----BEGIN PGP SIGNATURE----- # # iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmdZu14ZHHBldGVyLm1h # eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3mgiD/98Q+m7/t54FdCd2bx1cr2k # dw+7DYhp+60Vo3OjlGtKWwPD67oN8e0jhOoArmJNW0Fmkcsvfvd4wv6kCf8zftLm # 0/lPO687mvFNCAprTch+z2pGB7aS0HdIr126ytsyg5PlHtldd+OBA+yUUYafR3zo # BECRSWZmMFxfl9uckJzntdntghTX5pnJDSGBYE9NEyRfo0Ntj1HvhaHSQJkqpf5B # QwE8R965CXc4i34PqlOCju47AXwJc3x36ftdiNmpPvMS4odG9yb/OmhHSgVZlThb # 1x0HEX69KF5FQbtVNDMmFyYehDzqYFpqOSa1IKtaNLmDSZJ5P8fWw4eBdMdr/QyD # QKssgHAO6Z13MLppK4B1PFtSVlsLYUURYddYUFz4RUNOxrS/pzAIT0KhClYFytQo # x9xid4fng1PY9doYEM3v4vEQCU6S+2aj2gU4EOwdB8GmMhtjSl8YlcEs7cysqkoQ # gbGX97i6Eh616q9VsRzUwcY6u4XP/lssn6I98k4AEqgRpyFCMTLyFodV89d6J4EJ # IJKsJf10gctpe1JdMgtDxuleKOZc+O5nOMJLKYwc9siakCBZsH7zmgS6m8QVoUSD # 7R+4OtbaQwM0+GPbc0AhAlDtq3Q1QAtCYa94iICUixC4NjzfdC9B9yCz1XnA7sfS # jPHU8INw6rz3psEnlFQdhA== # =+ELh # -----END PGP SIGNATURE----- # gpg: Signature made Wed 11 Dec 2024 11:18:38 EST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [full] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full] # gpg: aka "Peter Maydell <peter@archaic.org.uk>" [unknown] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * tag 'pull-target-arm-20241211' of https://git.linaro.org/people/pmaydell/qemu-arm: (72 commits) MAINTAINERS: Add correct email address for Vikram Garhwal MAINTAINERS: update email address for Leif Lindholm softfloat: Replace WHICH with RET in parts_pick_nan softfloat: Sink frac_cmp in parts_pick_nan until needed softfloat: Share code between parts_pick_nan cases softfloat: Inline pickNaN softfloat: Use parts_pick_nan in propagateFloatx80NaN softfloat: Move propagateFloatx80NaN to softfloat.c softfloat: Pad array size in pick_nan_muladd softfloat: Remove which from parts_pick_nan_muladd softfloat: Use goto for default nan case in pick_nan_muladd softfloat: Inline pickNaNMulAdd fpu: Remove default handling for dnan_pattern target/tricore: Set default NaN pattern explicitly target/riscv: Set default NaN pattern explicitly target/hexagon: Set default NaN pattern explicitly target/xtensa: Set default NaN pattern explicitly target/sparc: Set default NaN pattern explicitly target/s390x: Set default NaN pattern explicitly target/rx: Set default NaN pattern explicitly ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2024-12-12Merge tag 'pull-request-2024-12-11' of https://gitlab.com/thuth/qemu into ↵Stefan Hajnoczi7-9/+177
staging * Add compat machines for QEMU 10.0 * Add s390x CPU model for the gen17 mainframe * Convert some more avocado tests to the new functional framework * Some minor clean-ups for functional tests # -----BEGIN PGP SIGNATURE----- # # iQJFBAABCAAvFiEEJ7iIR+7gJQEY8+q5LtnXdP5wLbUFAmdZUu0RHHRodXRoQHJl # ZGhhdC5jb20ACgkQLtnXdP5wLbVpzBAAo/xldyDvEBkQiHpw7YF5x6dipSdQmgbL # 02Qq1p2A7LxGK7uv6HBtOwhxk2eB0F+o8ZNt79u6QJmrI7Anme40B6GRXKHpm+Nn # 2zn6xzBKnKJSjI/mr3zNqQwCb+q68hL+0N9oNSlbl42uElnMNMr1elkW7W+YT70d # w+P5UzV2AuvjC6ML1R6ULwJHdeoklAk87g7l3Ns5z8CPFCV3yMOzGHqgpYQdYl+U # Cx0CT/xqkfoyustkbPSCUGDzZbLQLMHcCgGX9DVLUmP8I6U1MeZC3HIxYdI4ofX/ # ApFQ4ThMV5f0A6hnn2TRrP+74He6wjYkB3RUjXtchVizWm1FZhNNa//cWvoEmCFU # ufwuAFNvTodli0/47GEmwu8t/jqXJ1SeC50VAPyzxpedJwkgaMAZiYAlDO/oxIY1 # BCNR5bDjf4pAzguHG4FnPxaOcb5UT+V+sukQMvxa03TGrTp2/U9sanCVVdGPOovI # sf/nXsK6jYe1mvinLF9wTyAjjkXqboqfgRabQi2DRgP/FMKseGapy4fOOXzj5Flv # 5FSdyzm4/3fnb2fl1cWSNqPCLwAtmPWx0weu7PBbhP7AwNEXbpJcHmjtJwxL5Slx # c+qazS6lbeBphPlToEqhibOZAxMM6QYvFxhL8Ut36vyEBbO/LAjy9+od9/jb8QCd # ijtWjauVpHc= # =BG+s # -----END PGP SIGNATURE----- # gpg: Signature made Wed 11 Dec 2024 03:53:01 EST # gpg: using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5 # gpg: issuer "thuth@redhat.com" # gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full] # gpg: aka "Thomas Huth <thuth@redhat.com>" [full] # gpg: aka "Thomas Huth <huth@tuxfamily.org>" [full] # gpg: aka "Thomas Huth <th.huth@posteo.de>" [unknown] # Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5 * tag 'pull-request-2024-12-11' of https://gitlab.com/thuth/qemu: (26 commits) tests/functional: remove pointless with statement tests/functional: remove unused system imports tests/functional: Convert the cubieboard avocado tests tests/functional: Convert the smdkc210 avocado test tests/functional: Convert the emcraft_sf2 avocado test tests/functional: Convert the xlnx_versal_virt avocado test MAINTAINERS: Cover the tests/functional/test_sh4eb_r2d.py file tests/functional: Bump the timeout of the sh4_tuxrun test s390x/cpumodel: gen17 model s390x/cpumodel: Add PLO-extension facility s390x/cpumodel: correct PLO feature wording s390x/cpumodel: Add Sequential-Instruction-Fetching facility s390x/cpumodel: add Ineffective-nonconstrained-transaction facility s390x/cpumodel: add Vector-Packed-Decimal-Enhancement facility 3 s390x/cpumodel: add Miscellaneous-Instruction-Extensions Facility 4 s390x/cpumodel: add Vector Enhancements facility 3 s390x/cpumodel: add Concurrent-functions facility support linux-headers: Update to Linux 6.13-rc1 s390x/cpumodel: Add ptff Query Time-Stamp Event (QTSE) support s390x/cpumodel: add msa13 subfunctions ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2024-12-12include/exec: Introduce fpst alias in helper-head.h.incRichard Henderson1-0/+3
This allows targets to declare that the helper requires a float_status pointer and instead of a generic void pointer. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-12-12tcg: Reset free_temps before tcg_optimizeRichard Henderson1-0/+6
When allocating new temps during tcg_optmize, do not re-use any EBB temps that were used within the TB. We do not have any idea what span of the TB in which the temp was live. Introduce tcg_temp_ebb_reset_freed and use before tcg_optimize, as well as replacing the equivalent in plugin_gen_inject and tcg_func_start. Cc: qemu-stable@nongnu.org Fixes: fb04ab7ddd8 ("tcg/optimize: Lower TCG_COND_TST{EQ,NE} if unsupported") Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2711 Reported-by: wannacu <wannacu2049@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-12-11fpu: Allow runtime choice of default NaN valuePeter Maydell2-0/+21
Currently we hardcode the default NaN value in parts64_default_nan() using a compile-time ifdef ladder. This is awkward for two cases: * for single-QEMU-binary we can't hard-code target-specifics like this * for Arm FEAT_AFP the default NaN value depends on FPCR.AH (specifically the sign bit is different) Add a field to float_status to specify the default NaN value; fall back to the old ifdef behaviour if these are not set. The default NaN value is specified by setting a uint8_t to a pattern corresponding to the sign and upper fraction parts of the NaN; the lower bits of the fraction are set from bit 0 of the pattern. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20241202131347.498124-35-peter.maydell@linaro.org
2024-12-11fpu: Remove use_first_nan field from float_statusPeter Maydell2-6/+0
The use_first_nan field in float_status was an xtensa-specific way to select at runtime from two different NaN propagation rules. Now that xtensa is using the target-agnostic NaN propagation rule selection that we've just added, we can remove use_first_nan, because there is no longer any code that reads it. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20241202131347.498124-27-peter.maydell@linaro.org
2024-12-11softfloat: Allow runtime choice of NaN propagation for muladdPeter Maydell2-0/+66
IEEE 758 does not define a fixed rule for which NaN to pick as the result if both operands of a 3-operand fused multiply-add operation are NaNs. As a result different architectures have ended up with different rules for propagating NaNs. QEMU currently hardcodes the NaN propagation logic into the binary because pickNaNMulAdd() has an ifdef ladder for different targets. We want to make the propagation rule instead be selectable at runtime, because: * this will let us have multiple targets in one QEMU binary * the Arm FEAT_AFP architectural feature includes letting the guest select a NaN propagation rule at runtime In this commit we add an enum for the propagation rule, the field in float_status, and the corresponding getters and setters. We change pickNaNMulAdd to honour this, but because all targets still leave this field at its default 0 value, the fallback logic will pick the rule type with the old ifdef ladder. It's valid not to set a propagation rule if default_nan_mode is enabled, because in that case there's no need to pick a NaN; all the callers of pickNaNMulAdd() catch this case and skip calling it. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20241202131347.498124-16-peter.maydell@linaro.org
2024-12-11softfloat: Allow runtime choice of inf * 0 + NaN resultPeter Maydell2-0/+34
IEEE 758 does not define a fixed rule for what NaN to return in the case of a fused multiply-add of inf * 0 + NaN. Different architectures thus do different things: * some return the default NaN * some return the input NaN * Arm returns the default NaN if the input NaN is quiet, and the input NaN if it is signalling We want to make this logic be runtime selected rather than hardcoded into the binary, because: * this will let us have multiple targets in one QEMU binary * the Arm FEAT_AFP architectural feature includes letting the guest select a NaN propagation rule at runtime In this commit we add an enum for the propagation rule, the field in float_status, and the corresponding getters and setters. We change pickNaNMulAdd to honour this, but because all targets still leave this field at its default 0 value, the fallback logic will pick the rule type with the old ifdef ladder. Note that four architectures both use the muladd softfloat functions and did not have a branch of the ifdef ladder to specify their behaviour (and so were ending up with the "default" case, probably wrongly): i386, HPPA, SH4 and Tricore. SH4 and Tricore both set default_nan_mode, and so will never get into pickNaNMulAdd(). For HPPA and i386 we retain the same behaviour as the old default-case, which is to not ever return the default NaN. This might not be correct but it is not a behaviour change. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20241202131347.498124-4-peter.maydell@linaro.org
2024-12-11hw/net/lan9118_phy: Reuse MII constantsBernhard Beschow1-0/+6
Prefer named constants over magic values for better readability. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Bernhard Beschow <shentey@gmail.com> Tested-by: Guenter Roeck <linux@roeck-us.net> Message-id: 20241102125724.532843-5-shentey@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2024-12-11hw/net/lan9118_phy: Reuse in imx_fec and consolidate implementationsBernhard Beschow1-5/+4
imx_fec models the same PHY as lan9118_phy. The code is almost the same with imx_fec having more logging and tracing. Merge these improvements into lan9118_phy and reuse in imx_fec to fix the code duplication. Some migration state how resides in the new device model which breaks migration compatibility for the following machines: * imx25-pdk * sabrelite * mcimx7d-sabre * mcimx6ul-evk Signed-off-by: Bernhard Beschow <shentey@gmail.com> Tested-by: Guenter Roeck <linux@roeck-us.net> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20241102125724.532843-3-shentey@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2024-12-11hw/net/lan9118: Extract lan9118_phyBernhard Beschow1-0/+37
A very similar implementation of the same device exists in imx_fec. Prepare for a common implementation by extracting a device model into its own files. Some migration state has been moved into the new device model which breaks migration compatibility for the following machines: * smdkc210 * realview-* * vexpress-* * kzm * mps2-* While breaking migration ABI, fix the size of the MII registers to be 16 bit, as defined by IEEE 802.3u. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Tested-by: Guenter Roeck <linux@roeck-us.net> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20241102125724.532843-2-shentey@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2024-12-11linux-headers: Update to Linux 6.13-rc1Hendrik Brueckner5-8/+168
This linux headers update includes required changes for the gen17 CPU model. Signed-off-by: Hendrik Brueckner <brueckner@linux.ibm.com> Suggested-by: Thomas Huth <thuth@redhat.com> Message-ID: <20241206122751.189721-7-brueckner@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-12-11hw: add compat machines for 10.0Cornelia Huck2-0/+6
Add 10.0 machine types for arm/i440fx/m68k/q35/s390x/spapr. Signed-off-by: Cornelia Huck <cohuck@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-ID: <20241126103005.3794748-3-cohuck@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-12-11hw/i386: define _AS_LATEST() macros for machine typesDaniel P. Berrangé1-1/+3
Follow the other architecture targets by adding extra macros for defining a versioned machine type as the latest. This reduces the size of the changes when introducing new machine types at the start of each release cycle. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Cornelia Huck <cohuck@redhat.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Message-ID: <20240910163041.3764176-1-berrange@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com> Message-ID: <20241126103005.3794748-2-cohuck@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
generated by cgit v1.1 at 2025-08-10 12:37:11 +0000