aboutsummaryrefslogtreecommitdiff
path: root/include
AgeCommit message (Collapse)AuthorFilesLines
2016-06-07hw: Clean up includesPeter Maydell2-2/+0
Clean up includes so that osdep.h is included first and headers which it implies are not included manually. This commit was created with scripts/clean-includes. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2016-06-07qdev: Clean up around propertiesCao jin1-2/+8
include: 1. remove unnecessary declaration of static function 2. fix inconsistency between comment and function name, and typo OOM->QOM 2. update comments of functions, use uniform format(GTK-Doc style) Signed-off-by: Cao jin <caoj.fnst@cn.fujitsu.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2016-06-07ICH9: fix typoCao jin1-2/+2
Signed-off-by: Cao jin <caoj.fnst@cn.fujitsu.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2016-06-07Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into stagingPeter Maydell12-80/+104
pc, pci, virtio: new features, cleanups, fixes This includes some infrastructure for ipmi smbios tables. Beginning of acpi hotplug rework by Igor for supporting >255 CPUs. Misc cleanups and fixes. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # gpg: Signature made Tue 07 Jun 2016 13:55:22 BST # gpg: using RSA key 0x281F0DB8D28D5469 # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" * remotes/mst/tags/for_upstream: (25 commits) virtio: move bi-endian target support to a single location pc-dimm: introduce realize callback pc-dimm: get memory region from ->get_memory_region() acpi: make bios_linker_loader_add_checksum() API offset based acpi: make bios_linker_loader_add_pointer() API offset based tpm: apci: cleanup TCPA table initialization acpi: cleanup bios_linker_loader_cleanup() acpi: simplify bios_linker API by removing redundant 'table' argument acpi: convert linker from GArray to BIOSLinker structure pc: use AcpiDeviceIfClass.send_event to issue GPE events acpi: extend ACPI interface to provide send_event hook pc: Postpone SMBIOS table installation to post machine init ipmi: rework the fwinfo to be fetched from the interface tests: acpi: update tables with consolidated legacy cpu-hotplug AML pc: acpi: cpuhp-legacy: switch ProcessorID to possible_cpus idx pc: acpi: simplify build_legacy_cpu_hotplug_aml() signature pc: acpi: consolidate legacy CPU hotplug in one file pc: acpi: mark current CPU hotplug functions as legacy pc: acpi: cpu-hotplug: make AML CPU_foo defines local to cpu_hotplug_acpi_table.c pc: acpi: consolidate \GPE._E02 with the rest of CPU hotplug AML ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-06-07virtio: move bi-endian target support to a single locationGreg Kurz1-1/+5
Paolo's recent cpu.h cleanups broke legacy virtio for ppc64 LE guests (and arm BE guests as well, even if I have not verified that). Especially, commit "33c11879fd42 qemu-common: push cpu.h inclusion out of qemu-common.h" has the side-effect of silently hiding the TARGET_IS_BIENDIAN macro from the virtio memory accessors, and thus fully disabling support of endian changing targets. To be sure this cannot happen again, let's gather all the bi-endian bits where they belong in include/hw/virtio/virtio-access.h. The changes in hw/virtio/vhost.c are safe because vhost_needs_vring_endian() is not called on a hot path and non bi-endian targets will return false anyway. While here, also rename TARGET_IS_BIENDIAN to be more precise: it is only for legacy virtio and bi-endian guests. Signed-off-by: Greg Kurz <gkurz@linux.vnet.ibm.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Acked-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
2016-06-07pc-dimm: introduce realize callbackXiao Guangrong1-0/+3
nvdimm needs to check if the backend memory is large enough to contain label data and init its memory region when the device is realized, so introduce realize callback which is called after common dimm has been realize Signed-off-by: Xiao Guangrong <guangrong.xiao@linux.intel.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
2016-06-07pc-dimm: get memory region from ->get_memory_region()Xiao Guangrong1-1/+2
Curretly, the memory region of backed memory is all directly mapped to guest's address space, however, it will be not true for nvdimm device if we introduce nvdimm label which only can be indirectly accessed by ACPI DSM method Also it improves the comments a bit to reflect this fact Signed-off-by: Xiao Guangrong <guangrong.xiao@linux.intel.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
2016-06-07acpi: make bios_linker_loader_add_checksum() API offset basedIgor Mammedov1-2/+2
It should help to make clear that bios_linker works in terms of offsets within a file. Also it should prevent mistakes where user passes as arguments pointers to unrelated to file blobs. While at it, considering that it's a ACPI checksum and it's initial value must be 0, move checksum field zeroing into bios_linker_loader_add_checksum() instead of doing it at every call site manually before bios_linker_loader_add_checksum() is called. In addition add extra boundary checks. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2016-06-07acpi: make bios_linker_loader_add_pointer() API offset basedIgor Mammedov1-2/+3
cleanup bios_linker_loader_add_pointer() API by switching arguments to taking offsets relative to corresponding files instead of doing pointer arithmetic on behalf of user which were confusing. Also make offset inside of source file explicit in API so that user won't have to manually set it in destination file blob and while at it add additional boundary checks. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2016-06-07acpi: cleanup bios_linker_loader_cleanup()Igor Mammedov1-1/+1
bios_linker_loader_cleanup() is called only from one place and returned value is immediately freed wich makes returning pointer from bios_linker_loader_cleanup() useless. Cleanup bios_linker_loader_cleanup() by freeing data there so that caller won't have to free it. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2016-06-07acpi: simplify bios_linker API by removing redundant 'table' argumentIgor Mammedov2-4/+5
'table' argument in bios_linker_add_foo() commands is a data blob of one of files also passed to the same API. So instead of passing blob in every API call, add and keep file name association with related blob at bios_linker_loader_alloc() time. And find blob by name looking up allocated file entries inside of bios_linker_add_foo() commands. It will: - make API less confusing, - enforce calling bios_linker_loader_alloc() before calling any bios_linker_add_foo() - make sure that blob is the correct one, i.e. associated with the right file name Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2016-06-07acpi: convert linker from GArray to BIOSLinker structureIgor Mammedov3-9/+15
Patch just changes type of of linker variables to a structure, there aren't any functional changes. Converting linker to a structure will allow to extend it functionality in follow up patch adding sanity blob checks. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2016-06-07pc: use AcpiDeviceIfClass.send_event to issue GPE eventsIgor Mammedov4-9/+12
it reduces number of args passed in handlers by 1 and a number of used proxy wrappers saving ~20LOC. Also it allows to make cpu/mem hotplug code more universal as it would allow ARM to reuse it without rewrite by providing its own send_event callback to trigger events usiong GPIO instead of GPE as fixed hadrware ACPI model doen't have GPE at all. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2016-06-07acpi: extend ACPI interface to provide send_event hookIgor Mammedov2-8/+13
send_event() hook will allow to send ACPI event in a target specific way (GPE or GPIO based impl.) it will also simplify proxy wrappers in piix4pm/ich9 that access ACPI regs and SCI which are part of piix4pm/lcp_ich9 devices and call acpi_foo() API directly. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Marcel Apfelbaum <marcel@redhat.com>
2016-06-07ipmi: rework the fwinfo to be fetched from the interfaceCorey Minyard1-35/+39
Instead of scanning IPMI devices from a fwinfo list, allow the fwinfo to be fetched from the IPMI interface class. Then the code looking for IPMI fwinfo can scan devices on a bus and look for ones that implement the IPMI class. This will let the ACPI scope be defined by the calling code so the IPMI code doesn't have to know the scope. Signed-off-by: Corey Minyard <cminyard@mvista.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2016-06-07pc: acpi: simplify build_legacy_cpu_hotplug_aml() signatureIgor Mammedov1-1/+1
since IO block used by CPU hotplug is fixed size and initialized it the same file as build_legacy_cpu_hotplug_aml() just use ACPI_GPE_PROC_LEN directly instead of passing it around in several files. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Marcel Apfelbaum <marcel@redhat.com>
2016-06-07pc: acpi: mark current CPU hotplug functions as legacyIgor Mammedov1-6/+6
Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Marcel Apfelbaum <marcel@redhat.com>
2016-06-07pc: acpi: cpu-hotplug: make AML CPU_foo defines local to ↵Igor Mammedov1-7/+0
cpu_hotplug_acpi_table.c now as those defines are used only locally inside of cpu_hotplug_acpi_table.c, move them out of header file. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Marcel Apfelbaum <marcel@redhat.com>
2016-06-07pc: acpi: consolidate CPU hotplug AMLIgor Mammedov1-1/+2
move the former SSDT part of CPU hoplug close to DSDT part. AML is only moved but there isn't any functional change. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2016-06-07acpi: add aml_refof()Igor Mammedov1-0/+1
Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Marcel Apfelbaum <marcel@redhat.com>
2016-06-07acpi: add aml_debug()Igor Mammedov1-0/+1
Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Marcel Apfelbaum <marcel@redhat.com>
2016-06-07spapr_pci: Add and export DMA resetting helperAlexey Kardashevskiy1-0/+2
This will be later used by the "ibm,reset-pe-dma-window" RTAS handler which resets the DMA configuration to the defaults. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-06-07spapr_iommu: Add root memory regionAlexey Kardashevskiy1-1/+1
We are going to have multiple DMA windows at different offsets on a PCI bus. For the sake of migration, we will have as many TCE table objects pre-created as many windows supported. So we need a way to map windows dynamically onto a PCI bus when migration of a table is completed but at this stage a TCE table object does not have access to a PHB to ask it to map a DMA window backed by just migrated TCE table. This adds a "root" memory region (UINT64_MAX long) to the TCE object. This new region is mapped on a PCI bus with enabled overlapping as there will be one root MR per TCE table, each of them mapped at 0. The actual IOMMU memory region is a subregion of the root region and a TCE table enables/disables this subregion and maps it at the specific offset inside the root MR which is 1:1 mapping of a PCI address space. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-06-07spapr_iommu: Migrate full stateAlexey Kardashevskiy1-0/+3
The source guest could have reallocated the default TCE table and migrate bigger/smaller table. This adds reallocation in post_load() if the default table size is different on source and destination. This adds @bus_offset, @page_shift to the migration stream as a subsection so when DDW is added, migration to older machines will still be possible. As @bus_offset and @page_shift are not used yet, this makes no change in behavior. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-06-07spapr_iommu: Introduce "enabled" state for TCE tableAlexey Kardashevskiy1-5/+4
Currently TCE tables are created once at start and their sizes never change. We are going to change that by introducing a Dynamic DMA windows support where DMA configuration may change during the guest execution. This changes spapr_tce_new_table() to create an empty zero-size IOMMU memory region (IOMMU MR). Only LIOBN is assigned by the time of creation. It still will be called once at the owner object (VIO or PHB) creation. This introduces an "enabled" state for TCE table objects, some helper functions are added: - spapr_tce_table_enable() receives TCE table parameters, stores in sPAPRTCETable and allocates a guest view of the TCE table (in the user space or KVM) and sets the correct size on the IOMMU MR; - spapr_tce_table_disable() disposes the table and resets the IOMMU MR size; it is made public as the following DDW code will be using it. This changes the PHB reset handler to do the default DMA initialization instead of spapr_phb_realize(). This does not make differenct now but later with more than just one DMA window, we will have to remove them all and create the default one on a system reset. No visible change in behaviour is expected except the actual table will be reallocated every reset. We might optimize this later. The other way to implement this would be dynamically create/remove the TCE table QOM objects but this would make migration impossible as the migration code expects all QOM objects to exist at the receiver so we have to have TCE table objects created when migration begins. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-06-07vmstate: Define VARRAY with VMS_ALLOCAlexey Kardashevskiy1-0/+10
This allows dynamic allocation for migrating arrays. Already existing VMSTATE_VARRAY_UINT32 requires an array to be pre-allocated, however there are cases when the size is not known in advance and there is no real need to enforce it. This defines another variant of VMSTATE_VARRAY_UINT32 with WMS_ALLOC flag which tells the receiving side to allocate memory for the array before receiving the data. The first user of it is a dynamic DMA window which existence and size are totally dynamic. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-06-07kvm: API to obtain max supported mem slotsBharata B Rao1-0/+1
Introduce kvm_get_max_memslots() API that can be used to obtain the maximum number of memslots supported by KVM. Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com> Acked-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-06-06char: get rid of qemu_char_get_next_serialxiaoqiang zhao1-1/+0
since there is no user of qemu_char_get_next_serial any more, it's time to let it go away. Acked-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: xiaoqiang zhao <zxq_yx_007@163.com> Message-id: 1465028065-5855-7-git-send-email-zxq_yx_007@163.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-06-06hw/char: QOM'ify xilinx_uartlite modelxiaoqiang zhao1-0/+35
* drop qemu_char_get_next_serial and use chardev prop * create xilinx_uartlite_create wrapper function to create xilinx_uartlite device * change affected board code to use the new way Signed-off-by: xiaoqiang zhao <zxq_yx_007@163.com> Message-id: 1465028065-5855-6-git-send-email-zxq_yx_007@163.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-06-06hw/char: QOM'ify cadence_uart modelxiaoqiang zhao1-0/+17
* drop qemu_char_get_next_serial and use chardev prop * create cadence_uart_create wrapper function to create cadence_uart_device * change affected board code to use the new way Signed-off-by: xiaoqiang zhao <zxq_yx_007@163.com> Message-id: 1465028065-5855-3-git-send-email-zxq_yx_007@163.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-06-06hw/char: QOM'ify pl011 modelxiaoqiang zhao1-0/+52
* drop qemu_char_get_next_serial and use chardev prop * add pl011_create wrapper function to create pl011 uart device * change affected board code to use the new way Signed-off-by: xiaoqiang zhao <zxq_yx_007@163.com> Message-id: 1465028065-5855-2-git-send-email-zxq_yx_007@163.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-06-06hw/ptimer: Introduce ptimer_get_limitDmitry Osipenko1-0/+1
Currently ptimer users are used to store copy of the limit value, because ptimer doesn't provide facility to retrieve the limit. Let's provide it. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Message-id: 8f1fa9f90d8dbf8086fb02f3b4835eaeb4089cf6.1464367869.git.digetx@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-06-06xlnx-zynqmp: Make the RPU subsystem optionalEdgar E. Iglesias1-0/+2
The way we currently model the RPU subsystem is of quite limited use. In addition to that, it causes problems for KVM and for GDB debugging. Make the RPU optional by adding a has_rpu property and default to having it disabled. This changes the default setup from having the RPU to not longer having it. Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Message-id: 1464173555-12800-3-git-send-email-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-06-06xlnx-zynqmp: Add a secure prop to en/disable ARM Security ExtensionsEdgar E. Iglesias1-0/+3
Add a secure prop to en/disable ARM Security Extensions. This is particularly useful for KVM runs. Default to disabled to match the behavior of KVM. This changes the default setup from having the ARM Security Extensions to not longer having them. Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Message-id: 1464173555-12800-2-git-send-email-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-06-06i2c: add aspeed i2c controllerCédric Le Goater2-0/+64
The Aspeed AST2400 integrates a set of 14 I2C/SMBus bus controllers directly connected to the APB bus. They can be programmed as master or slave but the propopsed model only supports the master mode. On the TODO list, we also have : - improve and harden the state machine. - bus recovery support (used by the Linux driver). - transfer mode state machine bits. this is not strictly necessary as it is mostly used for debug. The bus busy bit is deducted from the I2C core engine of qemu. - support of the pool buffer: 2048 bytes of internal SRAM (not used by the Linux driver). Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Message-id: 1464704307-25178-1-git-send-email-clg@kaod.org [PMM: removed unused functions aspeed_i2c_bus_get_state() and aspeed_i2c_bus_set_state()] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-06-06virtio-gpu: add live migration supportGerd Hoffmann1-1/+3
Store some additional state for cursor and resource backing storage, so we can write out and reload things. Implement vmsave+vmload for 2d mode. Continue blocking live migration in 3d/virgl mode. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 1464009727-7753-1-git-send-email-kraxel@redhat.com
2016-06-02Merge remote-tracking branch 'remotes/jasowang/tags/net-pull-request' into ↵Peter Maydell10-104/+402
staging # gpg: Signature made Thu 02 Jun 2016 07:23:18 BST using RSA key ID 398D6211 # gpg: Good signature from "Jason Wang (Jason Wang on RedHat) <jasowang@redhat.com>" # gpg: WARNING: This key is not certified with sufficiently trusted signatures! # gpg: It is not certain that the signature belongs to the owner. # Primary key fingerprint: 215D 46F4 8246 689E C77F 3562 EF04 965B 398D 6211 * remotes/jasowang/tags/net-pull-request: (31 commits) Add ENET device to i.MX6 SOC. Add ENET/Gbps Ethernet support to FEC device i.MX: move FEC device to a register array structure. i.MX: Rename i.MX FEC defines to ENET_XXX i.MX: reset TX/RX descriptors when FEC is disabled. i.MX: Fix FEC code for ECR register reset value. i.MX: Fix FEC code for MDIO address selection i.MX: Fix FEC code for MDIO operation selection net: handle optional VLAN header in checksum computation. net: improve UDP/TCP checksum computation. e1000e: Introduce qtest for e1000e device net: Introduce e1000e device emulation e1000: Move out code that will be reused in e1000e e1000_regs: Add definitions for Intel 82574-specific bits vmxnet3: Use pci_dma_* API instead of cpu_physical_memory_* net_pkt: Extend packet abstraction as required by e1000e functionality rtl8139: Move more TCP definitions to common header net_pkt: Name vmxnet3 packet abstractions more generic vmxnet3: Use common MAC address tracing macros net: Add macros for MAC address tracing ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-06-02Add ENET device to i.MX6 SOC.Jean-Christophe Dubois1-2/+4
This adds the ENET device to the i.MX6 SOC. This was tested by booting Linux on an Qemu i.MX6 instance and accessing the internet from the linux guest. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Signed-off-by: Jason Wang <jasowang@redhat.com>
2016-06-02Add ENET/Gbps Ethernet support to FEC deviceJean-Christophe Dubois1-2/+129
The ENET device (present in i.MX6) is "derived" from FEC and backward compatible with it. This patch adds the necessary support of the added feature in the ENET device to allow Linux to use it (on supported processors). Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Signed-off-by: Jason Wang <jasowang@redhat.com>
2016-06-02i.MX: move FEC device to a register array structure.Jean-Christophe Dubois1-17/+34
This is to prepare for the ENET Gb device of the i.MX6. Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Signed-off-by: Jason Wang <jasowang@redhat.com>
2016-06-02i.MX: Rename i.MX FEC defines to ENET_XXXJean-Christophe Dubois1-32/+32
Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Signed-off-by: Jason Wang <jasowang@redhat.com>
2016-06-02net_pkt: Extend packet abstraction as required by e1000e functionalityDmitry Fleytman2-44/+110
This patch extends the TX/RX packet abstractions with features that will be used by the e1000e device implementation. Changes are: 1. Support iovec lists for RX buffers 2. Deeper RX packets parsing 3. Loopback option for TX packets 4. Extended VLAN headers handling 5. RSS processing for RX packets Signed-off-by: Dmitry Fleytman <dmitry.fleytman@ravellosystems.com> Signed-off-by: Leonid Bloch <leonid.bloch@ravellosystems.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Jason Wang <jasowang@redhat.com>
2016-06-02rtl8139: Move more TCP definitions to common headerDmitry Fleytman1-0/+8
Signed-off-by: Dmitry Fleytman <dmitry.fleytman@ravellosystems.com> Signed-off-by: Leonid Bloch <leonid.bloch@ravellosystems.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Jason Wang <jasowang@redhat.com>
2016-06-02net: Add macros for MAC address tracingDmitry Fleytman1-0/+5
These macros will be used by future commits introducing e1000e device emulation and by vmxnet3 tracing code. Signed-off-by: Dmitry Fleytman <dmitry.fleytman@ravellosystems.com> Signed-off-by: Leonid Bloch <leonid.bloch@ravellosystems.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Jason Wang <jasowang@redhat.com>
2016-06-02net: Introduce Toeplitz hash calculatorDmitry Fleytman1-0/+45
Signed-off-by: Dmitry Fleytman <dmitry.fleytman@ravellosystems.com> Signed-off-by: Leonid Bloch <leonid.bloch@ravellosystems.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Jason Wang <jasowang@redhat.com>
2016-06-02pcie: Introduce function for DSN capability creationDmitry Fleytman1-0/+1
Signed-off-by: Dmitry Fleytman <dmitry.fleytman@ravellosystems.com> Signed-off-by: Leonid Bloch <leonid.bloch@ravellosystems.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Jason Wang <jasowang@redhat.com>
2016-06-02pcie: Add support for PCIe CAP v1Dmitry Fleytman2-2/+7
Added support for PCIe CAP v1, while reusing some of the existing v2 infrastructure. Signed-off-by: Dmitry Fleytman <dmitry.fleytman@ravellosystems.com> Signed-off-by: Leonid Bloch <leonid.bloch@ravellosystems.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Jason Wang <jasowang@redhat.com>
2016-06-02pci: Introduce define for PM capability version 1.1Dmitry Fleytman1-0/+2
Signed-off-by: Dmitry Fleytman <dmitry.fleytman@ravellosystems.com> Signed-off-by: Leonid Bloch <leonid.bloch@ravellosystems.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Jason Wang <jasowang@redhat.com>
2016-06-02msix: make msix_clr_pending() visible for clientsDmitry Fleytman1-0/+1
This function will be used by e1000e device code. Signed-off-by: Dmitry Fleytman <dmitry.fleytman@ravellosystems.com> Signed-off-by: Leonid Bloch <leonid.bloch@ravellosystems.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Jason Wang <jasowang@redhat.com>
2016-06-02pci: fix unaligned access in pci_xxx_quad()Dmitry Fleytman1-2/+9
Replace legacy cpu_to_le64w()/le64_to_cpup() calls with stq_le_p()/ldq_le_p(). Motivation for this modification is that follow up patches add utility function pcie_dev_ser_num_init() for PCIe DSN capability creation which uses pci_set_quad() with a misaligned offset. Signed-off-by: Dmitry Fleytman <dmitry.fleytman@ravellosystems.com> Signed-off-by: Leonid Bloch <leonid.bloch@ravellosystems.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Jason Wang <jasowang@redhat.com>
generated by cgit v1.1 at 2025-01-03 23:10:32 +0000