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2020-07-06pc_basic_device_init: drop no_vmport argGerd Hoffmann1-1/+0
Now that we pass pcms anyway, we don't need the no_vmport arg any more. No functional change. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 20200702132525.6849-14-kraxel@redhat.com
2020-07-06pc_basic_device_init: drop has_pit argGerd Hoffmann1-1/+0
Now that we pass pcms anyway, we don't need the has_pit arg any more. No functional change. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 20200702132525.6849-13-kraxel@redhat.com
2020-07-06pc_basic_device_init: pass PCMachineStateGerd Hoffmann1-1/+2
Need access to pcms for pcspk initialization. Just preparation, no functional change. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 20200702132525.6849-12-kraxel@redhat.com
2020-07-06audio: add deprecated_register_soundhwGerd Hoffmann1-0/+2
Add helper function for -soundhw deprecation. It can replace the simple init functions which just call {isa,pci}_create_simple() with a hardcoded type. It also prints a deprecation message. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 20200702132525.6849-4-kraxel@redhat.com
2020-07-04Merge remote-tracking branch ↵Peter Maydell11-9/+105
'remotes/pmaydell/tags/pull-target-arm-20200703' into staging target-arm queue: * i.MX6UL EVK board: put PHYs in the correct places * hw/arm/virt: Let the virtio-iommu bypass MSIs * target/arm: kvm: Handle DABT with no valid ISS * hw/arm/virt-acpi-build: Only expose flash on older machine types * target/arm: Fix temp double-free in sve ldr/str * hw/display/bcm2835_fb.c: Initialize all fields of struct * hw/arm/spitz: Code cleanup to fix Coverity-detected memory leak * Deprecate TileGX port # gpg: Signature made Fri 03 Jul 2020 17:53:05 BST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20200703: (34 commits) Deprecate TileGX port Replace uses of FROM_SSI_SLAVE() macro with QOM casts hw/arm/spitz: Provide usual QOM macros for corgi-ssp and spitz-lcdtg hw/arm/pxa2xx_pic: Use LOG_GUEST_ERROR for bad guest register accesses hw/arm/spitz: Use LOG_GUEST_ERROR for bad guest register accesses hw/gpio/zaurus.c: Use LOG_GUEST_ERROR for bad guest register accesses hw/arm/spitz: Encapsulate misc GPIO handling in a device hw/misc/max111x: Create header file for documentation, TYPE_ macros hw/misc/max111x: Use GPIO lines rather than max111x_set_input() hw/arm/spitz: Use max111x properties to set initial values ssi: Add ssi_realize_and_unref() hw/misc/max111x: Don't use vmstate_register() hw/misc/max111x: provide QOM properties for setting initial values hw/arm/spitz: Implement inbound GPIO lines for bit5 and power signals hw/arm/spitz: Keep pointers to scp0, scp1 in SpitzMachineState hw/arm/spitz: Keep pointers to MPU and SSI devices in SpitzMachineState hw/arm/spitz: Create SpitzMachineClass abstract base class hw/arm/spitz: Detabify hw/display/bcm2835_fb.c: Initialize all fields of struct target/arm: Fix temp double-free in sve ldr/str ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-07-03Replace uses of FROM_SSI_SLAVE() macro with QOM castsPeter Maydell1-2/+0
The FROM_SSI_SLAVE() macro predates QOM and is used as a typesafe way to cast from an SSISlave* to the instance struct of a subtype of TYPE_SSI_SLAVE. Switch to using the QOM cast macros instead, which have the same effect (by writing the QOM macros if the types were previously missing them.) (The FROM_SSI_SLAVE() macro allows the SSISlave member of the subtype's struct to be anywhere as long as it is named "ssidev", whereas a QOM cast macro insists that it is the first thing in the subtype's struct. This is true for all the types we convert here.) This removes all the uses of FROM_SSI_SLAVE() so we can delete the definition. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20200628142429.17111-18-peter.maydell@linaro.org
2020-07-03hw/arm/pxa2xx_pic: Use LOG_GUEST_ERROR for bad guest register accessesPeter Maydell1-1/+0
Instead of using printf() for logging guest accesses to invalid register offsets in the pxa2xx PIC device, use the usual qemu_log_mask(LOG_GUEST_ERROR,...). This was the only user of the REG_FMT macro in pxa.h, so we can remove that. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20200628142429.17111-16-peter.maydell@linaro.org
2020-07-03hw/gpio/zaurus.c: Use LOG_GUEST_ERROR for bad guest register accessesPeter Maydell1-3/+0
Instead of logging guest accesses to invalid register offsets in this device using zaurus_printf() (which just prints to stderr), use the usual qemu_log_mask(LOG_GUEST_ERROR,...). Since this was the only use of the zaurus_printf() macro outside spitz.c, we can move the definition of that macro from sharpsl.h to spitz.c. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20200628142429.17111-14-peter.maydell@linaro.org
2020-07-03hw/misc/max111x: Create header file for documentation, TYPE_ macrosPeter Maydell1-0/+56
Create a header file for the hw/misc/max111x device, in the usual modern style for QOM devices: * definition of the TYPE_ constants and macros * definition of the device's state struct so that it can be embedded in other structs if desired * documentation of the interface This allows us to use TYPE_MAX_1111 in the spitz.c code rather than the string "max1111". Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20200628142429.17111-12-peter.maydell@linaro.org
2020-07-03hw/misc/max111x: Use GPIO lines rather than max111x_set_input()Peter Maydell1-3/+0
The max111x ADC device model allows other code to set the level on the 8 ADC inputs using the max111x_set_input() function. Replace this with generic qdev GPIO inputs, which also allow inputs to be set to arbitrary values. Using GPIO lines will make it easier for board code to wire things up, so that if device A wants to set the ADC input it doesn't need to have a direct pointer to the max111x but can just set that value on its output GPIO, which is then wired up by the board to the appropriate max111x input. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20200628142429.17111-11-peter.maydell@linaro.org
2020-07-03ssi: Add ssi_realize_and_unref()Peter Maydell1-0/+26
Add an ssi_realize_and_unref(), for the benefit of callers who want to be able to create an SSI device, set QOM properties on it, and then do the realize-and-unref afterwards. The API works on the same principle as the recently added qdev_realize_and_undef(), sysbus_realize_and_undef(), etc. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20200628142429.17111-9-peter.maydell@linaro.org
2020-07-03hw/arm/virt-acpi-build: Only expose flash on older machine typesAndrew Jones1-0/+1
The flash device is exclusively for the host-controlled firmware, so we should not expose it to the OS. Exposing it risks the OS messing with it, which could break firmware runtime services and surprise the OS when all its changes disappear after reboot. As firmware needs the device and uses DT, we leave the device exposed there. It's up to firmware to remove the nodes from DT before sending it on to the OS. However, there's no need to force firmware to remove tables from ACPI (which it doesn't know how to do anyway), so we simply don't add the tables in the first place. But, as we've been adding the tables for quite some time and don't want to change the default hardware exposed to versioned machines, then we only stop exposing the flash device tables for 5.1 and later machine types. Suggested-by: Ard Biesheuvel <ard.biesheuvel@arm.com> Suggested-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Andrew Jones <drjones@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Message-id: 20200629140938.17566-4-drjones@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-07-03hw/arm/virt: Let the virtio-iommu bypass MSIsEric Auger1-0/+7
At the moment the virtio-iommu translates MSI transactions. This behavior is inherited from ARM SMMU. The virt machine code knows where the guest MSI doorbells are so we can easily declare those regions as VIRTIO_IOMMU_RESV_MEM_T_MSI. With that setting the guest will not map MSIs through the IOMMU and those transactions will be simply bypassed. Depending on which MSI controller is in use (ITS or GICV2M), we declare either: - the ITS interrupt translation space (ITS_base + 0x10000), containing the GITS_TRANSLATOR or - The GICV2M single frame, containing the MSI_SETSP_NS register. Signed-off-by: Eric Auger <eric.auger@redhat.com> Message-id: 20200629070404.10969-6-eric.auger@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-07-03virtio-iommu: Implement RESV_MEM probe requestEric Auger1-0/+2
This patch implements the PROBE request. At the moment, only THE RESV_MEM property is handled. The first goal is to report iommu wide reserved regions such as the MSI regions set by the machine code. On x86 this will be the IOAPIC MSI region, [0xFEE00000 - 0xFEEFFFFF], on ARM this may be the ITS doorbell. In the future we may introduce per device reserved regions. This will be useful when protecting host assigned devices which may expose their own reserved regions Signed-off-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Jean-Philippe Brucker <jean-philippe@linaro.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Message-id: 20200629070404.10969-3-eric.auger@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-07-03qdev: Introduce DEFINE_PROP_RESERVED_REGIONEric Auger3-0/+10
Introduce a new property defining a reserved region: <low address>:<high address>:<type>. This will be used to encode reserved IOVA regions. For instance, in virtio-iommu use case, reserved IOVA regions will be passed by the machine code to the virtio-iommu-pci device (an array of those). The type of the reserved region will match the virtio_iommu_probe_resv_mem subtype value: - VIRTIO_IOMMU_RESV_MEM_T_RESERVED (0) - VIRTIO_IOMMU_RESV_MEM_T_MSI (1) on PC/Q35 machine, this will be used to inform the virtio-iommu-pci device it should bypass the MSI region. The reserved region will be: 0xfee00000:0xfeefffff:1. On ARM, we can declare the ITS MSI doorbell as an MSI region to prevent MSIs from being mapped on guest side. Signed-off-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Message-id: 20200629070404.10969-2-eric.auger@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-07-03Add the ability to select a different PHY for each i.MX6UL FEC interfaceJean-Christophe Dubois1-0/+2
Add properties to the i.MX6UL processor to be able to select a particular PHY on the MDIO bus for each FEC device. Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Message-id: ea1d604198b6b73ea6521676e45bacfc597aba53.1593296112.git.jcd@tribudubois.net Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-07-03Add a phy-num property to the i.MX FEC emulatorJean-Christophe Dubois1-0/+1
We need a solution to use an Ethernet PHY that is not the first device on the MDIO bus (device 0 on MDIO bus). As an example with the i.MX6UL the NXP SOC has 2 Ethernet devices but only one MDIO bus on which the 2 related PHY are connected but at unique addresses. Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Message-id: a1a5c0e139d1c763194b8020573dcb6025daeefa.1593296112.git.jcd@tribudubois.net Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-07-03migration: Count new_dirty instead of real_dirtyKeqian Zhu1-4/+1
real_dirty_pages becomes equal to total ram size after dirty log sync in ram_init_bitmaps, the reason is that the bitmap of ramblock is initialized to be all set, so old path counts them as "real dirty" at beginning. This causes wrong dirty rate and false positive throttling. Signed-off-by: Keqian Zhu <zhukeqian1@huawei.com> Message-Id: <20200622032037.31112-1-zhukeqian1@huawei.com> Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
2020-07-02qdev: Drop qbus_set_hotplug_handler() parameter @errpMarkus Armbruster1-2/+1
qbus_set_hotplug_handler() is a simple wrapper around object_property_set_link(). object_property_set_link() fails when the property doesn't exist, is not settable, or its .check() method fails. These are all programming errors here, so passing &error_abort to qbus_set_hotplug_handler() is appropriate. Most of its callers do. Exceptions: * pcie_cap_slot_init(), shpc_init(), spapr_phb_realize() pass NULL, i.e. they ignore errors. * spapr_machine_init() passes &error_fatal. * s390_pcihost_realize(), virtio_serial_device_realize(), s390_pcihost_plug() pass the error to their callers. The latter two keep going after the error, which looks wrong. Drop the @errp parameter, and instead pass &error_abort to object_property_set_link(). Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: "Daniel P. Berrangé" <berrange@redhat.com> Cc: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20200630090351.1247703-15-armbru@redhat.com>
2020-07-02qdev: Drop qbus_set_bus_hotplug_handler() parameter @errpMarkus Armbruster1-1/+1
All callers pass &error_abort. Drop the parameter. Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: "Daniel P. Berrangé" <berrange@redhat.com> Cc: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20200630090351.1247703-14-armbru@redhat.com>
2020-06-26Merge remote-tracking branch ↵Peter Maydell3-16/+14
'remotes/pmaydell/tags/pull-target-arm-20200626' into staging target-arm queue: * hw/arm/aspeed: improve QOM usage * hw/misc/pca9552: trace GPIO change events * target/arm: Implement ARMv8.5-MemTag for system emulation # gpg: Signature made Fri 26 Jun 2020 16:13:27 BST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20200626: (57 commits) target/arm: Enable MTE target/arm: Add allocation tag storage for system mode target/arm: Create tagged ram when MTE is enabled target/arm: Cache the Tagged bit for a page in MemTxAttrs target/arm: Always pass cacheattr to get_phys_addr target/arm: Set PSTATE.TCO on exception entry target/arm: Implement data cache set allocation tags target/arm: Complete TBI clearing for user-only for SVE target/arm: Add mte helpers for sve scatter/gather memory ops target/arm: Handle TBI for sve scalar + int memory ops target/arm: Add mte helpers for sve scalar + int ff/nf loads target/arm: Add mte helpers for sve scalar + int stores target/arm: Add mte helpers for sve scalar + int loads target/arm: Add arm_tlb_bti_gp target/arm: Tidy trans_LD1R_zpri target/arm: Use mte_check1 for sve LD1R target/arm: Use mte_checkN for sve unpredicated stores target/arm: Use mte_checkN for sve unpredicated loads target/arm: Add helper_mte_check_zva target/arm: Implement helper_mte_checkN ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-06-26Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell6-20/+62
* Various fixes * libdaxctl support to correctly align devdax character devices (Jingqi) * initial-all-set support for live migration (Jay) * forbid '-numa node, mem' for 5.1 and newer machine types (Igor) * x87 fixes (Joseph) * Tighten memory_region_access_valid (Michael) and fix fallout (myself) * Replay fixes (Pavel) # gpg: Signature made Fri 26 Jun 2020 14:42:17 BST # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini/tags/for-upstream: (31 commits) i386: Mask SVM features if nested SVM is disabled ibex_uart: fix XOR-as-pow vmport: move compat properties to hw_compat_5_0 hyperv: vmbus: Remove the 2nd IRQ kvm: i386: allow TSC to differ by NTP correction bounds without TSC scaling numa: forbid '-numa node, mem' for 5.1 and newer machine types osdep: Make MIN/MAX evaluate arguments only once target/i386: Add notes for versioned CPU models target/i386: reimplement fpatan using floatx80 operations target/i386: reimplement fyl2x using floatx80 operations target/i386: reimplement fyl2xp1 using floatx80 operations target/i386: reimplement fprem, fprem1 using floatx80 operations softfloat: return low bits of quotient from floatx80_modrem softfloat: do not set denominator high bit for floatx80 remainder softfloat: do not return pseudo-denormal from floatx80 remainder softfloat: fix floatx80 remainder pseudo-denormal check for zero softfloat: merge floatx80_mod and floatx80_rem target/i386: reimplement f2xm1 using floatx80 operations xen: Actually fix build without passthrough Makefile: Install qemu-[qmp/ga]-ref.* into the directory "interop" ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-06-26hyperv: vmbus: Remove the 2nd IRQJon Doron1-2/+1
It seems like Windows does not really require 2 IRQs to have a functioning VMBus. Signed-off-by: Jon Doron <arilou@gmail.com> Message-Id: <20200617160904.681845-2-arilou@gmail.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-06-26osdep: Make MIN/MAX evaluate arguments only onceEric Blake4-18/+58
I'm not aware of any immediate bugs in qemu where a second runtime evaluation of the arguments to MIN() or MAX() causes a problem, but proactively preventing such abuse is easier than falling prey to an unintended case down the road. At any rate, here's the conversation that sparked the current patch: https://lists.gnu.org/archive/html/qemu-devel/2018-12/msg05718.html Update the MIN/MAX macros to only evaluate their argument once at runtime; this uses typeof(1 ? (a) : (b)) to ensure that we are promoting the temporaries to the same type as the final comparison (we have to trigger type promotion, as typeof(bitfield) won't compile; and we can't use typeof((a) + (b)) or even typeof((a) + 0), as some of our uses of MAX are on void* pointers where such addition is undefined). However, we are unable to work around gcc refusing to compile ({}) in a constant context (such as the array length of a static variable), even when only used in the dead branch of a __builtin_choose_expr(), so we have to provide a second macro pair MIN_CONST and MAX_CONST for use when both arguments are known to be compile-time constants and where the result must also be usable as a constant; this second form evaluates arguments multiple times but that doesn't matter for constants. By using a void expression as the expansion if a non-constant is presented to this second form, we can enlist the compiler to ensure the double evaluation is not attempted on non-constants. Alas, as both macros now rely on compiler intrinsics, they are no longer usable in preprocessor #if conditions; those will just have to be open-coded or the logic rewritten into #define or runtime 'if' conditions (but where the compiler dead-code-elimination will probably still apply). I tested that both gcc 10.1.1 and clang 10.0.0 produce errors for all forms of macro mis-use. As the errors can sometimes be cryptic, I'm demonstrating the gcc output: Use of MIN when MIN_CONST is needed: In file included from /home/eblake/qemu/qemu-img.c:25: /home/eblake/qemu/include/qemu/osdep.h:249:5: error: braced-group within expression allowed only inside a function 249 | ({ \ | ^ /home/eblake/qemu/qemu-img.c:92:12: note: in expansion of macro ‘MIN’ 92 | char array[MIN(1, 2)] = ""; | ^~~ Use of MIN_CONST when MIN is needed: /home/eblake/qemu/qemu-img.c: In function ‘is_allocated_sectors’: /home/eblake/qemu/qemu-img.c:1225:15: error: void value not ignored as it ought to be 1225 | i = MIN_CONST(i, n); | ^ Use of MIN in the preprocessor: In file included from /home/eblake/qemu/accel/tcg/translate-all.c:20: /home/eblake/qemu/accel/tcg/translate-all.c: In function ‘page_check_range’: /home/eblake/qemu/include/qemu/osdep.h:249:6: error: token "{" is not valid in preprocessor expressions 249 | ({ \ | ^ Fix the resulting callsites that used #if or computed a compile-time constant min or max to use the new macros. cpu-defs.h is interesting, as CPU_TLB_DYN_MAX_BITS is sometimes used as a constant and sometimes dynamic. It may be worth improving glib's MIN/MAX definitions to be saner, but that is a task for another day. Signed-off-by: Eric Blake <eblake@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200625162602.700741-1-eblake@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-06-26softfloat: return low bits of quotient from floatx80_modremJoseph Myers1-1/+2
Both x87 and m68k need the low parts of the quotient for their remainder operations. Arrange for floatx80_modrem to track those bits and return them via a pointer. The architectures using float32_rem and float64_rem do not appear to need this information, so the *_rem interface is left unchanged and the information returned only from floatx80_modrem. The logic used to determine the low 7 bits of the quotient for m68k (target/m68k/fpu_helper.c:make_quotient) appears completely bogus (it looks at the result of converting the remainder to integer, the quotient having been discarded by that point); this patch does not change that, but the m68k maintainers may wish to do so. Signed-off-by: Joseph Myers <joseph@codesourcery.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <alpine.DEB.2.21.2006081656500.23637@digraph.polyomino.org.uk> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-06-26softfloat: merge floatx80_mod and floatx80_remJoseph Myers1-0/+2
The m68k-specific softfloat code includes a function floatx80_mod that is extremely similar to floatx80_rem, but computing the remainder based on truncating the quotient toward zero rather than rounding it to nearest integer. This is also useful for emulating the x87 fprem and fprem1 instructions. Change the floatx80_rem implementation into floatx80_modrem that can perform either operation, with both floatx80_rem and floatx80_mod as thin wrappers available for all targets. There does not appear to be any use for the _mod operation for other floating-point formats in QEMU (the only other architectures using _rem at all are linux-user/arm/nwfpe, for FPA emulation, and openrisc, for instructions that have been removed in the latest version of the architecture), so no change is made to the code for other formats. Signed-off-by: Joseph Myers <joseph@codesourcery.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <alpine.DEB.2.21.2006081654280.23637@digraph.polyomino.org.uk> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-06-26hw/misc/pca9552: Model qdev output GPIOsPhilippe Mathieu-Daudé1-0/+1
The PCA9552 has 16 GPIOs which can be used as input, output or PWM mode. QEMU models the output GPIO with the qemu_irq type. Let the device expose the 16 GPIOs to allow us to later connect LEDs to these outputs. Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Cédric Le Goater <clg@kaod.org> Message-id: 20200623072723.6324-10-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-06-26hw/misc/pca9552: Add a 'description' property for debugging purposePhilippe Mathieu-Daudé1-0/+1
Add a description field to distinguish between multiple devices. Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Cédric Le Goater <clg@kaod.org> Message-id: 20200623072723.6324-6-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-06-26hw/misc/pca9552: Add generic PCA955xClass, parent of TYPE_PCA9552Philippe Mathieu-Daudé1-3/+3
Extract the code common to the PCA955x family in PCA955xClass, keeping the PCA9552 specific parts into pca9552_class_init(). Remove the 'TODO' comment added in commit 5141d4158cf. Suggested-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Cédric Le Goater <clg@kaod.org> Message-id: 20200623072723.6324-5-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-06-26hw/misc/pca9552: Rename generic code as pca955xPhilippe Mathieu-Daudé1-5/+5
Various code from the PCA9552 device model is generic to the PCA955X family. We'll split the generic code in a base class in the next commit. To ease review, first do a dumb renaming. Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Cédric Le Goater <clg@kaod.org> Message-id: 20200623072723.6324-4-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-06-26hw/misc/pca9552: Rename 'nr_leds' as 'pin_count'Philippe Mathieu-Daudé1-1/+1
The PCA9552 device does not expose LEDs, but simple pins to connnect LEDs to. To be clearer with the device model, rename 'nr_leds' as 'pin_count'. Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Cédric Le Goater <clg@kaod.org> Message-id: 20200623072723.6324-3-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-06-26hw/i2c/core: Add i2c_try_create_slave() and i2c_realize_and_unref()Philippe Mathieu-Daudé1-0/+2
Extract i2c_try_create_slave() and i2c_realize_and_unref() from i2c_create_slave(). We can now set properties on a I2CSlave before it is realized. This is in line with the recent qdev/QOM changes merged in commit 6675a653d2e. Reviewed-by: Corey Minyard <cminyard@mvista.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Markus Armbruster <armbru@redhat.com> Tested-by: Cédric Le Goater <clg@kaod.org> Message-id: 20200623072723.6324-2-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-06-26hw/arm/aspeed: QOM'ify AspeedMachineStatePhilippe Mathieu-Daudé1-7/+1
AspeedMachineState seems crippled. We use incorrectly 2 different structures to do the same thing. Merge them altogether: - Move AspeedMachine fields to AspeedMachineState - AspeedMachineState is now QOM - Remove unused AspeedMachine structure Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-id: 20200623072132.2868-4-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-06-26hw/arm/aspeed: Rename AspeedBoardState as AspeedMachineStatePhilippe Mathieu-Daudé1-2/+2
To have a more consistent naming, rename AspeedBoardState as AspeedMachineState. Suggested-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-id: 20200623072132.2868-3-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-06-26Merge remote-tracking branch 'remotes/stefanha/tags/block-pull-request' into ↵Peter Maydell1-0/+5
staging Pull request # gpg: Signature made Wed 24 Jun 2020 11:01:57 BST # gpg: using RSA key 8695A8BFD3F97CDAAC35775A9CA4ABB381AB73C8 # gpg: Good signature from "Stefan Hajnoczi <stefanha@redhat.com>" [full] # gpg: aka "Stefan Hajnoczi <stefanha@gmail.com>" [full] # Primary key fingerprint: 8695 A8BF D3F9 7CDA AC35 775A 9CA4 ABB3 81AB 73C8 * remotes/stefanha/tags/block-pull-request: block/nvme: support nested aio_poll() block/nvme: keep BDRVNVMeState pointer in NVMeQueuePair block/nvme: clarify that free_req_queue is protected by q->lock block/nvme: switch to a NVMeRequest freelist block/nvme: don't access CQE after moving cq.head block/nvme: drop tautologous assertion block/nvme: poll queues without q->lock check-block: enable iotests with SafeStack configure: add flags to support SafeStack coroutine: add check for SafeStack in sigaltstack coroutine: support SafeStack in ucontext backend minikconf: explicitly set encoding to UTF-8 Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-06-26Merge remote-tracking branch 'remotes/mcayland/tags/qemu-macppc-20200626' ↵Peter Maydell4-10/+26
into staging qemu-macppc patches # gpg: Signature made Fri 26 Jun 2020 10:15:36 BST # gpg: using RSA key CC621AB98E82200D915CC9C45BC2C56FAE0F321F # gpg: issuer "mark.cave-ayland@ilande.co.uk" # gpg: Good signature from "Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>" [full] # Primary key fingerprint: CC62 1AB9 8E82 200D 915C C9C4 5BC2 C56F AE0F 321F * remotes/mcayland/tags/qemu-macppc-20200626: (22 commits) adb: add ADB bus trace events adb: use adb_device prefix for ADB device trace events adb: only call autopoll callbacks when autopoll is not blocked mac_via: rework ADB state machine to be compatible with both MacOS and Linux mac_via: move VIA1 portB write logic into mos6522_q800_via1_write() pmu: add adb_autopoll_block() and adb_autopoll_unblock() functions cuda: add adb_autopoll_block() and adb_autopoll_unblock() functions adb: add autopoll_blocked variable to block autopoll adb: use adb_request() only for explicit requests adb: add status field for holding information about the last ADB request adb: keep track of devices with pending data adb: introduce new ADBDeviceHasData method to ADBDeviceClass mac_via: convert to use ADBBusState internal autopoll variables pmu: convert to use ADBBusState internal autopoll variables cuda: convert to use ADBBusState internal autopoll variables adb: create autopoll variables directly within ADBBusState adb: introduce realize/unrealize and VMStateDescription for ADB bus pmu: honour autopoll_rate_ms when rearming the ADB autopoll timer pmu: fix duplicate autopoll mask variable cuda: convert ADB autopoll timer from ns to ms ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-06-26mac_via: rework ADB state machine to be compatible with both MacOS and LinuxMark Cave-Ayland1-0/+1
The existing ADB state machine is designed to work with Linux which has a different interpretation of the state machine detailed in "Guide to the Macintosh Family Hardware". In particular the current Linux implementation includes an extra change to IDLE state when switching the VIA between send and receive modes which does not occur in MacOS, and omitting this transition causes the current mac_via ADB state machine to fail. Rework the ADB state machine accordingly so that it can enumerate and autopoll the ADB under both Linux and MacOS, including the addition of the new adb_autopoll_block() and adb_autopoll_unblock() functions. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Tested-by: Finn Thain <fthain@telegraphics.com.au> Acked-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20200623204936.24064-20-mark.cave-ayland@ilande.co.uk>
2020-06-26adb: add autopoll_blocked variable to block autopollMark Cave-Ayland1-0/+4
Whilst autopoll is enabled it is necessary to prevent the ADB buffer contents from being overwritten until the host has read back the response in its entirety. Add adb_autopoll_block() and adb_autopoll_unblock() functions in preparation for ensuring that the ADB buffer contents are protected for explicit ADB requests. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Tested-by: Finn Thain <fthain@telegraphics.com.au> Acked-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20200623204936.24064-16-mark.cave-ayland@ilande.co.uk>
2020-06-26adb: add status field for holding information about the last ADB requestMark Cave-Ayland1-0/+4
Currently only 2 bits are defined: one to indicate if the request timed out (no reply) and another to indicate whether the request was the result of an autopoll operation. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Tested-by: Finn Thain <fthain@telegraphics.com.au> Acked-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20200623204936.24064-14-mark.cave-ayland@ilande.co.uk>
2020-06-26adb: keep track of devices with pending dataMark Cave-Ayland1-0/+1
Add a new pending variable to ADBBusState which is a bitmask indicating which ADB devices have data to send. Update the bitmask every time that an ADB request is executed. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Tested-by: Finn Thain <fthain@telegraphics.com.au> Acked-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20200623204936.24064-13-mark.cave-ayland@ilande.co.uk>
2020-06-26adb: introduce new ADBDeviceHasData method to ADBDeviceClassMark Cave-Ayland1-0/+3
This is required later to allow devices to assert a service request (SRQ) signal to indicate that it has data to send, without having to consume it. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Tested-by: Finn Thain <fthain@telegraphics.com.au> Acked-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20200623204936.24064-12-mark.cave-ayland@ilande.co.uk>
2020-06-26mac_via: convert to use ADBBusState internal autopoll variablesMark Cave-Ayland1-1/+0
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Tested-by: Finn Thain <fthain@telegraphics.com.au> Acked-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20200623204936.24064-11-mark.cave-ayland@ilande.co.uk>
2020-06-26pmu: convert to use ADBBusState internal autopoll variablesMark Cave-Ayland1-3/+0
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Tested-by: Finn Thain <fthain@telegraphics.com.au> Acked-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20200623204936.24064-10-mark.cave-ayland@ilande.co.uk>
2020-06-26cuda: convert to use ADBBusState internal autopoll variablesMark Cave-Ayland1-4/+0
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Tested-by: Finn Thain <fthain@telegraphics.com.au> Acked-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20200623204936.24064-9-mark.cave-ayland@ilande.co.uk>
2020-06-26adb: create autopoll variables directly within ADBBusStateMark Cave-Ayland1-0/+13
Rather than each ADB implementation requiring its own functions to manage autopoll state, timers, and autopoll masks prepare to move this information directly into ADBBusState. Add external functions within adb.h to allow each ADB implementation to manage the new autopoll variables. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Tested-by: Finn Thain <fthain@telegraphics.com.au> Acked-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20200623204936.24064-8-mark.cave-ayland@ilande.co.uk>
2020-06-26pmu: fix duplicate autopoll mask variableMark Cave-Ayland1-1/+0
It seems that during the initial work to introduce the via-pmu ADB support a duplicate autopoll mask variable was accidentally left in place. Remove the duplicate autopoll_mask variable and switch everything over to use adb_poll_mask instead. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Tested-by: Finn Thain <fthain@telegraphics.com.au> Acked-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20200623204936.24064-5-mark.cave-ayland@ilande.co.uk>
2020-06-26adb: fix adb-mouse read length and revert disable-reg3-direct-writes workaroundMark Cave-Ayland1-1/+0
Commit 84051eb400 "adb: add property to disable direct reg 3 writes" introduced a workaround for spurious writes to ADB register 3 when MacOS 9 enables autopoll on the mouse device. Further analysis shows that the problem is that only a partial request is sent, and since the len parameter is ignored then stale data from the previous request is used causing the incorrect address assignment. Remove the disable-reg3-direct-writes workaround and instead check the length parameter when the write is attempted, discarding the invalid request. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Tested-by: Finn Thain <fthain@telegraphics.com.au> Acked-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20200623204936.24064-3-mark.cave-ayland@ilande.co.uk>
2020-06-26spapr: Fix typos in comments and macro indentationGustavo Romero1-1/+1
This commit fixes typos in spapr_vio_reg_to_irq() comments and a macro indentation. Signed-off-by: Gustavo Romero <gromero@linux.ibm.com> Message-Id: <1590710681-12873-1-git-send-email-gromero@linux.ibm.com> Acked-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2020-06-25Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into stagingPeter Maydell3-21/+1
virtio,acpi,pci: fixes, cleanups. Fixes, cleanups in ACPI, PCI, virtio. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # gpg: Signature made Thu 25 Jun 2020 07:48:47 BST # gpg: using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469 # gpg: issuer "mst@redhat.com" # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [full] # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" [full] # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * remotes/mst/tags/for_upstream: Rename use_acpi_pci_hotplug to more appropriate use_acpi_hotplug_bridge Stop vhost-user sending uninitialized mmap_offsets docs/specs/tpm: ACPI boot now supported for TPM/ARM arm/acpi: Add the TPM2.0 device under the DSDT acpi: Some build_tpm2() code reshape tests/acpi: update expected data files acpi: q35: drop _SB.PCI0.ISA.LPCD opregion. acpi: drop build_piix4_pm() acpi: drop serial/parallel enable bits from dsdt acpi: simplify build_isa_devices_aml() acpi: factor out fw_cfg_add_acpi_dsdt() acpi: move aml builder code for i8042 (kbd+mouse) device floppy: move cmos_get_fd_drive_type() from pc floppy: make isa_fdc_get_drive_max_chs static acpi: move aml builder code for floppy device acpi: bios-tables-test: show more context on asl diffs qtest: allow DSDT acpi table changes Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-06-25Merge remote-tracking branch 'remotes/armbru/tags/pull-qdev-2020-06-23' into ↵Peter Maydell3-4/+18
staging Qdev patches for 2020-06-23 # gpg: Signature made Tue 23 Jun 2020 15:08:28 BST # gpg: using RSA key 354BC8B3D7EB2A6B68674E5F3870B400EB918653 # gpg: issuer "armbru@redhat.com" # gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" [full] # gpg: aka "Markus Armbruster <armbru@pond.sub.org>" [full] # Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653 * remotes/armbru/tags/pull-qdev-2020-06-23: sd/milkymist-memcard: Fix error API violation sd/pxa2xx_mmci: Don't crash on pxa2xx_mmci_init() error arm/aspeed: Drop aspeed_board_init_flashes() parameter @errp qdev: Make qdev_prop_set_drive() match the other helpers qdev: Reject chardev property override qdev: Reject drive property override qdev: Improve netdev property override error a bit qdev: Eliminate get_pointer(), set_pointer() blockdev: Deprecate -drive with bogus interface type docs/qdev-device-use.txt: Update section "Default Devices" fdc: Deprecate configuring floppies with -global isa-fdc fdc: Open-code fdctrl_init_isa() fdc: Reject clash between -drive if=floppy and -global isa-fdc iotests/172: Cover -global floppy.drive=... iotests/172: Cover empty filename and multiple use of drives iotests/172: Include "info block" in test output Signed-off-by: Peter Maydell <peter.maydell@linaro.org>