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2020-09-09hw/riscv: Move sifive_clint model to hw/intcBin Meng1-0/+0
2020-09-09hw/riscv: Move sifive_gpio model to hw/gpioBin Meng3-2/+2
2020-09-09hw/riscv: Move sifive_u_otp model to hw/miscBin Meng2-1/+1
2020-09-09hw/riscv: Move sifive_u_prci model to hw/miscBin Meng2-1/+1
2020-09-09hw/riscv: Move sifive_e_prci model to hw/miscBin Meng1-0/+0
2020-09-09hw/riscv: sifive_u: Connect a DMA controllerBin Meng1-0/+11
2020-09-09hw/riscv: clint: Avoid using hard-coded timebase frequencyBin Meng1-1/+3
2020-09-09hw/riscv: microchip_pfsoc: Hook GPIO controllersBin Meng1-0/+3
2020-09-09hw/riscv: microchip_pfsoc: Connect 2 Cadence GEMsBin Meng1-0/+7
2020-09-09hw/net: cadence_gem: Add a new 'phy-addr' propertyBin Meng1-0/+2
2020-09-09hw/riscv: microchip_pfsoc: Connect a DMA controllerBin Meng1-0/+11
2020-09-09hw/dma: Add SiFive platform DMA controller emulationBin Meng1-0/+57
2020-09-09hw/riscv: microchip_pfsoc: Connect a Cadence SDHCI controller and an SD cardBin Meng1-0/+4
2020-09-09hw/sd: Add Cadence SDHCI emulationBin Meng1-0/+47
2020-09-09hw/riscv: microchip_pfsoc: Connect 5 MMUARTsBin Meng1-0/+20
2020-09-09hw/char: Add Microchip PolarFire SoC MMUART emulationBin Meng1-0/+61
2020-09-09hw/riscv: Initial support for Microchip PolarFire SoC Icicle Kit boardBin Meng1-0/+88
2020-09-09hw/riscv: hart: Add a new 'resetvec' propertyBin Meng1-0/+1
2020-09-09pc87312: Rename TYPE_PC87312_SUPERIO to TYPE_PC87312Eduardo Habkost1-2/+2
2020-09-09sabre: Rename SABRE_DEVICE to SABREEduardo Habkost1-1/+1
2020-09-09esp: Rename ESP_STATE to ESPEduardo Habkost1-1/+1
2020-09-09ahci: Rename ICH_AHCI to ICH9_AHCIEduardo Habkost1-1/+1
2020-09-09vmgenid: Rename VMGENID_DEVICE to TYPE_VMGENIDEduardo Habkost1-3/+3
2020-09-09ap-device: Rename AP_DEVICE_TYPE to TYPE_AP_DEVICEEduardo Habkost1-2/+2
2020-09-09gpex: Fix type checking function nameEduardo Habkost1-1/+1
2020-09-09Use OBJECT_DECLARE_SIMPLE_TYPE when possibleEduardo Habkost8-40/+16
2020-09-09Use OBJECT_DECLARE_TYPE where possibleEduardo Habkost45-180/+90
2020-09-09Use DECLARE_*CHECKER* when possible (--force mode)Eduardo Habkost4-18/+12
2020-09-09Use DECLARE_*CHECKER* macrosEduardo Habkost379-1338/+994
2020-09-09Move QOM typedefs and add missing includesEduardo Habkost379-918/+1661
2020-09-08Delete duplicate QOM typedefsEduardo Habkost1-4/+4
2020-09-08qom: Make type checker functions accept const pointersEduardo Habkost1-3/+3
2020-09-08qom: DECLARE_*_CHECKERS macrosEduardo Habkost1-14/+58
2020-09-08qom: Allow class type name to be specified in OBJECT_DECLARE*Eduardo Habkost1-17/+18
2020-09-08qom: provide convenient macros for declaring and defining typesDaniel P. Berrangé1-0/+277
2020-09-08qom: make object_ref/unref use a void * instead of Object *.Daniel P. Berrangé1-2/+2
2020-09-08memory: Remove kernel-doc comment markerEduardo Habkost1-1/+1
2020-09-08spapr_numa: create a vcpu associativity helperDaniel Henrique Barboza1-1/+6
2020-09-08spapr, spapr_numa: move lookup-arrays handling to spapr_numa.cDaniel Henrique Barboza1-0/+2
2020-09-08spapr, spapr_numa: handle vcpu ibm,associativityDaniel Henrique Barboza1-0/+2
2020-09-08spapr: introduce SpaprMachineState::numa_assoc_arrayDaniel Henrique Barboza3-1/+24
2020-09-08ppc/spapr_nvdimm: turn spapr_dt_nvdimm() staticDaniel Henrique Barboza1-1/+0
2020-09-08ppc: introducing spapr_numa.c NUMA code helperDaniel Henrique Barboza1-0/+20
2020-09-08target/arm: Move start-powered-off property to generic CPUStateThiago Jung Bauermann1-0/+4
2020-09-08spapr, spapr_nvdimm: fold NVDIMM validation in the same placeDaniel Henrique Barboza1-2/+2
2020-09-08ppc/pnv: Add a HIOMAP erase commandCédric Le Goater1-0/+1
2020-09-08spapr/xive: Add a 'hv-prio' property to represent the KVM escalation priorityCédric Le Goater1-0/+2
2020-09-08spapr: Remove unnecessary DRC type-checker macrosDavid Gibson1-42/+1
2020-09-07block: Leave BDS.backing_{file,format} constantMax Reitz1-5/+16
2020-09-07block: Inline bdrv_co_block_status_from_*()Max Reitz1-22/+0
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