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2019-12-17ppc/pnv: Drop PnvPsiClass::chip_typeGreg Kurz1-1/+0
2019-12-17ppc/pnv: Introduce PnvPsiClass::compatGreg Kurz1-0/+2
2019-12-17ppc: Drop useless extern annotation for functionsGreg Kurz2-14/+14
2019-12-17ppc/pnv: Fix OCC common area region mappingCédric Le Goater2-2/+10
2019-12-17ppc/pnv: Introduce PBA registersCédric Le Goater3-10/+15
2019-12-17ppc/pnv: Make PnvXScomInterface an incomplete typeGreg Kurz1-4/+2
2019-12-17target/ppc: Work [S]PURR implementation and add HV supportSuraj Jitindar Singh1-2/+1
2019-12-17target/ppc: Implement the VTB for HV accessSuraj Jitindar Singh1-0/+1
2019-12-17ppc/pnv: add a LPC Controller model for POWER10Cédric Le Goater2-1/+9
2019-12-17ppc/pnv: add a PSI bridge model for POWER10Cédric Le Goater3-0/+14
2019-12-17ppc/pnv: Introduce a POWER10 PnvChip and a powernv10 machineCédric Le Goater2-0/+52
2019-12-17ppc: Deassert the external interrupt pin in KVM on resetGreg Kurz1-0/+2
2019-12-17spapr: Simplify ovec diffDavid Gibson1-3/+1
2019-12-17spapr: Fold h_cas_compose_response() into h_client_architecture_support()David Gibson1-3/+1
2019-12-17ppc/pnv: Dump the XIVE NVT tableCédric Le Goater1-0/+3
2019-12-17ppc/pnv: Extend XiveRouter with a get_block_id() handlerCédric Le Goater1-1/+1
2019-12-17ppc/pnv: Introduce a pnv_xive_block_id() helperCédric Le Goater1-3/+0
2019-12-17ppc/xive: Introduce a xive_tctx_ipb_update() helperCédric Le Goater1-0/+1
2019-12-17ppc/xive: Remove the get_tctx() XiveRouter handlerCédric Le Goater1-2/+0
2019-12-17ppc/xive: Move the TIMA operations to the controller modelCédric Le Goater1-1/+0
2019-12-17ppc/pnv: Clarify how the TIMA is accessed on a multichip systemCédric Le Goater1-0/+3
2019-12-17spapr: Pass the maximum number of vCPUs to the KVM interrupt controllerGreg Kurz3-4/+12
2019-12-17linux-headers: UpdateGreg Kurz2-1/+7
2019-12-17ppc/xive: Extend the TIMA operation with a XivePresenter parameterCédric Le Goater1-3/+4
2019-12-17ppc/xive: Introduce a XiveFabric interfaceCédric Le Goater1-0/+22
2019-12-17ppc/pnv: Fix TIMA indirect accessCédric Le Goater1-0/+2
2019-12-17ppc/pnv: Introduce a pnv_xive_is_cpu_enabled() helperCédric Le Goater1-0/+5
2019-12-17ppc: Introduce a ppc_cpu_pir() helperCédric Le Goater1-0/+1
2019-12-17ppc/pnv: Instantiate cores separatelyGreg Kurz1-1/+1
2019-12-17ppc/xive: Introduce a XivePresenter interfaceCédric Le Goater1-0/+32
2019-12-17ppc/pnv: Create BMC devices at machine initCédric Le Goater1-1/+1
2019-12-17ppc/pnv: Add HIOMAP commandsCédric Le Goater2-0/+6
2019-12-17ipmi: Add support to customize OEM functionsCédric Le Goater1-0/+42
2019-12-17ppc/xive: Introduce helpers for the NVT idCédric Le Goater2-5/+21
2019-12-17ppc/xive: Record the IPB in the associated NVTCédric Le Goater1-0/+1
2019-12-17ppc/pnv: Add a PNOR modelCédric Le Goater2-0/+28
2019-12-16Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20191216-...Peter Maydell10-14/+51
2019-12-16hw/arm/virt: Simplify by moving the gic in the machine statePhilippe Mathieu-Daudé1-0/+1
2019-12-16Memory: Enable writeback for given memory regionBeata Michalska3-0/+15
2019-12-16tcg: cputlb: Add probe_readBeata Michalska1-0/+6
2019-12-16aspeed: Remove AspeedBoardConfig array and use AspeedMachineClassCédric Le Goater1-14/+10
2019-12-16aspeed/smc: Add AST2600 timings registersCédric Le Goater1-0/+1
2019-12-16watchdog/aspeed: Fix AST2600 frequency behaviourJoel Stanley1-0/+1
2019-12-16aspeed/i2c: Add support for DMA transfersCédric Le Goater1-0/+5
2019-12-16aspeed: Add a DRAM memory region at the SoC levelCédric Le Goater1-0/+1
2019-12-16aspeed/i2c: Check SRAM enablement on AST2500Cédric Le Goater1-0/+3
2019-12-16aspeed/i2c: Add support for pool buffer transfersCédric Le Goater1-0/+8
2019-12-14hw: add compat machines for 5.0Cornelia Huck1-0/+3
2019-12-13Merge remote-tracking branch 'remotes/stefanha/tags/block-pull-request' into ...Peter Maydell2-0/+4
2019-12-13virtio-blk: advertise F_WCE (F_FLUSH) if F_CONFIG_WCE is advertisedEvgeny Yakovlev2-0/+4
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