| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2021-01-24 | tcg: Restart code generation when we run out of temps | Richard Henderson | 1 | -0/+3 |
| 2021-01-22 | tcg: Optimize inline dup_const for MO_64 | Richard Henderson | 1 | -1/+2 |
| 2021-01-13 | tcg: Remove tcg_gen_dup{8,16,32,64}i_vec | Richard Henderson | 1 | -4/+0 |
| 2021-01-13 | tcg: Remove movi and dupi opcodes | Richard Henderson | 1 | -3/+0 |
| 2021-01-13 | tcg/tci: Add special tci_movi_{i32,i64} opcodes | Richard Henderson | 1 | -0/+8 |
| 2021-01-13 | tcg: Use tcg_constant_{i32,i64,vec} with gvec expanders | Richard Henderson | 1 | -0/+1 |
| 2021-01-13 | tcg: Use tcg_constant_{i32,i64} with tcg int expanders | Richard Henderson | 1 | -11/+2 |
| 2021-01-13 | tcg: Introduce TYPE_CONST temporaries | Richard Henderson | 1 | -1/+23 |
| 2021-01-13 | tcg: Expand TCGTemp.val to 64-bits | Richard Henderson | 1 | -1/+1 |
| 2021-01-13 | tcg: Add temp_readonly | Richard Henderson | 1 | -0/+5 |
| 2021-01-13 | tcg: Consolidate 3 bits into enum TCGTempKind | Richard Henderson | 1 | -8/+12 |
| 2021-01-07 | tcg: Constify tcg_code_gen_epilogue | Richard Henderson | 1 | -1/+1 |
| 2021-01-07 | tcg: Introduce tcg_tbrel_diff | Richard Henderson | 1 | -0/+13 |
| 2021-01-07 | tcg: Make DisasContextBase.tb const | Richard Henderson | 1 | -1/+1 |
| 2021-01-07 | tcg: Adjust tcg_register_jit for const | Richard Henderson | 1 | -1/+1 |
| 2021-01-07 | tcg: Adjust TCGLabel for const | Richard Henderson | 1 | -1/+1 |
| 2021-01-07 | tcg: Introduce tcg_splitwx_to_{rx,rw} | Richard Henderson | 1 | -5/+21 |
| 2021-01-07 | tcg: Add in_code_gen_buffer | Richard Henderson | 1 | -0/+11 |
| 2021-01-07 | tcg: Move tcg epilogue pointer out of TCGContext | Richard Henderson | 1 | -1/+1 |
| 2021-01-07 | tcg: Move tcg prologue pointer out of TCGContext | Richard Henderson | 1 | -5/+4 |
| 2021-01-07 | tcg: Introduce INDEX_op_qemu_st8_i32 | Richard Henderson | 1 | -0/+5 |
| 2021-01-04 | tcg: Add tcg_gen_bswap_tl alias | Richard Henderson | 1 | -0/+2 |
| 2020-10-27 | tcg: Do not kill globals at conditional branches | Richard Henderson | 2 | -4/+7 |
| 2020-10-08 | tcg: Remove TCGOpDef.used | Richard Henderson | 1 | -3/+0 |
| 2020-10-08 | tcg: Move some TCG_CT_* bits to TCGArgConstraint bitfields | Richard Henderson | 1 | -7/+7 |
| 2020-10-08 | tcg: Remove TCG_CT_REG | Richard Henderson | 1 | -1/+0 |
| 2020-10-08 | tcg: Move sorted_args into TCGArgConstraint.sort_index | Richard Henderson | 1 | -1/+1 |
| 2020-10-08 | tcg: Drop union from TCGArgConstraint | Richard Henderson | 1 | -3/+1 |
| 2020-10-08 | tcg: Adjust simd_desc size encoding | Richard Henderson | 1 | -12/+24 |
| 2020-09-01 | tcg: Add tcg_get_insn_start_param | Richard Henderson | 1 | -0/+15 |
| 2020-08-21 | meson: rename included C source files to .c.inc | Paolo Bonzini | 1 | -1/+1 |
| 2020-06-16 | tcg: call qemu_spin_destroy for tb->jmp_lock | Emilio G. Cota | 1 | -0/+1 |
| 2020-06-02 | tcg: Implement gvec support for rotate by scalar | Richard Henderson | 4 | -0/+5 |
| 2020-06-02 | tcg: Implement gvec support for rotate by vector | Richard Henderson | 4 | -0/+9 |
| 2020-06-02 | tcg: Implement gvec support for rotate by immediate | Richard Henderson | 4 | -0/+10 |
| 2020-05-06 | tcg: Fix integral argument type to tcg_gen_rot[rl]i_i{32,64} | Richard Henderson | 1 | -4/+4 |
| 2020-05-06 | tcg: Add load_dest parameter to GVecGen2 | Richard Henderson | 1 | -0/+2 |
| 2020-05-06 | tcg: Add tcg_gen_gvec_dup_tl | Richard Henderson | 1 | -0/+6 |
| 2020-05-06 | tcg: Remove tcg_gen_gvec_dup{8,16,32,64}i | Richard Henderson | 1 | -5/+0 |
| 2020-05-06 | tcg: Add tcg_gen_gvec_dup_imm | Richard Henderson | 1 | -0/+2 |
| 2020-03-16 | misc: Replace zero-length arrays with flexible array member (automatic) | Philippe Mathieu-Daudé | 1 | -1/+1 |
| 2020-02-12 | tcg: Add tcg_gen_gvec_5_ptr | Richard Henderson | 1 | -0/+7 |
| 2020-01-15 | tcg: Move TCG headers to include/tcg/ | Philippe Mathieu-Daudé | 6 | -0/+3516 |
