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2025-07-15vfio/migration: Max in-flight VFIO device state buffers size limitMaciej S. Szmigiero1-0/+1
Allow capping the maximum total size of in-flight VFIO device state buffers queued at the destination, otherwise a malicious QEMU source could theoretically cause the target QEMU to allocate unlimited amounts of memory for buffers-in-flight. Since this is not expected to be a realistic threat in most of VFIO live migration use cases and the right value depends on the particular setup disable this limit by default by setting it to UINT64_MAX. Reviewed-by: Fabiano Rosas <farosas@suse.de> Reviewed-by: Avihai Horon <avihaih@nvidia.com> Signed-off-by: Maciej S. Szmigiero <maciej.szmigiero@oracle.com> Link: https://lore.kernel.org/qemu-devel/4f7cad490988288f58e36b162d7a888ed7e7fd17.1752589295.git.maciej.szmigiero@oracle.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-07-15vfio/migration: Add x-migration-load-config-after-iter VFIO propertyMaciej S. Szmigiero1-0/+1
This property allows configuring whether to start the config load only after all iterables were loaded, during non-iterables loading phase. Such interlocking is required for ARM64 due to this platform VFIO dependency on interrupt controller being loaded first. The property defaults to AUTO, which means ON for ARM, OFF for other platforms. Reviewed-by: Fabiano Rosas <farosas@suse.de> Reviewed-by: Avihai Horon <avihaih@nvidia.com> Signed-off-by: Maciej S. Szmigiero <maciej.szmigiero@oracle.com> Link: https://lore.kernel.org/qemu-devel/0e03c60dbc91f9a9ba2516929574df605b7dfcb4.1752589295.git.maciej.szmigiero@oracle.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-07-15hw/cxl: mailbox-utils: 0x5604 - FMAPI Initiate DC AddAnisa Su1-0/+4
FM DCD Management command 0x5604 implemented per CXL r3.2 Spec Section 7.6.7.6.5 Reviewed-by: Fan Ni <fan.ni@samsung.com> Signed-off-by: Anisa Su <anisa.su@samsung.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20250714174509.1984430-11-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2025-07-15hw/cxl: Create helper function to create DC Event Records from extentsAnisa Su2-0/+5
Prepatory patch for following FMAPI Add/Release Patches. Refactors part of qmp_cxl_process_dynamic_capacity_prescriptive() into a helper function to create DC Event Records and insert in the event log. Moves definition for CXL_NUM_EXTENTS_SUPPORTED to cxl.h so it can be accessed by cxl-mailbox-utils.c and cxl-events.c, where the helper function is defined. Reviewed-by: Fan Ni <fan.ni@samsung.com> Signed-off-by: Anisa Su <anisa.su@samsung.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20250714174509.1984430-10-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2025-07-15hw/cxl: mailbox-utils: 0x5602 - FMAPI Set DC Region ConfigAnisa Su2-0/+9
FM DCD Management command 0x5602 implemented per CXL r3.2 Spec Section 7.6.7.6.3 Reviewed-by: Fan Ni <fan.ni@samsung.com> Signed-off-by: Anisa Su <anisa.su@samsung.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20250714174509.1984430-8-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2025-07-15hw/mem: cxl_type3: Add DC Region bitmap lockAnisa Su1-0/+1
Add a lock on the bitmap of each CXLDCRegion in preparation for the next patch which implements FMAPI Set DC Region Configuration. This command can modify the block size, which means the region's bitmap must be updated accordingly. The lock becomes necessary when commands that add/release extents (meaning they update the bitmap too) are enabled on a different CCI than the CCI on which the FMAPI commands are enabled. Reviewed-by: Fan Ni <fan.ni@samsung.com> Signed-off-by: Anisa Su <anisa.su@samsung.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20250714174509.1984430-7-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2025-07-15hw/cxl: Move definition for dynamic_capacity_uuid and enum for DC event ↵Anisa Su1-0/+15
types to header Move definition/enum to cxl_events.h for shared use in next patch Reviewed-by: Fan Ni <fan.ni@samsung.com> Signed-off-by: Anisa Su <anisa.su@samsung.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20250714174509.1984430-6-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2025-07-15hw/mem: cxl_type3: Add dsmas_flags to CXLDCRegion structAnisa Su1-0/+15
Add booleans to DC Region struct to represent dsmas flags (defined in CDAT) in preparation for the next command, which returns the flags in the next mailbox command 0x5601. Reviewed-by: Fan Ni <fan.ni@samsung.com> Signed-off-by: Anisa Su <anisa.su@samsung.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20250714174509.1984430-4-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2025-07-15hw/cxl: mailbox-utils: 0x5600 - FMAPI Get DCD InfoAnisa Su1-0/+1
FM DCD Management command 0x5600 implemented per CXL 3.2 Spec Section 7.6.7.6.1. Reviewed-by: Fan Ni <fan.ni@samsung.com> Signed-off-by: Anisa Su <anisa.su@samsung.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20250714174509.1984430-3-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2025-07-15hw/cxl: fix DC extent capacity trackingFan Ni1-1/+2
Per cxl r3.2 Section 9.13.3.3, extent capacity tracking should include extents in different states including added, pending, etc. Before the change, for the in-device extent number tracking purpose, we only have "total_extent_count" defined, which only tracks the number of extents accepted. However, we need to track number of extents in other states also, for now it is extents pending-to-add. To fix that, we introduce a new counter for dynamic capacity "nr_extents_accepted" which explicitly tracks number of the extents accepted by the hosts, and fix "total_extent_count" to include both accepted and pending extents counting. Signed-off-by: Fan Ni <fan.ni@samsung.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20250714174509.1984430-2-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2025-07-15hw/arm/virt: Minor code reshuffling in create_acpi_gedEric Auger1-0/+1
Use a local SysBusDevice handle. Also use the newly introduced sysbus_mmio_map_name which brings better readability about the region being mapped. GED device has regions which exist depending on some external properties and it becomes difficult to guess the index of a region. Better refer to a region by its name. Signed-off-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20250714080639.2525563-32-eric.auger@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2025-07-15hw/core/sysbus: Introduce sysbus_mmio_map_name() helperEric Auger1-0/+1
Some sysbus devices have conditional mmio regions. This happens for instance with the hw/acpi/ged device. In that case it becomes difficult to predict which index a specific MMIO region corresponds to when one needs to mmio map the region. Introduce a new helper that takes the name of the region instead of its index. If the region is not found this returns -1. Otherwise it maps the corresponding index and returns this latter. Signed-off-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20250714080639.2525563-31-eric.auger@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2025-07-15hw/acpi/ged: Prepare the device to react to PCI hotplug eventsEric Auger1-1/+13
QEMU will notify the OS about PCI hotplug/hotunplug events through GED interrupts. Let the GED device handle a new PCI hotplug event. On its occurrence it calls the \\_SB.PCI0.PCNT method with the BLCK mutex held. The GED device uses a dedicated MMIO region that will be mapped by the machine code. At this point the GED still does not support PCI device hotplug in its TYPE_HOTPLUG_HANDLER implementation. This will come in a subsequent patch. Signed-off-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20250714080639.2525563-29-eric.auger@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2025-07-15hw/acpi/pcihp: Remove root arg in acpi_pcihp_initEric Auger1-1/+1
Let pass the root bus to ich9 and piix4 through a property link instead of through an argument passed to acpi_pcihp_init(). Also make sure the root bus is set at the entry of acpi_pcihp_init(). The rationale of that change is to be consistent with the forecoming ARM implementation where the machine passes the root bus (steming from GPEX) to the GED device through a link property. Signed-off-by: Eric Auger <eric.auger@redhat.com> Suggested-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20250714080639.2525563-28-eric.auger@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2025-07-15hw/arm/virt-acpi-build: Modify the DSDT ACPI table to enable ACPI PCI hotplugEric Auger2-0/+3
Modify the DSDT ACPI table to enable ACPI PCI hotplug. Signed-off-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20250714080639.2525563-24-eric.auger@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2025-07-15hw/i386/acpi-build: Move aml_pci_edsm to a generic placeEric Auger1-0/+1
Move aml_pci_edsm to pci-bridge.c since we want to reuse that for ARM and acpi-index support. Also rename it into build_pci_bridge_edsm. Signed-off-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20250714080639.2525563-17-eric.auger@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2025-07-15hw/i386/acpi-build: Move build_append_pci_bus_devices/pcihp_slots to pcihpEric Auger2-1/+2
We intend to reuse build_append_pci_bus_devices and build_append_pcihp_slots on ARM. So let's move them to hw/acpi/pcihp.c as well as all static helpers they use. No functional change intended. Signed-off-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com> Message-Id: <20250714080639.2525563-15-eric.auger@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2025-07-15hw/i386/acpi-build: Move build_append_notification_callback to pcihpEric Auger1-0/+1
We plan to reuse build_append_notification_callback() on ARM so let's move it to pcihp.c. No functional change intended. Signed-off-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com> Message-Id: <20250714080639.2525563-14-eric.auger@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2025-07-15hw/acpi/pcihp: Add an AmlRegionSpace arg to build_acpi_pci_hotplugEric Auger1-1/+2
On ARM we will put the operation regions in AML_SYSTEM_MEMORY. So let's allow this configuration. Signed-off-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com> Message-Id: <20250714080639.2525563-13-eric.auger@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2025-07-15hw/i386/acpi-build: Introduce build_append_pcihp_resources() helperEric Auger1-0/+2
Extract the code that reserves resources for ACPI PCI hotplug into a new helper named build_append_pcihp_resources() and move it to pcihp.c. We will reuse it on ARM. Signed-off-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com> Message-Id: <20250714080639.2525563-12-eric.auger@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2025-07-15hw/i386/acpi-build: Turn build_q35_osc_method into a generic methodEric Auger1-0/+2
GPEX acpi_dsdt_add_pci_osc() does basically the same as build_q35_osc_method(). Rename build_q35_osc_method() into build_pci_host_bridge_osc_method() and move it into hw/acpi/pci.c. In a subsequent patch we will use this later in place of acpi_dsdt_add_pci_osc(). Signed-off-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20250714080639.2525563-9-eric.auger@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2025-07-15hw/pci-host/gpex-acpi: Use GED acpi pcihp propertyEric Auger1-0/+1
Retrieve the acpi pcihp property value from the ged. In case this latter is not set, PCI native hotplug is used on pci0. For expander bridges we keep pci native hotplug, as done on x86 q35. Signed-off-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com> Message-Id: <20250714080639.2525563-8-eric.auger@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2025-07-15hw/acpi/ged: Add a acpi-pci-hotplug-with-bridge-support propertyEric Auger1-0/+2
A new boolean property is introduced. This will be used to turn ACPI PCI hotplug support. By default it is unset. Signed-off-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20250714080639.2525563-7-eric.auger@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2025-07-15hw/acpi: Rename and move build_x86_acpi_pci_hotplug to pcihpEric Auger1-0/+7
We plan to reuse build_x86_acpi_pci_hotplug() implementation for ARM so let's move the code to generic pcihp. Associated static aml_pci_pdsm() helper is also moved along. build_x86_acpi_pci_hotplug is renamed into build_acpi_pci_hotplug(). No code change intended. Also fix the reference to acpi_pci_hotplug.rst documentation Signed-off-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com> Message-Id: <20250714080639.2525563-3-eric.auger@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2025-07-15hw/i386/acpi-build: Make aml_pci_device_dsm() staticEric Auger1-1/+0
No need to export aml_pci_device_dsm() as it is only used in hw/i386/acpi-build.c. Signed-off-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com> Message-Id: <20250714080639.2525563-2-eric.auger@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2025-07-15pci: Add a memory attribute for pre-translated DMA operationsCLEMENT MATHIEU--DRIF1-0/+9
The address_type bit will be set to PCI_AT_TRANSLATED by devices that use cached addresses obtained via ATS. Signed-off-by: Clement Mathieu--Drif <clement.mathieu--drif@eviden.com> Message-Id: <20250628180226.133285-2-clement.mathieu--drif@eviden.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2025-07-15hw/display: Allow injection of virtio-gpu EDID nameAndrew Keesler3-0/+10
Thanks to 72d277a7, 1ed2cb32, and others, EDID (Extended Display Identification Data) is propagated by QEMU such that a virtual display presents legitimate metadata (e.g., name, serial number, preferred resolutions, etc.) to its connected guest. This change adds the ability to specify the EDID name for a particular virtio-vga display. Previously, every virtual display would have the same name: "QEMU Monitor". Now, we can inject names of displays in order to test guest behavior that is specific to display names. We provide the ability to inject the display name from the frontend since this is guest visible data. Furthermore, this makes it clear where N potential display outputs would get their name from (which will be added in a future change). Note that we have elected to use a struct here for output data for extensibility - we intend to add per-output fields like resolution in a future change. It should be noted that EDID names longer than 12 bytes will be truncated per spec (I think?). Testing: verified that when I specified 2 outputs for a virtio-gpu with edid_name set, the names matched those that I configured with my vnc display. -display vnc=localhost:0,id=aaa,display=vga,head=0 \ -display vnc=localhost:1,id=bbb,display=vga,head=1 \ -device '{"driver":"virtio-vga", "max_outputs":2, "id":"vga", "outputs":[ { "name":"AAA" }, { "name":"BBB" } ]}' Signed-off-by: Andrew Keesler <ankeesler@google.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20250709121126.2946088-2-ankeesler@google.com>
2025-07-15esp.c: only allow ESP commands permitted in the current asc_modeMark Cave-Ayland1-0/+8
If an ESP command is issued in an incorrect mode then an illegal command interrupt should be generated. Add a new esp_cmd_is_valid() function to indicate whether the ESP command is valid for the current mode, and if not then raise the illegal command interrupt. This fixes WinNT MIPS which issues ICCS after a Chip Reset which is not permitted, but will fail with an INACCESSIBLE_BOOT_DEVICE error unless an interrupt is generated. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Fixes: 83428f7a97 ("esp.c: move write_response() non-DMA logic to esp_do_nodma()") Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2464 Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20250711204636.542964-8-mark.cave-ayland@ilande.co.uk> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2025-07-15esp.c: add asc_mode property to indicate the current ESP modeMark Cave-Ayland1-0/+7
Add a new asc_mode property to ESPState which indicates the current mode of the ESP and update the ESP state machine accordingly. Bump the vmstate version and include migration logic to ensure that asc_mode is set to initiator mode such that any commands in progress will always continue. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20250711204636.542964-7-mark.cave-ayland@ilande.co.uk> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2025-07-15esp.h: remove separate ESPState typedefMark Cave-Ayland1-2/+0
This is not needed as it is now handled by the OBJECT_DECLARE_SIMPLE_TYPE() macro. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20250711204636.542964-4-mark.cave-ayland@ilande.co.uk> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2025-07-14Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into stagingStefan Hajnoczi1-0/+3
* rust: miscellaneous fixes * rust: qemu-api-macros: cleanup and add unit tests for TryInto * rust: log: implement io::Write, avoid memory allocations when logging constant strings * target/i386: fix usage of properties whenever accelerators change the default (e.g. vendor) * target/i386: add support for TDVMCALL_SETUP_EVENT_NOTIFY_INTERRUPT * target/i386: add support for booting an SEV VM from an IGVM file * target/i386: unify cache model descriptions between CPUID 2, CPUID 4 and AMD specific CPUID 0x80000006 * target/i386: introduce cache models for recent Intel CPU models * target/i386: mark some 0x80000000-0x80000008 bits as reserved on Intel * target/i386: cleanups # -----BEGIN PGP SIGNATURE----- # # iQFIBAABCgAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAmh0v+sUHHBib256aW5p # QHJlZGhhdC5jb20ACgkQv/vSX3jHroOQUQf8CTsCnl2xYrnrkVfSVj6kuAE+JYD6 # oLSXsOEG4yrVknuhwIfVsqNScmleJCdz85ej7CZxy3vzzgjLfmy7nwifKEIKku7E # XO/Q3HbB898MnzqceQRmwe1AzELoj1Lave215CPhUBo60LCRPwaIZsiHprnNZgXi # TyHlmywDVRjyFLtKkx3El0dnLAhFqPWeGh81CD5lPLZZJ+Wt2FuAw2zqSOGB2ztM # FkJmunFJiaTItjyCN/uNvBSbDKecAHgCXvSCVNG3+I4U2R0gK1lcwm3TRo7yKia+ # HUHGa3UEXoIqlRfXdX6zuc8tW1/u6SPv+8WX53t204PAeSWDUrtIe9jZ4A== # =y4/a # -----END PGP SIGNATURE----- # gpg: Signature made Mon 14 Jul 2025 04:29:31 EDT # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * tag 'for-upstream' of https://gitlab.com/bonzini/qemu: (77 commits) i386/cpu: Honor maximum value for CPUID.8000001DH.EAX[25:14] i386/cpu: Fix overflow of cache topology fields in CPUID.04H i386/cpu: Fix cpu number overflow in CPUID.01H.EBX[23:16] i386/cpu: Fix number of addressable IDs field for CPUID.01H.EBX[23:16] i386/cpu: Reorder CPUID leaves in cpu_x86_cpuid() tests/vm: bump FreeBSD image to 14.3 tests/functional: test_x86_cpu_model_versions: remove dead tests i386/cpu: Mark CPUID 0x80000008 ECX bits[0:7] & [12:15] as reserved for Intel/Zhaoxin i386/cpu: Mark CPUID 0x80000007[EBX] as reserved for Intel i386/cpu: Mark EBX/ECX/EDX in CPUID 0x80000000 leaf as reserved for Intel i386/cpu: Enable 0x1f leaf for YongFeng by default i386/cpu: Enable 0x1f leaf for SapphireRapids by default i386/cpu: Enable 0x1f leaf for GraniteRapids by default i386/cpu: Enable 0x1f leaf for SierraForest by default i386/cpu: Enable 0x1f leaf for SierraForest by default i386/cpu: Add a "x-force-cpuid-0x1f" property i386/cpu: Introduce cache model for YongFeng i386/cpu: Introduce cache model for SapphireRapids i386/cpu: Introduce cache model for GraniteRapids i386/cpu: Introduce cache model for SierraForest ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2025-07-14acpi: Add machine option to disable SPCR tableLi Chen1-0/+1
The ACPI SPCR (Serial Port Console Redirection) table allows firmware to specify a preferred serial console device to the operating system. On ARM64 systems, Linux by default respects this table: even if the kernel command line does not include a hardware serial console (e.g., "console=ttyAMA0"), the kernel still register the serial device referenced by SPCR as a printk console. While this behavior is standard-compliant, it can lead to situations where guest console behavior is influenced by platform firmware rather than user-specified configuration. To make guest console behavior more predictable and under user control, this patch introduces a machine option to explicitly disable SPCR table exposure: -machine spcr=off By default, the option is enabled (spcr=on), preserving existing behavior. When disabled, QEMU will omit the SPCR table from the guest's ACPI namespace, ensuring that only consoles explicitly declared in the kernel command line are registered. Signed-off-by: Li Chen <chenl311@chinatelecom.cn> Reviewed-by: Bibo Mao <maobibo@loongson.cn> Acked-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Gavin Shan <gshan@redhat.com> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com> Message-Id: <20250528105404.457729-2-me@linux.beauty> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2025-07-14vhost-user-blk: add an option to skip GET_VRING_BASE for force shutdownDaniil Tatianin1-0/+2
If we have a server running disk requests that is for whatever reason hanging or not able to process any more IO requests but still has some in-flight requests previously issued by the guest OS, QEMU will still try to drain the vring before shutting down even if it was explicitly asked to do a "force shutdown" via SIGTERM or QMP quit. This is not useful since the guest is no longer running at this point since it was killed by QEMU earlier in the process. At this point, we don't care about whatever in-flight IO it might have pending, we just want QEMU to shut down. Add an option called "skip-get-vring-base-on-force-shutdown" to allow SIGTERM/QMP quit() to actually act like a "force shutdown" at least for vhost-user-blk devices since those require the drain operation to shut down gracefully unlike, for example, network devices. Signed-off-by: Daniil Tatianin <d-tatianin@yandex-team.ru> Message-Id: <20250609212547.2859224-4-d-tatianin@yandex-team.ru> Acked-by: Raphael Norwitz <raphael@enfabrica.net> Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2025-07-14vhost: add a helper for force stopping a deviceDaniil Tatianin1-0/+15
This adds an ability to skip GET_VRING_BASE during device stop entirely, and thus the expensive drain operation that this call entails as well, which may be useful during a non-graceful shutdown in case the guest operating system hangs or refuses to react to a previously requested ACPI shutdown for whatever reason. Signed-off-by: Daniil Tatianin <d-tatianin@yandex-team.ru> Message-Id: <20250609212547.2859224-3-d-tatianin@yandex-team.ru> Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2025-07-14virtio-net: Add hash type optionsAkihiko Odaki1-0/+1
By default, virtio-net limits the hash types that will be advertised to the guest so that all hash types are covered by the offloading capability the client provides. This change allows to override this behavior and to advertise hash types that require user-space hash calculation by specifying "on" for the corresponding properties. Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-Id: <20250530-vdpa-v1-6-5af4109b1c19@daynix.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2025-07-14virtio-net: Retrieve peer hashing capabilityAkihiko Odaki1-1/+4
Retrieve peer hashing capability instead of hardcoding. Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-Id: <20250530-vdpa-v1-4-5af4109b1c19@daynix.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2025-07-14qdev-properties: Add DEFINE_PROP_ON_OFF_AUTO_BIT64()Akihiko Odaki1-0/+18
DEFINE_PROP_ON_OFF_AUTO_BIT64() corresponds to DEFINE_PROP_ON_OFF_AUTO() as DEFINE_PROP_BIT64() corresponds to DEFINE_PROP_BOOL(). The difference is that DEFINE_PROP_ON_OFF_AUTO_BIT64() exposes OnOffAuto instead of bool. Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-Id: <20250530-vdpa-v1-1-5af4109b1c19@daynix.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2025-07-14net: Add is_vhost_user flag to vhost_net structLaurent Vivier1-0/+1
Introduce a boolean is_vhost_user field to the vhost_net structure. This flag is initialized during vhost_net_init based on whether the backend is vhost-user. This refactoring simplifies checks for vhost-user specific behavior, replacing direct comparisons of 'net->nc->info->type' with the new flag. It improves readability and encapsulates the backend type information directly within the vhost_net instance. Signed-off-by: Laurent Vivier <lvivier@redhat.com> Signed-off-by: Jason Wang <jasowang@redhat.com>
2025-07-14net: Allow network backends to advertise max TX queue sizeLaurent Vivier1-0/+1
This commit refactors how the maximum transmit queue size for virtio-net devices is determined, making the mechanism more generic and extensible. Previously, virtio_net_max_tx_queue_size() contained hardcoded checks for specific network backend types (vhost-user and vhost-vdpa) to determine their supported maximum queue size. This created direct dependencies and would require modifications for every new backend that supports variable queue sizes. To improve flexibility, a new max_tx_queue_size field is added to the vhost_net structure. This allows each network backend to advertise its supported maximum transmit queue size directly. The virtio_net_max_tx_queue_size() function now retrieves the max TX queue size from the vhost_net struct, if available and set. Otherwise, it defaults to VIRTIO_NET_TX_QUEUE_DEFAULT_SIZE. Signed-off-by: Laurent Vivier <lvivier@redhat.com> Signed-off-by: Jason Wang <jasowang@redhat.com>
2025-07-14net: Add save_acked_features callback to vhost_netLaurent Vivier1-0/+2
This commit introduces a save_acked_features function pointer to vhost_net and converts the vhost_net function into a generic dispatcher. The vhost-user backend provides the callback, making its function static. With this change, no other module has a direct dependency on the vhost-user implementation. This cleanup allows for the complete removal of the net/vhost-user.h header file. Signed-off-by: Laurent Vivier <lvivier@redhat.com> Signed-off-by: Jason Wang <jasowang@redhat.com>
2025-07-14net: Consolidate vhost feature bits into vhost_net structureLaurent Vivier1-0/+1
Previously, the vhost_net_get_feature_bits() function in hw/net/vhost_net.c used a large switch statement to determine the appropriate feature bits based on the NetClientDriver type. This created unnecessary coupling between the generic vhost layer and specific network backends (like TAP, vhost-user, and vhost-vdpa). This patch moves the definition of vhost feature bits directly into the vhost_net structure for each relevant network client. Signed-off-by: Laurent Vivier <lvivier@redhat.com> Signed-off-by: Jason Wang <jasowang@redhat.com>
2025-07-14virtio-net: Add queues for RSS during migrationAkihiko Odaki1-2/+8
virtio_net_pre_load_queues() inspects vdev->guest_features to tell if VIRTIO_NET_F_RSS or VIRTIO_NET_F_MQ is enabled to infer the required number of queues. This works for VIRTIO_NET_F_MQ but it doesn't for VIRTIO_NET_F_RSS because only the lowest 32 bits of vdev->guest_features is set at the point and VIRTIO_NET_F_RSS uses bit 60 while VIRTIO_NET_F_MQ uses bit 22. Instead of inferring the required number of queues from vdev->guest_features, use the number loaded from the vm state. This change also has a nice side effect to remove a duplicate peer queue pair change by circumventing virtio_net_set_multiqueue(). Also update the comment in include/hw/virtio/virtio.h to prevent an implementation of pre_load_queues() from refering to any fields being loaded during migration by accident in the future. Fixes: 8c49756825da ("virtio-net: Add only one queue pair when realizing") Tested-by: Lei Yang <leiyang@redhat.com> Cc: qemu-stable@nongnu.org Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Signed-off-by: Jason Wang <jasowang@redhat.com>
2025-07-13Merge tag 'pull-target-arm-20250711' of https://gitlab.com/pm215/qemu into ↵Stefan Hajnoczi10-2/+408
staging target-arm queue: * New board type max78000fthr * Enable use of CXL on Arm 'virt' board * Some more tidyup of ID register handling * Refactor AT insns and PMU regs into separate source files * Don't enforce NSE,NS check for EL3->EL3 returns * hw/arm/fsl-imx8mp: Wire VIRQ and VFIQ * Allow nested-virtualization with KVM on the 'virt' board * system/qdev: Remove pointless NULL check in qdev_device_add_from_qdict * hw/arm/virt-acpi-build: Don't create ITS id mappings by default * target/arm: Remove unused helper_sme2_luti4_4b # -----BEGIN PGP SIGNATURE----- # # iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmhxEcoZHHBldGVyLm1h # eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3j5yEACWYnNeqo8Yph6/EJExE6eV # r0tC6FBb5ShPgA6kDxhpOc1lI6uXGh8+D7bL9BePEdz/brCf1QDfs2Z4q/hb5ysX # D0H6VI5Gr1j6MjkFRBo3+vvYz4Yh++XLn5Q9lZv8zaSEdraq/ay2kxnuhRCK+4Ar # +QoGtKrGMJ7UCpfiRlvNnd1UjgORZf10EE/bRImX13sxeDomP3CZhFzAyJyShOP9 # JA7bAd4rYJ4oj8R33y8Yaxjwm4FOndj740B0zwpO8mpjzFiE5zbqsaO+mEgYSflc # OQisCu/KRFpyIR+UqP+4gNaJLfKQW5Y4r61zEaiJWV/c4RdKNnbK1f7MX11fNhOk # k1paF3GIXp6f794Hb14vtsYnKHF2eeNSmRkAomXxLgUSYzLezL+yj7cdYmRJhgYU # thc1PSiEmHYhjRmOaMC9+dkMtvIexWyDNYNFTygoOE5/kTMSazeTFQpFmw+ZuTee # 9pjKsYRZJgTa64IkJy1L34jc2gds48Q20KpQsqZ22KQcjwt4PW4eQXkvMylawSut # mArHVH6AAxIK+defeEmnQCJ0OccyGCENjRDuWyWMMGoP/ggZpO47rGWmCUOK8xz8 # IfGdPeF/9xsKSKWvjpiHyyKa48wuO2bVC+5bISS6IPA2uGneS2DpmjkHU+gHBqpk # GNlvEnXZfavZOHejE7/L/Q== # =hJ4/ # -----END PGP SIGNATURE----- # gpg: Signature made Fri 11 Jul 2025 09:29:46 EDT # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [full] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full] # gpg: aka "Peter Maydell <peter@archaic.org.uk>" [unknown] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * tag 'pull-target-arm-20250711' of https://gitlab.com/pm215/qemu: (36 commits) tests/functional: Add a test for the MAX78000 arm machine docs/system: arm: Add max78000 board description target/arm: Remove helper_sme2_luti4_4b hw/arm/virt-acpi-build: Don't create ITS id mappings by default system/qdev: Remove pointless NULL check in qdev_device_add_from_qdict hw/arm/virt: Allow virt extensions with KVM hw/arm/arm_gicv3_kvm: Add a migration blocker with kvm nested virt target/arm: Enable feature ARM_FEATURE_EL2 if EL2 is supported target/arm/kvm: Add helper to detect EL2 when using KVM hw/arm: Allow setting KVM vGIC maintenance IRQ hw/arm/fsl-imx8mp: Wire VIRQ and VFIQ target/arm: Don't enforce NSE,NS check for EL3->EL3 returns target/arm: Split out performance monitor regs to cpregs-pmu.c target/arm: Split out AT insns to tcg/cpregs-at.c target/arm: Drop stub for define_tlb_insn_regs arm/kvm: shorten one overly long line arm/cpu: store clidr into the idregs array arm/cpu: fix trailing ',' for SET_IDREG arm/cpu: store id_aa64afr{0,1} into the idregs array arm/cpu: store id_afr0 into the idregs array ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2025-07-12hw/i386: Add igvm-cfg object and processing for IGVM filesRoy Hopkins1-0/+3
An IGVM file contains configuration of guest state that should be applied during configuration of the guest, before the guest is started. This patch allows the user to add an igvm-cfg object to an X86 machine configuration that allows an IGVM file to be configured that will be applied to the guest before it is started. If an IGVM configuration is provided then the IGVM file is processed at the end of the board initialization, before the state transition to PHASE_MACHINE_INITIALIZED. Signed-off-by: Roy Hopkins <roy.hopkins@randomman.co.uk> Acked-by: Gerd Hoffman <kraxel@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Stefano Garzarella <sgarzare@redhat.com> Reviewed-by: Ani Sinha <anisinha@redhat.com> Link: https://lore.kernel.org/r/23bc66ae4504ba5cf2134826e055b25df3fc9cd9.1751554099.git.roy.hopkins@randomman.co.uk Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2025-07-11hw/intc/loongarch_extioi: Move unrealize function to common codeBibo Mao2-1/+1
Memory about LoongArchExtIOICommonState::cpu is allocated in common code, it had better be freed in common code also. Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn>
2025-07-10hw/arm: Allow setting KVM vGIC maintenance IRQHaibo Xu1-0/+1
Allow virt arm machine to set the interrupt ID for the KVM GIC maintenance interrupt. This setting must be done before the KVM_DEV_ARM_VGIC_CTRL_INIT hence the choice to perform the setting in the GICv3 realize instead of proceeding the same way as kvm_arm_pmu_set_irq(). Signed-off-by: Haibo Xu <haibo.xu@linaro.org> Signed-off-by: Miguel Luis <miguel.luis@oracle.com> Signed-off-by: Eric Auger <eric.auger@redhat.com> Message-id: 20250707164129.1167837-2-eric.auger@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-07-08hw/arm/virt: Basic CXL enablement on pci_expander_bridge instances pxb-cxlJonathan Cameron1-0/+4
Code based on i386/pc enablement. The memory layout places space for 16 host bridge register regions after the GIC_REDIST2 in the extended memmap. This is a hole in the current map so adding them here has no impact on placement of other memory regions (tested with enough CPUs for GIC_REDIST2 to be in use.) The high memory map is GiB aligned so the hole is there whatever the size of memory or device_memory below this point. The CFMWs are placed above the extended memmap. Note the existing variable highest_gpa is the highest GPA that has been allocated at a particular point in setting up the memory map. Whilst this caused some confusion in review there are existing comments explaining this so nothing is added. The cxl_devices_state.host_mr provides a small space in which to place the individual host bridge register regions for whatever host bridges are allocated via -device pxb-cxl on the command line. The existing dynamic sysbus infrastructure is not reused because pxb-cxl is a PCI device not a sysbus one but these registers are directly in the main memory map, not the PCI address space. Only create the CEDT table if cxl=on set for the machine. Default to off. Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Tested-by: Itaru Kitayama <itaru.kitayama@fujitsu.com> Tested-by: Li Zhijian <lizhijian@fujitsu.com> Message-id: 20250703104110.992379-4-Jonathan.Cameron@huawei.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-07-08hw/cxl: Make the CXL fixed memory windows devices.Jonathan Cameron2-2/+7
Previously these somewhat device like structures were tracked using a list in the CXLState in each machine. This is proving restrictive in a few cases where we need to iterate through these without being aware of the machine type. Just make them sysbus devices. Restrict them to not user created as they need to be visible to early stages of machine init given effects on the memory map. This change both simplifies state tracking and enables features needed for performance optimization and hotness tracking by making it possible to retrieve the fixed memory window on actions elsewhere in the topology. In some cases the ordering of the Fixed Memory Windows matters. For those utility functions provide a GSList sorted by the window index. This ensures that we get consistency across: - ordering in the command line - ordering of the host PA ranges - ordering of ACPI CEDT structures describing the CFMWS. Other aspects don't have this constraint. For those direct iteration of the underlying hash structures is fine. In the setup path for the memory map in pc_memory_init() split the operations into two calls. The first, cxl_fmws_set_mmemap(), loops over fixed memory windows in order and assigns their addresses. The second, cxl_fmws_update_mmio() actually sets up the mmio for each window. This is obviously less efficient than a single loop but this split design is needed to put the logic in two different places in the arm64 support and it is not a hot enough path to justify an x86 only implementation. Reviewed-by: Li Zhijian <lizhijian@fujitsu.com> Tested-by: Li Zhijian <lizhijian@fujitsu.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Tested-by: Itaru Kitayama <itaru.kitayama@fujitsu.com> Message-id: 20250703104110.992379-3-Jonathan.Cameron@huawei.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-07-08hw/cxl-host: Add an index field to CXLFixedMemoryWindowJonathan Cameron1-0/+1
To enable these to be found in a fixed order, that order needs to be known. This will later be used to sort a list of these structures so that address map and ACPI table entries are predictable. Tested-by: Li Zhijian <lizhijian@fujitsu.com> Reviewed-by: Li Zhijian <lizhijian@fujitsu.com> Reviewed-by: Fan Ni <fan.ni@samsung.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Tested-by: Itaru Kitayama <itaru.kitayama@fujitsu.com> Message-id: 20250703104110.992379-2-Jonathan.Cameron@huawei.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-07-08MAX78000: Add AES to SOCJackson Donaldson1-0/+2
This commit adds AES to max78000_soc Signed-off-by: Jackson Donaldson <jcksn@duck.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20250704223239.248781-12-jcksn@duck.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
generated by cgit v1.1 at 2025-09-18 13:05:09 +0000