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2021-05-25hw/arm: Model TCMs in the SSE-300, not the AN547Peter Maydell1-0/+2
The SSE-300 has an ITCM at 0x0000_0000 and a DTCM at 0x2000_0000. Currently we model these in the AN547 board, but this is conceptually wrong, because they are a part of the SSE-300 itself. Move the modelling of the TCMs out of mps2-tz.c into sse300.c. This has no guest-visible effects. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210510190844.17799-7-peter.maydell@linaro.org
2021-05-20Merge remote-tracking branch ↵Peter Maydell1-0/+38
'remotes/stsquad/tags/pull-testing-and-plugin-updates-180521-2' into staging testing and plugin updates: - various fixes for binfmt_misc docker images - add hexagon check-tcg support docker image - add tricore check-tcg support - refactor ppc docker images - add missing ppc64le tests - don't use host_cc for test fallback - check-tcg configure.sh tweaks for cross compile/clang - fix some memory leaks in plugins # gpg: Signature made Tue 18 May 2021 09:37:21 BST # gpg: using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2A44 # gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" [full] # Primary key fingerprint: 6685 AE99 E751 67BC AFC8 DF35 FBD0 DB09 5A9E 2A44 * remotes/stsquad/tags/pull-testing-and-plugin-updates-180521-2: (29 commits) configure: use cc, not host_cc to set cross_cc for build arch tests/tcg: don't allow clang as a cross compiler tests/tcg: fix missing return tests/tcg/ppc64le: tests for brh/brw/brd tests/docker: gcc-10 based images for ppc64{,le} tests tests/tcg/tricore: Add muls test tests/tcg/tricore: Add msub test tests/tcg/tricore: Add madd test tests/tcg/tricore: Add ftoi test tests/tcg/tricore: Add fmul test tests/tcg/tricore: Add fadd test tests/tcg/tricore: Add dvstep test tests/tcg/tricore: Add clz test tests/tcg/tricore: Add bmerge test tests/tcg/tricore: Add macros to create tests and first test 'abs' configure: Emit HOST_CC to config-host.mak tests/tcg/tricore: Add build infrastructure hw/tricore: Add testdevice for tests in tests/tcg/ tests/tcg: Run timeout cmds using --foreground tests/tcg: Add docker_as and docker_ld cmds ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-05-19Merge remote-tracking branch 'remotes/dg-gitlab/tags/ppc-for-6.1-20210519' ↵Peter Maydell1-0/+7
into staging ppc patch queue 2021-05-19 Next set of ppc related patches for qemu-6.1. Highlights are: * Start of a significant softmmu cleanup from Richard Henderson * Further work towards allowing builds without CONFIG_TCG # gpg: Signature made Wed 19 May 2021 13:36:45 BST # gpg: using RSA key 75F46586AE61A66CC44E87DC6C38CACA20D9B392 # gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" [full] # gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>" [full] # gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>" [full] # gpg: aka "David Gibson (kernel.org) <dwg@kernel.org>" [unknown] # Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392 * remotes/dg-gitlab/tags/ppc-for-6.1-20210519: (48 commits) target/ppc: Remove type argument for mmubooke206_get_physical_address target/ppc: Remove type argument from mmubooke206_check_tlb target/ppc: Remove type argument from mmubooke_get_physical_address target/ppc: Remove type argument from mmubooke_check_tlb target/ppc: Remove type argument from mmu40x_get_physical_address target/ppc: Remove type argument from get_bat_6xx_tlb target/ppc: Remove type argument from ppc6xx_tlb_check target/ppc: Remove type argument from ppc6xx_tlb_pte_check target/ppc: Remove type argument from check_prot target/ppc: Use MMUAccessType in mmu_helper.c target/ppc: Rename access_type to type in mmu_helper.c target/ppc: Use MMUAccessType in mmu-hash32.c target/ppc: Use MMUAccessType in mmu-hash64.c target/ppc: Use MMUAccessType in mmu-radix64.c target/ppc: Introduce prot_for_access_type target/ppc: Fix load endianness for lxvwsx/lxvdsx target/ppc: Use translator_loop_temp_check target/ppc: Mark helper_raise_exception* as noreturn target/ppc: Tidy exception vs exit_tb target/ppc: Move single-step check to ppc_tr_tb_stop ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-05-19hw/ppc: moved hcalls that depend on softmmuLucas Mateus Castro (alqotel)1-0/+6
The hypercalls h_enter, h_remove, h_bulk_remove, h_protect, and h_read, have been moved to spapr_softmmu.c with the functions they depend on. The functions is_ram_address and push_sregs_to_kvm_pr are not static anymore as functions on both spapr_hcall.c and spapr_softmmu.c depend on them. The hypercalls h_resize_hpt_prepare and h_resize_hpt_commit have been divided, the KVM part stayed in spapr_hcall.c while the softmmu part was moved to spapr_softmmu.c Signed-off-by: Lucas Mateus Castro (alqotel) <lucas.araujo@eldorado.org.br> Message-Id: <20210506163941.106984-2-lucas.araujo@eldorado.org.br> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19hw/ppc/spapr.c: Extract MMU mode error reporting into a functionFabiano Rosas1-0/+1
A following patch will make use of it. Signed-off-by: Fabiano Rosas <farosas@linux.ibm.com> Message-Id: <20210505001130.3999968-2-farosas@linux.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-18vhost-user-blk: Check that num-queues is supported by backendKevin Wolf1-0/+2
Creating a device with a number of queues that isn't supported by the backend is pointless, the device won't work properly and the error messages are rather confusing. Just fail to create the device if num-queues is higher than what the backend supports. Since the relationship between num-queues and the number of virtqueues depends on the specific device, this is an additional value that needs to be initialised by the device. For convenience, allow leaving it 0 if the check should be skipped. This makes sense for vhost-user-net where separate vhost devices are used for the queues and custom initialisation code is needed to perform the check. Fixes: https://bugzilla.redhat.com/show_bug.cgi?id=1935031 Signed-off-by: Kevin Wolf <kwolf@redhat.com> Reviewed-by: Raphael Norwitz <raphael.norwitz@nutanix.com> Message-Id: <20210429171316.162022-7-kwolf@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2021-05-18hw/tricore: Add testdevice for tests in tests/tcg/Bastian Koppelmann1-0/+38
this device is used to verify the correctness of regression tests by allowing guests to write their exit status to this device. This is then used by qemu to exit using the written status. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20210305170045.869437-4-kbastian@mail.uni-paderborn.de> Message-Id: <20210512102051.12134-14-alex.bennee@linaro.org>
2021-05-16Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into stagingPeter Maydell5-9/+19
pc,pci,virtio: bugfixes, improvements Fixes all over the place. Faster boot for virtio. ioeventfd support for mmio. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # gpg: Signature made Fri 14 May 2021 15:27:13 BST # gpg: using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469 # gpg: issuer "mst@redhat.com" # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [full] # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" [full] # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * remotes/mst/tags/for_upstream: Fix build with 64 bits time_t vhost-vdpa: Make vhost_vdpa_get_device_id() static hw/virtio: enable ioeventfd configuring for mmio hw/smbios: support for type 41 (onboard devices extended information) checkpatch: Fix use of uninitialized value virtio-scsi: Configure all host notifiers in a single MR transaction virtio-scsi: Set host notifiers and callbacks separately virtio-blk: Configure all host notifiers in a single MR transaction virtio-blk: Fix rollback path in virtio_blk_data_plane_start() pc-dimm: remove unnecessary get_vmstate_memory_region() method amd_iommu: fix wrong MMIO operations virtio-net: Constify VirtIOFeature feature_sizes[] virtio-blk: Constify VirtIOFeature feature_sizes[] hw/virtio: Pass virtio_feature_get_config_size() a const argument x86: acpi: use offset instead of pointer when using build_header() amd_iommu: Fix pte_override_page_mask() Signed-off-by: Peter Maydell <peter.maydell@linaro.org> # Conflicts: # hw/arm/virt.c
2021-05-14vhost-vdpa: Make vhost_vdpa_get_device_id() staticZenghui Yu1-2/+0
As it's only used inside hw/virtio/vhost-vdpa.c. Signed-off-by: Zenghui Yu <yuzenghui@huawei.com> Message-Id: <20210413133737.1574-1-yuzenghui@huawei.com> Reviewed-by: Stefano Garzarella <sgarzare@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2021-05-14hw/virtio: enable ioeventfd configuring for mmioPavel Dovgalyuk1-0/+5
This patch adds ioeventfd flag for virtio-mmio configuration. It allows switching ioeventfd on and off. Signed-off-by: Pavel Dovgalyuk <Pavel.Dovgalyuk@ispras.ru> Message-Id: <161700379211.1135943.8859209566937991305.stgit@pasha-ThinkPad-X280> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2021-05-14hw/smbios: support for type 41 (onboard devices extended information)Vincent Bernat1-1/+13
Type 41 defines the attributes of devices that are onboard. The original intent was to imply the BIOS had some level of control over the enablement of the associated devices. If network devices are present in this table, by default, udev will name the corresponding interfaces enoX, X being the instance number. Without such information, udev will fallback to using the PCI ID and this usually gives ens3 or ens4. This can be a bit annoying as the name of the network card may depend on the order of options and may change if a new PCI device is added earlier on the commande line. Being able to provide SMBIOS type 41 entry ensure the name of the interface won't change and helps the user guess the right name without booting a first time. This can be invoked with: $QEMU -netdev user,id=internet -device virtio-net-pci,mac=50:54:00:00:00:42,netdev=internet,id=internet-dev \ -smbios type=41,designation='Onboard LAN',instance=1,kind=ethernet,pcidev=internet-dev The PCI segment is assumed to be 0. This should hold true for most cases. $ dmidecode -t 41 # dmidecode 3.3 Getting SMBIOS data from sysfs. SMBIOS 2.8 present. Handle 0x2900, DMI type 41, 11 bytes Onboard Device Reference Designation: Onboard LAN Type: Ethernet Status: Enabled Type Instance: 1 Bus Address: 0000:00:09.0 $ ip -brief a lo UNKNOWN 127.0.0.1/8 ::1/128 eno1 UP 10.0.2.14/24 fec0::5254:ff:fe00:42/64 fe80::5254:ff:fe00:42/64 Signed-off-by: Vincent Bernat <vincent@bernat.ch> Message-Id: <20210401171138.62970-1-vincent@bernat.ch> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2021-05-14pc-dimm: remove unnecessary get_vmstate_memory_region() methodMaciej S. Szmigiero1-5/+0
The get_vmstate_memory_region() method from PCDIMMDeviceClass is only ever called from this class and is never overridden, so it can be converted into an ordinary function. This saves us from having to do an indirect call in order to reach it. Signed-off-by: Maciej S. Szmigiero <maciej.szmigiero@oracle.com> Message-Id: <f42da25471dc4b967796642388294e61e6587047.1619303649.git.maciej.szmigiero@oracle.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2021-05-14Merge remote-tracking branch 'remotes/cminyard/tags/for-qemu-6.1-v1' into ↵Peter Maydell2-1/+35
staging Add a bus multiplexer device This patch set adds a bus multiplexer and the necessary infrastructure in the I2C code to allow it to work. These are common on systems with lots of I2C devices, like an IPMI BMC. # gpg: Signature made Thu 13 May 2021 22:48:07 BST # gpg: using RSA key FD0D5CE67CE0F59A6688268661F38C90919BFF81 # gpg: Good signature from "Corey Minyard <cminyard@mvista.com>" [unknown] # gpg: aka "Corey Minyard <minyard@acm.org>" [unknown] # gpg: aka "Corey Minyard <corey@minyard.net>" [unknown] # gpg: aka "Corey Minyard <minyard@mvista.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: FD0D 5CE6 7CE0 F59A 6688 2686 61F3 8C90 919B FF81 * remotes/cminyard/tags/for-qemu-6.1-v1: hw/i2c: add pca954x i2c-mux switch hw/i2c: move search to i2c_scan_bus method hw/i2c: add match method for device search hw/i2c: name I2CNode list in I2CBus Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-05-14hw/virtio: Pass virtio_feature_get_config_size() a const argumentPhilippe Mathieu-Daudé1-1/+1
The VirtIOFeature structure isn't modified, mark it const. Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20210511104157.2880306-2-philmd@redhat.com>
2021-05-13Merge remote-tracking branch 'remotes/armbru/tags/pull-misc-2021-05-12' into ↵Peter Maydell5-113/+0
staging Miscellaneous patches for 2021-05-12 # gpg: Signature made Wed 12 May 2021 17:22:15 BST # gpg: using RSA key 354BC8B3D7EB2A6B68674E5F3870B400EB918653 # gpg: issuer "armbru@redhat.com" # gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" [full] # gpg: aka "Markus Armbruster <armbru@pond.sub.org>" [full] # Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653 * remotes/armbru/tags/pull-misc-2021-05-12: Drop the deprecated unicore32 target Drop the deprecated lm32 target block: Drop the sheepdog block driver Remove the deprecated moxie target monitor/qmp: fix race on CHR_EVENT_CLOSED without OOB Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-05-12Merge remote-tracking branch ↵Peter Maydell3-8/+157
'remotes/alistair/tags/pull-riscv-to-apply-20210511' into staging A large collection of RISC-V fixes, improvements and features - Clenaup some left over v1.9 code - Documentation improvements - Support for the shakti_c machine - Internal cleanup of the CSR accesses - Updates to the OpenTitan platform - Support for the virtio-vga - Fix for the saturate subtract in vector extensions - Experimental support for the ePMP spec - A range of other internal code cleanups and bug fixes # gpg: Signature made Tue 11 May 2021 11:17:10 BST # gpg: using RSA key F6C4AC46D4934868D3B8CE8F21E10D29DF977054 # gpg: Good signature from "Alistair Francis <alistair@alistair23.me>" [full] # Primary key fingerprint: F6C4 AC46 D493 4868 D3B8 CE8F 21E1 0D29 DF97 7054 * remotes/alistair/tags/pull-riscv-to-apply-20210511: (42 commits) target/riscv: Fix the RV64H decode comment target/riscv: Consolidate RV32/64 16-bit instructions target/riscv: Consolidate RV32/64 32-bit instructions target/riscv: Remove an unused CASE_OP_32_64 macro target/riscv: Remove the unused HSTATUS_WPRI macro target/riscv: Remove the hardcoded SATP_MODE macro target/riscv: Remove the hardcoded MSTATUS_SD macro target/riscv: Remove the hardcoded HGATP_MODE macro target/riscv: Remove the hardcoded SSTATUS_SD macro target/riscv: Remove the hardcoded RVXLEN macro target/riscv: fix a typo with interrupt names fpu/softfloat: set invalid excp flag for RISC-V muladd instructions hw/riscv: Fix OT IBEX reset vector target/riscv: fix exception index on instruction access fault target/riscv: fix vrgather macro index variable type bug target/riscv: Add ePMP support for the Ibex CPU target/riscv/pmp: Remove outdated comment target/riscv: Add a config option for ePMP target/riscv: Implementation of enhanced PMP (ePMP) target/riscv: Add ePMP CSR access functions ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-05-12Drop the deprecated unicore32 targetMarkus Armbruster1-40/+0
Target unicore32 was deprecated in commit 8e4ff4a8d2b, v5.2.0. See there for rationale. Cc: Guan Xuetao <gxt@mprc.pku.edu.cn> Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20210503084034.3804963-3-armbru@redhat.com> Acked-by: Thomas Huth <thuth@redhat.com>
2021-05-12Drop the deprecated lm32 targetMarkus Armbruster3-65/+0
Target lm32 was deprecated in commit d8498005122, v5.2.0. See there for rationale. Some of its code lives on in device models derived from milkymist ones: hw/char/digic-uart.c and hw/display/bcm2835_fb.c. Cc: Michael Walle <michael@walle.cc> Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20210503084034.3804963-2-armbru@redhat.com> Acked-by: Michael Walle <michael@walle.cc> [Trivial conflicts resolved, reST markup fixed]
2021-05-12Remove the deprecated moxie targetThomas Huth1-8/+0
There are no known users of this CPU anymore, and there are no binaries available online which could be used for regression tests, so the code has likely completely bit-rotten already. It's been marked as deprecated since two releases now and nobody spoke up that there is still a need to keep it, thus let's remove it now. Signed-off-by: Thomas Huth <thuth@redhat.com> Message-Id: <20210430160355.698194-1-thuth@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> [Commit message typos fixed, trivial conflicts resolved] Signed-off-by: Markus Armbruster <armbru@redhat.com>
2021-05-12Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into ↵Peter Maydell2-1/+7
staging * AccelCPUClass and sysemu/user split for i386 (Claudio) * i386 page walk unification * Fix detection of gdbus-codegen * Misc refactoring # gpg: Signature made Wed 12 May 2021 09:39:29 BST # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini-gitlab/tags/for-upstream: (32 commits) coverity-scan: list components, move model to scripts/coverity-scan configure: fix detection of gdbus-codegen qemu-option: support accept-any QemuOptsList in qemu_opts_absorb_qdict main-loop: remove dead code target/i386: use mmu_translate for NPT walk target/i386: allow customizing the next phase of the translation target/i386: extend pg_mode to more CR0 and CR4 bits target/i386: pass cr3 to mmu_translate target/i386: extract mmu_translate target/i386: move paging mode constants from SVM to cpu.h target/i386: merge SVM_NPTEXIT_* with PF_ERROR_* constants accel: add init_accel_cpu for adapting accel behavior to CPU type accel: move call to accel_init_interfaces i386: make cpu_load_efer sysemu-only target/i386: gdbstub: only write CR0/CR2/CR3/EFER for sysemu target/i386: gdbstub: introduce aux functions to read/write CS64 regs i386: split off sysemu part of cpu.c i386: split seg_helper into user-only and sysemu parts i386: split svm_helper into sysemu and stub-only user i386: separate fpu_helper sysemu-only parts ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-05-12Merge remote-tracking branch 'remotes/kraxel/tags/vga-20210510-pull-request' ↵Peter Maydell3-10/+42
into staging edid: display id support (for 5k+), bugfixes. virtio-gpu: iommu fix, device split. # gpg: Signature made Mon 10 May 2021 14:20:36 BST # gpg: using RSA key A0328CFFB93A17A79901FE7D4CB6D8EED3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" [full] # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" [full] # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" [full] # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138 * remotes/kraxel/tags/vga-20210510-pull-request: (25 commits) virtio-gpu: add virtio-vga-gl modules: add have_vga virtio-gpu: add virtio-gpu-gl-pci virtio-gpu: move fields to struct VirtIOGPUGL virtio-gpu: drop use_virgl_renderer virtio-gpu: move virtio-gpu-gl-device to separate module virtio-gpu: drop VIRGL() macro virtio-gpu: move update_cursor_data virtio-gpu: move virgl process_cmd virtio-gpu: move virgl gl_flushed virtio-gpu: move virgl handle_ctrl virtio-gpu: use class function for ctrl queue handlers virtio-gpu: move virgl reset virtio-gpu: move virgl realize + properties virtio-gpu: add virtio-gpu-gl-device virtio-gpu: rename virgl source file. virtio-gpu: handle partial maps properly edid: add support for DisplayID extension (5k resolution) edid: allow arbitrary-length checksums edid: move timing generation into a separate function ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-05-12Merge remote-tracking branch 'remotes/aperard/tags/pull-xen-20210510' into ↵Peter Maydell1-0/+6
staging Xen patches - Avoid mmap race involving Xen's mapcache - Fix xenforeignmemory_resource leak at exit - Fix xen-block to choose a driver for the disk image when created via xenstore. # gpg: Signature made Mon 10 May 2021 13:49:40 BST # gpg: using RSA key F80C006308E22CFD8A92E7980CF5572FD7FB55AF # gpg: Good signature from "Anthony PERARD <anthony.perard@gmail.com>" [unknown] # gpg: aka "Anthony PERARD <anthony.perard@citrix.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 5379 2F71 024C 600F 778A 7161 D8D5 7199 DF83 42C8 # Subkey fingerprint: F80C 0063 08E2 2CFD 8A92 E798 0CF5 572F D7FB 55AF * remotes/aperard/tags/pull-xen-20210510: xen-block: Use specific blockdev driver xen: Free xenforeignmemory_resource at exit xen-mapcache: avoid a race on memory map while using MAP_FIXED Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-05-11hw/opentitan: Update the interrupt layoutAlistair Francis1-8/+8
Update the OpenTitan interrupt layout to match the latest OpenTitan bitstreams. This involves changing the Ibex PLIC memory layout and the UART interrupts. Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Message-id: e92b696f1809c9fa4410da2e9f23c414db5a6960.1617202791.git.alistair.francis@wdc.com
2021-05-11hw/riscv: Connect Shakti UART to Shakti platformVijai Kumar K1-0/+2
Connect one shakti uart to the shakti_c machine. Signed-off-by: Vijai Kumar K <vijai@behindbytes.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20210401181457.73039-5-vijai@behindbytes.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2021-05-11hw/char: Add Shakti UART emulationVijai Kumar K1-0/+74
This is the initial implementation of Shakti UART. Signed-off-by: Vijai Kumar K <vijai@behindbytes.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20210401181457.73039-4-vijai@behindbytes.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2021-05-11riscv: Add initial support for Shakti C machineVijai Kumar K1-0/+73
Add support for emulating Shakti reference platform based on C-class running on arty-100T board. https://gitlab.com/shaktiproject/cores/shakti-soc/-/blob/master/README.rst Signed-off-by: Vijai Kumar K <vijai@behindbytes.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20210401181457.73039-3-vijai@behindbytes.com [Changes by AF: - Check for mstate->firmware before loading it ] Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2021-05-10accel: add init_accel_cpu for adapting accel behavior to CPU typeClaudio Fontana1-0/+6
while on x86 all CPU classes can use the same set of TCGCPUOps, on ARM the right accel behavior depends on the type of the CPU. So we need a way to specialize the accel behavior according to the CPU. Therefore, add a second initialization, after the accel_cpu->cpu_class_init, that allows to do this. Signed-off-by: Claudio Fontana <cfontana@suse.de> Cc: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20210322132800.7470-24-cfontana@suse.de> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-05-10accel-cpu: make cpu_realizefn return a boolClaudio Fontana1-1/+1
overall, all devices' realize functions take an Error **errp, but return void. hw/core/qdev.c code, which realizes devices, therefore does: local_err = NULL; dc->realize(dev, &local_err); if (local_err != NULL) { goto fail; } However, we can improve at least accel_cpu to return a meaningful bool value. Signed-off-by: Claudio Fontana <cfontana@suse.de> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210322132800.7470-9-cfontana@suse.de> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-05-10hw/misc/mps2-scc: Support using CFG0 bit 0 for remappingPeter Maydell1-0/+9
On some boards, SCC config register CFG0 bit 0 controls whether parts of the board memory map are remapped. Support this with: * a device property scc-cfg0 so the board can specify the initial value of the CFG0 register * an outbound GPIO line which tracks bit 0 and which the board can wire up to provide the remapping Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20210504120912.23094-3-peter.maydell@linaro.org
2021-05-10hw/misc/mps2-scc: Add "QEMU interface" commentPeter Maydell1-0/+12
The MPS2 SCC device doesn't have any documentation of its properties; add a "QEMU interface" format comment describing them. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210504120912.23094-2-peter.maydell@linaro.org
2021-05-10xen: Free xenforeignmemory_resource at exitAnthony PERARD1-0/+6
Because Coverity complains about it and this is one leak that Valgrind reports. Signed-off-by: Anthony PERARD <anthony.perard@citrix.com> Acked-by: Paul Durrant <paul@xen.org> Message-Id: <20210430163742.469739-1-anthony.perard@citrix.com> Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
2021-05-10modules: add have_vgaGerd Hoffmann1-0/+6
Introduce a symbol which can be used to prevent display modules which need vga support being loaded into system emulators with CONFIG_VGA=n. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 20210430113547.1816178-1-kraxel@redhat.com Message-Id: <20210430113547.1816178-16-kraxel@redhat.com>
2021-05-10virtio-gpu: move fields to struct VirtIOGPUGLGerd Hoffmann1-2/+3
Move two virglrenderer state variables to struct VirtIOGPUGL. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 20210430113547.1816178-1-kraxel@redhat.com Message-Id: <20210430113547.1816178-14-kraxel@redhat.com>
2021-05-10virtio-gpu: drop use_virgl_rendererGerd Hoffmann1-1/+0
Now that we have separated the gl and non-gl code flows to two different devices there is little reason turn on and off virglrenderer usage at runtime. The gl code can simply use virglrenderer unconditionally. So drop use_virgl_renderer field and just do that. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 20210430113547.1816178-1-kraxel@redhat.com Message-Id: <20210430113547.1816178-13-kraxel@redhat.com>
2021-05-10virtio-gpu: move update_cursor_dataGerd Hoffmann1-0/+6
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 20210430113547.1816178-1-kraxel@redhat.com Message-Id: <20210430113547.1816178-10-kraxel@redhat.com>
2021-05-10virtio-gpu: move virgl process_cmdGerd Hoffmann1-0/+2
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 20210430113547.1816178-1-kraxel@redhat.com Message-Id: <20210430113547.1816178-9-kraxel@redhat.com>
2021-05-10virtio-gpu: use class function for ctrl queue handlersGerd Hoffmann1-1/+7
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 20210430113547.1816178-1-kraxel@redhat.com Message-Id: <20210430113547.1816178-6-kraxel@redhat.com>
2021-05-10virtio-gpu: move virgl resetGerd Hoffmann1-0/+1
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 20210430113547.1816178-1-kraxel@redhat.com Message-Id: <20210430113547.1816178-5-kraxel@redhat.com>
2021-05-10virtio-gpu: move virgl realize + propertiesGerd Hoffmann1-0/+1
Move device init (realize) and properties. Drop the virgl property, the virtio-gpu-gl-device has virgl enabled no matter what. Just use virtio-gpu-device instead if you don't want enable virgl and opengl. This simplifies the logic and reduces the test matrix. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 20210430113547.1816178-1-kraxel@redhat.com Message-Id: <20210430113547.1816178-4-kraxel@redhat.com>
2021-05-10virtio-gpu: add virtio-gpu-gl-deviceGerd Hoffmann1-0/+7
Just a skeleton for starters, following patches will add more code. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 20210430113547.1816178-1-kraxel@redhat.com Message-Id: <20210430113547.1816178-3-kraxel@redhat.com>
2021-05-10virtio-gpu: handle partial maps properlyGerd Hoffmann1-1/+2
dma_memory_map() may map only a part of the request. Happens if the request can't be mapped in one go, for example due to a iommu creating a linear dma mapping for scattered physical pages. Should that be the case virtio-gpu must call dma_memory_map() again with the remaining range instead of simply throwing an error. Note that this change implies the number of iov entries may differ from the number of mapping entries sent by the guest. Therefore the iov_len bookkeeping needs some updates too, we have to explicitly pass around the iov length now. Reported-by: Auger Eric <eric.auger@redhat.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 20210506091001.1301250-1-kraxel@redhat.com Reviewed-by: Eric Auger <eric.auger@redhat.com> Tested-by: Eric Auger <eric.auger@redhat.com> Message-Id: <20210506091001.1301250-1-kraxel@redhat.com>
2021-05-10edid: Make refresh rate configurableAkihiko Odaki1-5/+7
Signed-off-by: Akihiko Odaki <akihiko.odaki@gmail.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 20210427150824.638359-1-kraxel@redhat.com Message-Id: <20210427150824.638359-6-kraxel@redhat.com>
2021-05-05Merge remote-tracking branch 'remotes/dg-gitlab/tags/ppc-for-6.1-20210504' ↵Peter Maydell4-5/+16
into staging ppc patch queue 2021-05-04 Here's the first ppc pull request for qemu-6.1. It has a wide variety of stuff accumulated during the 6.0 freeze. Highlights are: * Multi-phase reset cleanups for PAPR * Preliminary cleanups towards allowing !CONFIG_TCG for the ppc target * Cleanup of AIL logic and extension to POWER10 * Further improvements to handling of hot unplug failures on PAPR * Allow much larger numbers of CPU on pseries * Support for the H_SCM_HEALTH hypercall * Add support for the Pegasos II board * Substantial cleanup to hflag handling * Assorted minor fixes and cleanups # gpg: Signature made Tue 04 May 2021 06:52:39 BST # gpg: using RSA key 75F46586AE61A66CC44E87DC6C38CACA20D9B392 # gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" [full] # gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>" [full] # gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>" [full] # gpg: aka "David Gibson (kernel.org) <dwg@kernel.org>" [unknown] # Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392 * remotes/dg-gitlab/tags/ppc-for-6.1-20210504: (46 commits) hw/ppc/pnv_psi: Use device_cold_reset() instead of device_legacy_reset() hw/ppc/spapr_vio: Reset TCE table object with device_cold_reset() hw/intc/spapr_xive: Use device_cold_reset() instead of device_legacy_reset() target/ppc: removed VSCR from SPR registration target/ppc: Reduce the size of ppc_spr_t target/ppc: Clean up _spr_register et al target/ppc: Add POWER10 exception model target/ppc: rework AIL logic in interrupt delivery target/ppc: move opcode table logic to translate.c target/ppc: code motion from translate_init.c.inc to gdbstub.c spapr_drc.c: handle hotunplug errors in drc_unisolate_logical() spapr.h: increase FDT_MAX_SIZE spapr.c: do not use MachineClass::max_cpus to limit CPUs ppc: Rename current DAWR macros and variables target/ppc: POWER10 supports scv target/ppc: Fix POWER9 radix guest HV interrupt AIL behaviour docs/system: ppc: Add documentation for ppce500 machine roms/u-boot: Bump ppce500 u-boot to v2021.04 to fix broken pci support roms/Makefile: Update ppce500 u-boot build directory name ppc/spapr: Add support for implement support for H_SCM_HEALTH ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-05-05Merge remote-tracking branch ↵Peter Maydell7-7/+1
'remotes/vivier2/tags/trivial-branch-for-6.1-pull-request' into staging Trivial patches pull request 20210503 # gpg: Signature made Mon 03 May 2021 09:34:56 BST # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C # gpg: issuer "laurent@vivier.eu" # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full] # gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full] # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full] # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * remotes/vivier2/tags/trivial-branch-for-6.1-pull-request: (23 commits) hw/rx/rx-gdbsim: Do not accept invalid memory size docs: More precisely describe memory-backend-*::id's user scripts: fix generation update-binfmts templates docs/system: Document the removal of "compat" property for POWER CPUs mc146818rtc: put it into the 'misc' category Do not include exec/address-spaces.h if it's not really necessary Do not include cpu.h if it's not really necessary Do not include hw/boards.h if it's not really necessary Do not include sysemu/sysemu.h if it's not really necessary hw: Do not include qemu/log.h if it is not necessary hw: Do not include hw/irq.h if it is not necessary hw: Do not include hw/sysbus.h if it is not necessary hw: Remove superfluous includes of hw/hw.h ui: Fix memory leak in qemu_xkeymap_mapping_table() hw/usb: Constify VMStateDescription hw/display/qxl: Constify VMStateDescription hw/arm: Constify VMStateDescription vmstate: Constify some VMStateDescriptions Fix typo in CFI build documentation hw/pcmcia: Do not register PCMCIA type if not required ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-05-04Merge remote-tracking branch 'remotes/legoater/tags/pull-aspeed-20210503' ↵Peter Maydell4-5/+65
into staging Aspeed patches : * Fixes for the DMA space * New model for ASPEED's Hash and Crypto Engine (Joel and Klaus) * Acceptance tests (Joel) * A fix for the XDMA model * Some extra features for the SMC controller. * Two new boards : rainier-bmc and quanta-q7l1-bmc (Patrick) # gpg: Signature made Mon 03 May 2021 06:23:36 BST # gpg: using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1 # gpg: Good signature from "Cédric Le Goater <clg@kaod.org>" [undefined] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: A0F6 6548 F048 95EB FE6B 0B60 51A3 43C7 CFFB ECA1 * remotes/legoater/tags/pull-aspeed-20210503: aspeed: Add support for the quanta-q7l1-bmc board hw/block: m25p80: Add support for mt25ql02g and mt25qu02g aspeed: Add support for the rainier-bmc board aspeed: Deprecate the swift-bmc machine tests/qtest: Rename m25p80 test in aspeed_smc test aspeed/smc: Add extra controls to request DMA aspeed/smc: Add a 'features' attribute to the object class hw/misc/aspeed_xdma: Add AST2600 support tests/acceptance: Test ast2600 machine tests/acceptance: Test ast2400 and ast2500 machines tests/qtest: Add test for Aspeed HACE aspeed: Integrate HACE hw: Model ASPEED's Hash and Crypto Engine hw/arm/aspeed: Do not sysbus-map mmio flash region directly, use alias aspeed/i2c: Rename DMA address space aspeed/i2c: Fix DMA address mask aspeed/smc: Remove unused "sdram-base" property aspeed/smc: Use the RAM memory region for DMAs Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-05-04spapr.h: increase FDT_MAX_SIZEDaniel Henrique Barboza1-1/+1
Certain SMP topologies stress, e.g. 1 thread/core, 2048 cores and 1 socket, stress the current maximum size of the pSeries FDT: Calling ibm,client-architecture-support...qemu-system-ppc64: error creating device tree: (fdt_setprop(fdt, offset, "ibm,processor-segment-sizes", segs, sizeof(segs))): FDT_ERR_NOSPACE 2048 is the default NR_CPUS value for the pSeries kernel. It's expected that users will want QEMU to be able to handle this kind of configuration. Bumping FDT_MAX_SIZE to 2MB is enough for these setups to be created. Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-Id: <20210408204049.221802-3-danielhb413@gmail.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-04ppc: Rename current DAWR macros and variablesRavi Bangoria1-1/+1
Power10 is introducing second DAWR. Use real register names (with suffix 0) from ISA for current macros and variables used by Qemu. One exception to this is KVM_REG_PPC_DAWR[X]. This is from kernel uapi header and thus not changed in kernel as well as Qemu. Signed-off-by: Ravi Bangoria <ravi.bangoria@linux.ibm.com> Reviewed-by: Greg Kurz <groug@kaod.org> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Message-Id: <20210412114433.129702-3-ravi.bangoria@linux.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-04ppc/spapr: Add support for implement support for H_SCM_HEALTHVaibhav Jain1-1/+2
Add support for H_SCM_HEALTH hcall described at [1] for spapr nvdimms. This enables guest to detect the 'unarmed' status of a specific spapr nvdimm identified by its DRC and if its unarmed, mark the region backed by the nvdimm as read-only. The patch adds h_scm_health() to handle the H_SCM_HEALTH hcall which returns two 64-bit bitmaps (health bitmap, health bitmap mask) derived from 'struct nvdimm->unarmed' member. Linux kernel side changes to enable handling of 'unarmed' nvdimms for ppc64 are proposed at [2]. References: [1] "Hypercall Op-codes (hcalls)" https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/powerpc/papr_hcalls.rst#n220 [2] "powerpc/papr_scm: Mark nvdimm as unarmed if needed during probe" https://lore.kernel.org/linux-nvdimm/20210329113103.476760-1-vaibhav@linux.ibm.com/ Signed-off-by: Vaibhav Jain <vaibhav@linux.ibm.com> Message-Id: <20210402102128.213943-1-vaibhav@linux.ibm.com> Reviewed-by: Greg Kurz <groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-04hw/pci-host: Add emulation of Marvell MV64361 PPC system controllerBALATON Zoltan2-0/+9
The Marvell Discovery II aka. MV64361 is a PowerPC system controller chip that is used on the pegasos2 PPC board. This adds emulation of it that models the device enough to boot guests on this board. The mv643xx.h header with register definitions is taken from Linux 4.15.10 only fixing white space errors, removing not needed parts and changing formatting for QEMU coding style. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Message-Id: <79545ebd03bfe0665b73d2d7cbc74fdf3d62629e.1616680239.git.balaton@eik.bme.hu> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-04vt82c686: Add emulation of VT8231 south bridgeBALATON Zoltan2-0/+2
Add emulation of VT8231 south bridge ISA part based on the similar VT82C686B but implemented in a separate subclass that holds the differences while reusing parts that can be shared. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <10abc9f89854e7c980b9731c33d25a2e307e9c4f.1616680239.git.balaton@eik.bme.hu> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
generated by cgit v1.1 at 2025-01-19 00:23:03 +0000