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2022-04-26hw/intc: Vectored Interrupt Controller (VIC)Amir Gonnen1-0/+64
2022-04-22Merge tag 'pull-target-arm-20220422-1' of https://git.linaro.org/people/pmayd...Richard Henderson3-3/+48
2022-04-22hw/arm/virt: Support TCG GICv4Peter Maydell1-2/+10
2022-04-22hw/arm/virt: Abstract out calculation of redistributor region capacityPeter Maydell1-2/+7
2022-04-22hw/intc/arm_gicv3_cpuif: Support vLPIsPeter Maydell1-0/+3
2022-04-22hw/intc/arm_gicv3: Implement new GICv4 redistributor registersPeter Maydell1-0/+3
2022-04-22hw/intc/arm_gicv3: Implement GICv4's new redistributor framePeter Maydell1-0/+5
2022-04-22hw/intc/arm_gicv3_its: Implement VMOVPPeter Maydell1-0/+9
2022-04-22hw/intc/arm_gicv3: Keep pointers to every connected ITSPeter Maydell2-0/+11
2022-04-22hw/intc/arm_gicv3_its: Implement GITS_BASER2 for GICv4Peter Maydell1-0/+1
2022-04-22hw/riscv: boot: Support 64bit fdt address.Dylan Jhong1-2/+2
2022-04-22hw/core: tcg-cpu-ops.h: Update comments of debug_check_watchpoint()Bin Meng1-0/+1
2022-04-22hw/intc: Make RISC-V ACLINT mtime MMIO register writableFrank Chang1-0/+1
2022-04-22riscv: opentitan: Connect opentitan SPI HostWilfred Mallawa1-9/+21
2022-04-22hw/ssi: Add Ibex SPI device modelWilfred Mallawa1-0/+94
2022-04-21Merge tag 'misc-pull-request' of gitlab.com:marcandre.lureau/qemu into stagingRichard Henderson3-5/+5
2022-04-21Merge tag 'pull-target-arm-20220421' of https://git.linaro.org/people/pmaydel...Richard Henderson9-36/+458
2022-04-21compiler.h: replace QEMU_NORETURN with G_NORETURNMarc-André Lureau3-5/+5
2022-04-21hw/misc: Add PWRON STRAP bit fields in GCR moduleHao Wu1-0/+30
2022-04-21hw/core/irq: remove unused 'qemu_irq_split' functionZongyuan Li1-5/+0
2022-04-21hw/arm/exynos4210: Drop Exynos4210Irq structPeter Maydell1-6/+0
2022-04-21hw/arm/exynos4210: Put combiners into state structPeter Maydell2-0/+60
2022-04-21hw/arm/exynos4210: Fold combiner splits into exynos4210_init_board_irqs()Peter Maydell1-2/+4
2022-04-21hw/arm/exynos4210: Don't connect multiple lines to external GIC inputsPeter Maydell1-1/+1
2022-04-21hw/arm/exynos4210: Use TYPE_SPLIT_IRQ in exynos4210_init_board_irqs()Peter Maydell1-0/+9
2022-04-21hw/arm/exynos4210: Delete unused macro definitionsPeter Maydell1-4/+0
2022-04-21hw/arm/exynos4210: Move exynos4210_combiner_get_gpioin() into exynos4210.cPeter Maydell1-11/+0
2022-04-21hw/arm/exynos4210: Drop ext_gic_irq[] from Exynos4210Irq structPeter Maydell1-1/+0
2022-04-21hw/arm/exynos4210: Put external GIC into state structPeter Maydell2-0/+45
2022-04-21hw/arm/exynos4210: Move exynos4210_init_board_irqs() into exynos4210.cPeter Maydell1-4/+0
2022-04-21hw/arm/exynos4210: Coalesce board_irqs and irq_tablePeter Maydell1-6/+2
2022-04-21hw/arm/exynos4210: Drop int_gic_irq[] from Exynos4210Irq structPeter Maydell1-1/+0
2022-04-21hw/arm/exynos4210: Put a9mpcore device into state structPeter Maydell1-0/+2
2022-04-21hw/arm/exynos4210: Use TYPE_OR_IRQ instead of custom OR-gate devicePeter Maydell1-0/+1
2022-04-21hw/arm: versal: Connect the CRLEdgar E. Iglesias1-0/+4
2022-04-21hw/misc: Add a model of the Xilinx Versal CRLEdgar E. Iglesias1-0/+235
2022-04-21hw/arm: versal: Add the Cortex-R5FsEdgar E. Iglesias1-0/+10
2022-04-21hw/arm: versal: Create an APU CPU ClusterEdgar E. Iglesias1-0/+2
2022-04-21hw/arm/xlnx-zynqmp: Connect 4 TTC timersEdgar E. Iglesias1-0/+4
2022-04-21timer: cadence_ttc: Break out header file to allow embeddingEdgar E. Iglesias1-0/+54
2022-04-20hw/ppc: change indentation to spaces from TABsGuo Zhi1-5/+5
2022-04-20ppc/pnv: Remove PnvPsiClas::irq_setCédric Le Goater1-4/+0
2022-04-20ppc/pnv: Remove PnvOCC::psi linkCédric Le Goater1-5/+2
2022-04-20ppc/pnv: Remove PnvLpcController::psi linkCédric Le Goater1-6/+2
2022-04-20ppc/pnv: Fix PSI IRQ definitionCédric Le Goater1-2/+1
2022-04-20ppc/spapr/ddw: Add 2M pagesizeAlexey Kardashevskiy1-0/+1
2022-04-20hw: Add compat machines for 7.1Cornelia Huck2-0/+6
2022-04-19Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into stagingRichard Henderson8-13/+125
2022-04-06acpi: fix acpi_index migrationDr. David Alan Gilbert1-2/+0
2022-04-06hyperv: Add support to process syndbg commandsJon Doron1-0/+58
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