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Author
Files
Lines
2020-09-18
qom: Remove module_obj_name parameter from OBJECT_DECLARE* macros
Eduardo Habkost
29
-29
/
+29
2020-09-18
sifive: Use DECLARE_*CHECKER* macros
Eduardo Habkost
6
-11
/
+12
2020-09-18
sifive: Move QOM typedefs and add missing includes
Eduardo Habkost
6
-12
/
+24
2020-09-18
sifive_u: Rename memmap enum constants
Eduardo Habkost
1
-17
/
+17
2020-09-18
sifive_e: Rename memmap enum constants
Eduardo Habkost
1
-19
/
+19
2020-09-17
x86: move cpu hotplug from pc to x86
Gerd Hoffmann
1
-0
/
+10
2020-09-17
x86: move acpi_dev from pc/microvm
Gerd Hoffmann
3
-2
/
+1
2020-09-17
x86: constify x86_machine_is_*_enabled
Gerd Hoffmann
1
-2
/
+2
2020-09-17
microvm/acpi: add minimal acpi support
Gerd Hoffmann
1
-0
/
+9
2020-09-17
microvm: make virtio irq base runtime configurable
Gerd Hoffmann
1
-1
/
+1
2020-09-17
acpi: move acpi_dsdt_add_power_button() to ged
Gerd Hoffmann
1
-0
/
+1
2020-09-17
acpi: ged: add x86 device variant.
Gerd Hoffmann
1
-0
/
+4
2020-09-17
acpi: ged: add control regs
Gerd Hoffmann
1
-0
/
+12
2020-09-15
virtio-gpu: make virtio_gpu_ops static
Gerd Hoffmann
1
-2
/
+1
2020-09-14
hw/arm/npcm7xx: add board setup stub for CPU and UART clocks
Havard Skinnemoen
1
-0
/
+1
2020-09-14
hw/ssi: NPCM7xx Flash Interface Unit device model
Havard Skinnemoen
2
-0
/
+75
2020-09-14
hw/mem: Stubbed out NPCM7xx Memory Controller model
Havard Skinnemoen
2
-0
/
+38
2020-09-14
hw/nvram: NPCM7xx OTP device model
Havard Skinnemoen
2
-0
/
+82
2020-09-14
hw/arm: Add two NPCM7xx-based machines
Havard Skinnemoen
1
-0
/
+19
2020-09-14
hw/arm: Add NPCM730 and NPCM750 SoC models
Havard Skinnemoen
1
-0
/
+85
2020-09-14
hw/timer: Add NPCM7xx Timer device model
Havard Skinnemoen
1
-0
/
+78
2020-09-14
hw/misc: Add NPCM7xx Clock Controller device model
Havard Skinnemoen
1
-0
/
+48
2020-09-14
hw/misc: Add NPCM7xx System Global Control Registers device model
Havard Skinnemoen
1
-0
/
+43
2020-09-13
Merge remote-tracking branch 'remotes/alistair/tags/pull-riscv-to-apply-20200...
Peter Maydell
17
-86
/
+319
2020-09-09
hw/riscv: Move sifive_test model to hw/misc
Bin Meng
1
-0
/
+0
2020-09-09
hw/riscv: Move sifive_uart model to hw/char
Bin Meng
1
-0
/
+0
2020-09-09
hw/riscv: Move riscv_htif model to hw/char
Bin Meng
1
-0
/
+0
2020-09-09
hw/riscv: Move sifive_plic model to hw/intc
Bin Meng
1
-81
/
+0
2020-09-09
hw/riscv: Move sifive_clint model to hw/intc
Bin Meng
1
-0
/
+0
2020-09-09
hw/riscv: Move sifive_gpio model to hw/gpio
Bin Meng
3
-2
/
+2
2020-09-09
hw/riscv: Move sifive_u_otp model to hw/misc
Bin Meng
2
-1
/
+1
2020-09-09
hw/riscv: Move sifive_u_prci model to hw/misc
Bin Meng
2
-1
/
+1
2020-09-09
hw/riscv: Move sifive_e_prci model to hw/misc
Bin Meng
1
-0
/
+0
2020-09-09
hw/riscv: sifive_u: Connect a DMA controller
Bin Meng
1
-0
/
+11
2020-09-09
hw/riscv: clint: Avoid using hard-coded timebase frequency
Bin Meng
1
-1
/
+3
2020-09-09
hw/riscv: microchip_pfsoc: Hook GPIO controllers
Bin Meng
1
-0
/
+3
2020-09-09
hw/riscv: microchip_pfsoc: Connect 2 Cadence GEMs
Bin Meng
1
-0
/
+7
2020-09-09
hw/net: cadence_gem: Add a new 'phy-addr' property
Bin Meng
1
-0
/
+2
2020-09-09
hw/riscv: microchip_pfsoc: Connect a DMA controller
Bin Meng
1
-0
/
+11
2020-09-09
hw/dma: Add SiFive platform DMA controller emulation
Bin Meng
1
-0
/
+57
2020-09-09
hw/riscv: microchip_pfsoc: Connect a Cadence SDHCI controller and an SD card
Bin Meng
1
-0
/
+4
2020-09-09
hw/sd: Add Cadence SDHCI emulation
Bin Meng
1
-0
/
+47
2020-09-09
hw/riscv: microchip_pfsoc: Connect 5 MMUARTs
Bin Meng
1
-0
/
+20
2020-09-09
hw/char: Add Microchip PolarFire SoC MMUART emulation
Bin Meng
1
-0
/
+61
2020-09-09
hw/riscv: Initial support for Microchip PolarFire SoC Icicle Kit board
Bin Meng
1
-0
/
+88
2020-09-09
hw/riscv: hart: Add a new 'resetvec' property
Bin Meng
1
-0
/
+1
2020-09-09
pc87312: Rename TYPE_PC87312_SUPERIO to TYPE_PC87312
Eduardo Habkost
1
-2
/
+2
2020-09-09
sabre: Rename SABRE_DEVICE to SABRE
Eduardo Habkost
1
-1
/
+1
2020-09-09
esp: Rename ESP_STATE to ESP
Eduardo Habkost
1
-1
/
+1
2020-09-09
ahci: Rename ICH_AHCI to ICH9_AHCI
Eduardo Habkost
1
-1
/
+1
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