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2018-10-19hyperv: only add SynIC in compatible configurationsRoman Kagan1-0/+8
Certain configurations do not allow SynIC to be used in QEMU. In particular, - when hyperv_vpindex is off, SINT routes can't be used as they refer to the destination vCPU by vp_index - older KVM (which doesn't expose KVM_CAP_HYPERV_SYNIC2) zeroes out SynIC message and event pages on every msr load, breaking migration OTOH in-KVM users of SynIC -- SynIC timers -- do work in those configurations, and we shouldn't stop the guest from using them. To cover both scenarios, introduce an X86CPU property that makes CPU init code to skip creation of the SynIC object (and thus disables any SynIC use in QEMU) but keeps the KVM part of the SynIC working. The property is clear by default but is set via compat logic for older machine types. As a result, when hv_synic and a modern machine type are specified, QEMU will refuse to run unless vp_index is on and the kernel is recent enough. OTOH with an older machine type QEMU will run fine with hv_synic=on against an older kernel and/or without vp_index enabled but will disallow the in-QEMU uses of SynIC (in e.g. VMBus). Signed-off-by: Roman Kagan <rkagan@virtuozzo.com> Message-Id: <20180921082217.29481-4-rkagan@virtuozzo.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-10-19hyperv: qom-ify SynICRoman Kagan1-0/+5
Make Hyper-V SynIC a device which is attached as a child to a CPU. For now it only makes SynIC visibile in the qom hierarchy, and maintains its internal fields in sync with the respecitve msrs of the parent cpu (the fields will be used in followup patches). Signed-off-by: Roman Kagan <rkagan@virtuozzo.com> Message-Id: <20180921082217.29481-3-rkagan@virtuozzo.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-10-19hyperv: factor out arch-independent API into hw/hypervRoman Kagan1-0/+31
A significant part of hyperv.c is not actually tied to x86, and can be moved to hw/. This will allow to maintain most of Hyper-V and VMBus target-independent, and to avoid conflicts with inclusion of arch-specific headers down the road in VMBus implementation. Also this stuff can now be opt-out with CONFIG_HYPERV. Signed-off-by: Roman Kagan <rkagan@virtuozzo.com> Message-Id: <20180921082041.29380-4-rkagan@virtuozzo.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-10-19hyperv: split hyperv-proto.h into x86 and arch-independent partsRoman Kagan1-0/+129
Some parts of the Hyper-V hypervisor-guest interface appear to be target-independent, so move them into a proper header. Not that Hyper-V ARM64 emulation is around the corner but it seems more conveninent to have most of Hyper-V and VMBus target-independent, and allows to avoid conflicts with inclusion of arch-specific headers down the road in VMBus implementation. Signed-off-by: Roman Kagan <rkagan@virtuozzo.com> Message-Id: <20180921082041.29380-2-rkagan@virtuozzo.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-10-19call HotplugHandler->plug() as the last step in device realizationIgor Mammedov1-11/+0
When [2] was fixed it was agreed that adding and calling post_plug() callback after device_reset() was low risk approach to hotfix issue right before release. So it was merged instead of moving already existing plug() callback after device_reset() is called which would be more risky and require all plug() callbacks audit. Looking at the current plug() callbacks, it doesn't seem that moving plug() callback after device_reset() is breaking anything, so here goes agreed upon [3] proper fix which essentially reverts [1][2] and moves plug() callback after device_reset(). This way devices always comes to plug() stage, after it's been fully initialized (including being reset), which fixes race condition [2] without need for an extra post_plug() callback. 1. (25e897881 "qdev: add HotplugHandler->post_plug() callback") 2. (8449bcf94 "virtio-scsi: fix hotplug ->reset() vs event race") 3. https://www.mail-archive.com/qemu-devel@nongnu.org/msg549915.html Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <1539696820-273275-1-git-send-email-imammedo@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Tested-by: Pierre Morel<pmorel@linux.ibm.com> Acked-by: Pierre Morel<pmorel@linux.ibm.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-10-16net: cadence_gem: Add support for selecting the DMA MemoryRegionEdgar E. Iglesias1-0/+2
Add support for selecting the Memory Region that the GEM will do DMA to. Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20181011021931.4249-7-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-10-16net: cadence_gem: Add support for extended descriptorsEdgar E. Iglesias1-1/+1
Add support for extended descriptors with optional 64bit addressing and timestamping. QEMU will not yet provide timestamps (always leaving the valid timestamp bit as zero). Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 20181011021931.4249-6-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-10-16net: cadence_gem: Add macro with max number of descriptor wordsEdgar E. Iglesias1-1/+4
Add macro with max number of DMA descriptor words. No functional change. Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 20181011021931.4249-5-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-10-16net: cadence_gem: Use uint32_t for 32bit descriptor wordsEdgar E. Iglesias1-1/+1
Use uint32_t instead of unsigned to describe 32bit descriptor words. Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 20181011021931.4249-4-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-10-15vfio/platform: Make the vfio-platform device non-abstractEric Auger1-1/+2
Up to now the vfio-platform device has been abstract and could not be instantiated. The integration of a new vfio platform device required creating a dummy derived device which only set the compatible string. Following the few vfio-platform device integrations we have seen the actual requested adaptation happens on device tree node creation (sysbus-fdt). Hence remove the abstract setting, and read the list of compatible values from sysfs if not set by a derived device. Update the amd-xgbe and calxeda-xgmac drivers to fill in the number of compatible values, as there can now be more than one. Note that sysbus-fdt does not support the instantiation of the vfio-platform device yet. Signed-off-by: Eric Auger <eric.auger@redhat.com> [geert: Rebase, set user_creatable=true, use compatible values in sysfs instead of user-supplied manufacturer/model options, reword] Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Eric Auger <eric.auger@redhat.com> Tested-by: Eric Auger <eric.auger@redhat.com> Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
2018-10-15hw/vfio/display: add ramfb supportGerd Hoffmann1-0/+2
So we have a boot display when using a vgpu as primary display. ramfb depends on a fw_cfg file. fw_cfg files can not be added and removed at runtime, therefore a ramfb-enabled vfio device can't be hotplugged. Add a nohotplug variant of the vfio-pci device (as child class). Add the ramfb property to the nohotplug variant only. So to enable the vgpu display with boot support use this: -device vfio-pci-nohotplug,display=on,ramfb=on,sysfsdev=... Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
2018-10-15i2c: switch ddc to use the new edid generatorGerd Hoffmann1-1/+3
This also makes the default display resolution configurable, via xres and yres properties. The default is 1024x768. The old code had a hard-coded resolution of 1600x1200. Cc: Linus Walleij <linus.walleij@linaro.org> Cc: BALATON Zoltan <balaton@eik.bme.hu> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 20181005110837.28209-1-kraxel@redhat.com
2018-10-12s390x/vfio: ap: Introduce VFIO AP deviceTony Krowiak1-0/+1
Introduces a VFIO based AP device. The device is defined via the QEMU command line by specifying: -device vfio-ap,sysfsdev=<path-to-mediated-matrix-device> There may be only one vfio-ap device configured for a guest. The mediated matrix device is created by the VFIO AP device driver by writing a UUID to a sysfs attribute file (see docs/vfio-ap.txt). The mediated matrix device will be named after the UUID. Symbolic links to the $uuid are created in many places, so the path to the mediated matrix device $uuid can be specified in any of the following ways: /sys/devices/vfio_ap/matrix/$uuid /sys/devices/vfio_ap/matrix/mdev_supported_types/vfio_ap-passthrough/devices/$uuid /sys/bus/mdev/devices/$uuid /sys/bus/mdev/drivers/vfio_mdev/$uuid When the vfio-ap device is realized, it acquires and opens the VFIO iommu group to which the mediated matrix device is bound. This causes a VFIO group notification event to be signaled. The vfio_ap device driver's group notification handler will get called at which time the device driver will configure the the AP devices to which the guest will be granted access. Signed-off-by: Tony Krowiak <akrowiak@linux.ibm.com> Tested-by: Pierre Morel <pmorel@linux.ibm.com> Acked-by: Halil Pasic <pasic@linux.ibm.com> Tested-by: Pierre Morel <pmorel@linux.ibm.com> Tested-by: Christian Borntraeger <borntraeger@de.ibm.com> Message-Id: <20181010170309.12045-6-akrowiak@linux.ibm.com> Reviewed-by: Thomas Huth <thuth@redhat.com> [CH: added missing g_free and device category] Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2018-10-12s390x/ap: base Adjunct Processor (AP) object modelTony Krowiak2-0/+41
Introduces the base object model for virtualizing AP devices. Signed-off-by: Tony Krowiak <akrowiak@linux.ibm.com> Tested-by: Pierre Morel <pmorel@linux.ibm.com> Acked-by: David Hildenbrand <david@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Halil Pasic <pasic@linux.ibm.com> Tested-by: Christian Borntraeger <borntraeger@de.ibm.com> Message-Id: <20181010170309.12045-5-akrowiak@linux.ibm.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2018-10-05Merge remote-tracking branch 'remotes/kraxel/tags/vga-20181005-pull-request' ↵Peter Maydell1-1/+1
into staging vga: edid fixes, qxl clang workaround, vga mmio subregion fix. # gpg: Signature made Fri 05 Oct 2018 12:11:40 BST # gpg: using RSA key 4CB6D8EED3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138 * remotes/kraxel/tags/vga-20181005-pull-request: edid: fix vendor default secondary-vga: delete mmio subregions upon exit hw/display/qxl: Suppress clang-7 warning about misaligned atomic operation edid: Ignore built binary Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-10-05edid: fix vendor defaultGerd Hoffmann1-1/+1
"EMU" actually is "Emulex Corporation", so not a good idea to use that by default. Lets use the Red Hat vendor id instead, which is in line with the pci ids which are allocated from Red Hat vendor ids too. Vendor list is available from http://www.uefi.org/pnp_id_list Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 20181005091934.12143-1-kraxel@redhat.com
2018-10-04s390x: Fence huge pages prior to 3.1Janosch Frank1-0/+3
As the kernel has no way of disallowing the start of a huge page backed VM, we can migrate a running huge backed VM to a host that has no huge page KVM support. Let's glue huge page support support to the 3.1 machine, so we do not migrate to a destination host that doesn't have QEMU huge page support and can stop migration if KVM doesn't indicate support. Signed-off-by: Janosch Frank <frankja@linux.ibm.com> Message-Id: <20180928093435.198573-1-frankja@linux.ibm.com> Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2018-10-04hw/s390x/ioinst: Fix alignment problem in struct SubchDevThomas Huth2-9/+16
struct SubchDev embeds several other structures which are marked with QEMU_PACKED. This causes the compiler to not care for proper alignment of these structures. When we later pass around pointers to the unaligned struct members during migration, this causes problems on host architectures like Sparc that can not do unaligned memory access. Most of the structs in ioinst.h are naturally aligned, so we can fix most of the problem by removing the QEMU_PACKED statements (and use QEMU_BUILD_BUG_MSG() statements instead to make sure that there is no padding). However, for the struct SCHIB, we have to keep the QEMU_PACKED since the compiler adds some padding here otherwise. Move this struct to the beginning of struct SubchDev instead to fix the alignment problem here, too. Signed-off-by: Thomas Huth <thuth@redhat.com> Message-Id: <1538036615-32542-4-git-send-email-thuth@redhat.com> Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2018-10-04hw/s390x/css: Remove QEMU_PACKED from struct SenseIdThomas Huth1-1/+1
The uint16_t member cu_type of struct SenseId is not naturally aligned, and since the struct is marked with QEMU_PACKED, this can lead to unaligned memory accesses - which does not work on architectures like Sparc. Thus remove the QEMU_PACKED here and rather copy the struct byte by byte when we do copy_sense_id_to_guest(). Signed-off-by: Thomas Huth <thuth@redhat.com> Message-Id: <1538036615-32542-3-git-send-email-thuth@redhat.com> Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2018-10-02change get_image_size return type to int64_tLi Zhijian1-1/+1
Previously, if the size of initrd >=2G, qemu exits with error: root@haswell-OptiPlex-9020:/home/lizj# /home/lizhijian/lkp/qemu-colo/x86_64-softmmu/qemu-system-x86_64 -kernel ./vmlinuz-4.16.0-rc4 -initrd large.cgz -nographic qemu: error reading initrd large.cgz: No such file or directory root@haswell-OptiPlex-9020:/home/lizj# du -sh large.cgz 2.5G large.cgz this patch changes the caller side that use this function to calculate size of initrd file as well. v2: update error message and int64_t printing format Signed-off-by: Li Zhijian <lizhijian@cn.fujitsu.com> Message-Id: <1536833233-14121-1-git-send-email-lizhijian@cn.fujitsu.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-10-01Merge remote-tracking branch 'remotes/kraxel/tags/vga-20180927-pull-request' ↵Peter Maydell1-0/+27
into staging vga: add edid support, qxl bugfixes. # gpg: Signature made Thu 27 Sep 2018 08:12:32 BST # gpg: using RSA key 4CB6D8EED3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138 * remotes/kraxel/tags/vga-20180927-pull-request: qxl: support mono cursors with inverted colors qxl: use guest_monitor_config for local renderer. display/stdvga: add edid support. display/edid: add DEFINE_EDID_PROPERTIES display/edid: add region helper. display/edid: add qemu_edid_size() display/edid: add edid generator to qemu. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-09-27display/edid: add DEFINE_EDID_PROPERTIESGerd Hoffmann1-0/+4
Add a define for edid monitor properties. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 20180925075646.25114-5-kraxel@redhat.com
2018-09-27display/edid: add region helper.Gerd Hoffmann1-0/+4
Create a io region for an EDID data block. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180925075646.25114-4-kraxel@redhat.com
2018-09-27display/edid: add qemu_edid_size()Gerd Hoffmann1-0/+1
Helper function to figure the size of a edid blob, by checking how many extensions are present. Both the base edid blob and the extensions are 128 bytes in size. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 20180925075646.25114-3-kraxel@redhat.com
2018-09-27display/edid: add edid generator to qemu.Gerd Hoffmann1-0/+18
EDID is a metadata format to describe monitors. On physical hardware the monitor has an eeprom with that data block which can be read over i2c bus. On a linux system you can usually find the EDID data block in /sys/class/drm/$card/$connector/edid. xorg ships a edid-decode utility which you can use to turn the blob into readable form. I think it would be a good idea to use EDID for virtual displays too. Needs changes in both qemu and guest kms drivers. This patch is the first step, it adds an generator for EDID blobs to qemu. Comes with a qemu-edid test tool included. With EDID we can pass more information to the guest. Names and serial numbers, so the guests display configuration has no boring "Unknown Monitor". List of video modes. Display resolution, pretty important in case we want add HiDPI support some day. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 20180925075646.25114-2-kraxel@redhat.com
2018-09-25hw/qdev-core: Fix description of instance_initThomas Huth1-2/+3
The part of the documentation of DeviceClass that talks about instance_init is partly wrong: instance_init() functions must not abort or exit, since the function is also called during introspection of the device already. So if a device calls exit() during its instance_init() function, QEMU terminates unexpectedly if somebody tries to just have a look at the interfaces from the device with "device_add xyz,help" or with the "device-list-properties" QOM command. This should never happen. Reviewed-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2018-09-25hw/arm/aspeed: Add an Aspeed machine classCédric Le Goater1-0/+46
The code looks better, it removes duplicated lines and it will ease the introduction of common properties for the Aspeed machines. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180921161939.822-4-clg@kaod.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-09-25aspeed/timer: fix compile breakage with clang 3.4.2Cédric Le Goater1-2/+1
In file included from /home/thuth/devel/qemu/hw/timer/aspeed_timer.c:16: /home/thuth/devel/qemu/include/hw/misc/aspeed_scu.h:37:3: error: redefinition of typedef 'AspeedSCUState' is a C11 feature [-Werror,-Wtypedef-redefinition] } AspeedSCUState; ^ /home/thuth/devel/qemu/include/hw/timer/aspeed_timer.h:27:31: note: previous definition is here typedef struct AspeedSCUState AspeedSCUState; Reported-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180921161939.822-2-clg@kaod.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-09-25hw/intc/arm_gic: Document QEMU interfacePeter Maydell1-0/+43
The GICv2's QEMU interface (sysbus MMIO regions, IRQs, etc) is now quite complicated with the addition of the virtualization extensions. Add a comment in the header file which documents it. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Luc Michel <luc.michel@greensocs.com> Message-id: 20180823103818.31189-1-peter.maydell@linaro.org
2018-09-25arm: Add Nordic Semiconductor nRF51 SoCJoel Stanley1-0/+41
The nRF51 is a Cortex-M0 microcontroller with an on-board radio module, plus other common ARM SoC peripherals. http://infocenter.nordicsemi.com/pdf/nRF51_RM_v3.0.pdf This defines a basic model of the CPU and memory, with no peripherals implemented at this stage. Signed-off-by: Joel Stanley <joel@jms.id.au> Message-id: 20180831220920.27113-3-joel@jms.id.au Reviewed-by: Peter Maydell <peter.maydell@linaro.org> [PMM: wrapped a few long lines] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-09-25Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-3.1-20180925' ↵Peter Maydell4-7/+5
into staging ppc patch queue 2018-09-25 Here are the accumulated ppc target patches for the last several weeks. Highlights are: * A number of 40p / PReP cleanups * Preliminary irq rework on the pseries machine towards the new XIVE interrupt controller There are a few patches which make small changes to generic device and arm code as prerequisites to the 40p interrupt routing cleanup. They have acks from the relevant maintainers. # gpg: Signature made Tue 25 Sep 2018 08:00:06 BST # gpg: using RSA key 6C38CACA20D9B392 # gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" # gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>" # gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>" # gpg: aka "David Gibson (kernel.org) <dwg@kernel.org>" # Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392 * remotes/dgibson/tags/ppc-for-3.1-20180925: 40p: add fixed IRQ routing for LSI SCSI device lsi53c895a: add optional external IRQ via qdev scsi: remove unused lsi53c895a_create() and lsi53c810_create() functions scsi: move lsi53c8xx_create() callers to lsi53c8xx_handle_legacy_cmdline() scsi: add lsi53c8xx_handle_legacy_cmdline() function sm501: Adjust endianness of pixel value in rectangle fill spapr_pci: add an extra 'nr_msis' argument to spapr_populate_pci_dt spapr: increase the size of the IRQ number space spapr: introduce a spapr_irq class 'nr_msis' attribute 40p: use OR gate to wire up raven PCI interrupts raven: some minor IRQ-related tidy-ups hw/ppc: on 40p machine, change default firmware to OpenBIOS target/ppc/cpu-models: Re-group the 970 CPUs together again Record history of ppcemb target in common.json Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-09-25scsi: remove unused lsi53c895a_create() and lsi53c810_create() functionsMark Cave-Ayland1-2/+0
Now that these functions are no longer required they can be removed. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-09-25scsi: add lsi53c8xx_handle_legacy_cmdline() functionMark Cave-Ayland1-0/+1
This is the function that will soon be used to replace lsi53c895a_create() and lsi53c810_create(). Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-09-25spapr_pci: add an extra 'nr_msis' argument to spapr_populate_pci_dtCédric Le Goater1-3/+2
So that we don't have to call qdev_get_machine() to get the machine class and the sPAPRIrq backend holding the number of MSIs. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Greg Kurz <groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-09-25spapr: increase the size of the IRQ number spaceCédric Le Goater1-0/+1
The new layout using static IRQ number does not leave much space to the dynamic MSI range, only 0x100 IRQ numbers. Increase the total number of IRQS for newer machines and introduce a legacy XICS backend for pre-3.1 machines to maintain compatibility. For the old backend, provide a 'nr_msis' value covering the full IRQ number space as it does not use the bitmap allocator to allocate MSI interrupt numbers. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Greg Kurz <groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-09-25spapr: introduce a spapr_irq class 'nr_msis' attributeCédric Le Goater2-2/+1
The number of MSI interrupts a sPAPR machine can allocate is in direct relation with the number of interrupts of the sPAPRIrq backend. Define statically this value at the sPAPRIrq class level and use it for the "ibm,pe-total-#msi" property of the sPAPR PHB. According to the PAPR specs, "ibm,pe-total-#msi" defines the maximum number of MSIs that are available to the PE. We choose to advertise the maximum number of MSIs that are available to the machine for simplicity of the model and to avoid segmenting the MSI interrupt pool which can be easily shared. If the pool limit is reached, it can be extended dynamically. Finally, remove XICS_IRQS_SPAPR which is now unused. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Greg Kurz <groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-09-24Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into stagingPeter Maydell1-5/+13
pci, pc, virtio: fixes, features pci resource capability + misc fixes everywhere. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # gpg: Signature made Fri 07 Sep 2018 22:50:38 BST # gpg: using RSA key 281F0DB8D28D5469 # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * remotes/mst/tags/for_upstream: tests: update acpi expected files vhost: fix invalid downcast pc: make sure that guest isn't able to unplug the first cpu hw/pci: add PCI resource reserve capability to legacy PCI bridge hw/pci: factor PCI reserve resources to a separate structure virtio: update MemoryRegionCaches when guest negotiates features pc: acpi: revert back to 1 SRAT entry for hotpluggable area Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-09-24Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-3.1-20180907' ↵Peter Maydell2-0/+38
into staging ppc patch queue 2018-09-07 Here's another pull request for qemu-3.1. No real theme here, just an assortment of various fixes. Probably the most notable thing is the removal of the ppcemb target which has been deprecated for some time now. # gpg: Signature made Fri 07 Sep 2018 08:30:02 BST # gpg: using RSA key 6C38CACA20D9B392 # gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" # gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>" # gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>" # gpg: aka "David Gibson (kernel.org) <dwg@kernel.org>" # Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392 * remotes/dgibson/tags/ppc-for-3.1-20180907: target-ppc: Extend HWCAP2 bits for ISA 3.0 target/ppc/kvm: set vcpu as online/offline Fix a deadlock case in the CPU hotplug flow spapr: Correct reference count on spapr-cpu-core mac_newworld: implement custom FWPathProvider uninorth: add ofw-addr property to allow correct fw path generation mac_oldworld: implement custom FWPathProvider grackle: set device fw_name and address for correct fw path generation macio: add addr property to macio IDE object macio: add macio bus to help with fw path generation macio: move MACIOIDEState type declarations to macio.h spapr_pci: fix potential NULL pointer dereference spapr: fix leak of rev array ppc: Remove deprecated ppcemb target Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-09-24Merge remote-tracking branch ↵Peter Maydell1-1/+0
'remotes/alistair/tags/pull-riscv-pullreq-20180905' into staging A misc collection of RISC-V related patches for 3.1. # gpg: Signature made Wed 05 Sep 2018 23:06:55 BST # gpg: using RSA key 21E10D29DF977054 # gpg: Good signature from "Alistair Francis <alistair@alistair23.me>" # gpg: WARNING: This key is not certified with sufficiently trusted signatures! # gpg: It is not certain that the signature belongs to the owner. # Primary key fingerprint: F6C4 AC46 D493 4868 D3B8 CE8F 21E1 0D29 DF97 7054 * remotes/alistair/tags/pull-riscv-pullreq-20180905: riscv: remove define cpu_init() hw/riscv/spike: Set the soc device tree node as a simple-bus hw/riscv/virtio: Set the soc device tree node as a simple-bus target/riscv: call gen_goto_tb on DISAS_TOO_MANY target/riscv: optimize indirect branches target/riscv: optimize cross-page direct jumps in softmmu RISC-V: Simplify riscv_cpu_local_irqs_pending RISC-V: Use atomic_cmpxchg to update PLIC bitmaps RISC-V: Improve page table walker spec compliance RISC-V: Update address bits to support sv39 and sv48 Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-09-07hw/pci: factor PCI reserve resources to a separate structureJing Liu1-5/+13
Factor "bus_reserve", "io_reserve", "mem_reserve", "pref32_reserve" and "pref64_reserve" fields of the "GenPCIERootPort" structure out to "PCIResReserve" structure, so that other PCI bridges can reuse it to add resource reserve capability. Signed-off-by: Jing Liu <jing2.liu@linux.intel.com> Reviewed-by: Marcel Apfelbaum<marcel.apfelbaum@gmail.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2018-09-04RISC-V: Use atomic_cmpxchg to update PLIC bitmapsMichael Clark1-1/+0
The PLIC previously used a mutex to protect against concurrent access to the claimed and pending bitfields. Instead of using a mutex, we update the bitfields using atomic_cmpxchg. Rename sifive_plic_num_irqs_pending to sifive_plic_irqs_pending and add an early out if any interrupts are pending as the count of pending interrupts is not used. Cc: Sagar Karandikar <sagark@eecs.berkeley.edu> Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Cc: Palmer Dabbelt <palmer@sifive.com> Cc: Alistair Francis <Alistair.Francis@wdc.com> Signed-off-by: Michael Clark <mjc@sifive.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2018-09-03virtio-gpu: pass down VirtIOGPU pointer to a bunch of functionsGerd Hoffmann1-2/+4
No functional change, just preparation for a followup patch which needs a VirtIOGPU pointer. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-Id: <20180829122101.29852-2-kraxel@redhat.com>
2018-08-30Revert "virtio-gpu: fix crashes upon warm reboot with vga mode"Gerd Hoffmann1-1/+0
This reverts commit 93f874fe9dbe0b997b5a9459840957efd13d7191. Now with virtio-vga being resetted properly the crash workaround is not needed any more. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-id: 20180821111313.27792-3-kraxel@redhat.com
2018-08-30virtio-vga: fix resetGerd Hoffmann1-0/+1
We must call the reset functions for both virtio-gpu and vga to properly reset the combo device. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-id: 20180821111313.27792-2-kraxel@redhat.com
2018-08-30uninorth: add ofw-addr property to allow correct fw path generationMark Cave-Ayland1-0/+1
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-08-30macio: add addr property to macio IDE objectMark Cave-Ayland1-0/+1
This contains the offset of the IDE controller within the macio address space and is required to allow the address to be included within the fw path. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-08-30macio: add macio bus to help with fw path generationMark Cave-Ayland1-0/+10
As the in-built IDE controller is attached to the macio bus then we should also model this the same in QEMU to aid fw path generation. Note that all existing macio devices are moved onto the new macio bus so that the qdev tree accurately reflects the real hardware. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-08-30macio: move MACIOIDEState type declarations to macio.hMark Cave-Ayland1-0/+26
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-08-24elf: On elf loading, treat both EM_MIPS and EM_NANOMIPS as legal for MIPSAleksandar Rikalo1-0/+8
Modify load_elf32()/load_elf64() to treat EM_NANOMIPS as legal as EM_MIPS is. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Stefan Markovic <smarkovic@wavecomp.com>
2018-08-24Merge remote-tracking branch 'remotes/juanquintela/tags/check/20180822' into ↵Peter Maydell1-1/+10
staging check/next for 20180822 # gpg: Signature made Wed 22 Aug 2018 09:03:40 BST # gpg: using RSA key F487EF185872D723 # gpg: Good signature from "Juan Quintela <quintela@redhat.com>" # gpg: aka "Juan Quintela <quintela@trasno.org>" # Primary key fingerprint: 1899 FF8E DEBF 58CC EE03 4B82 F487 EF18 5872 D723 * remotes/juanquintela/tags/check/20180822: check: Only test tpm devices when they are compiled in check: Only test usb-ehci when it is compiled in check: Only test usb-uhci devices when they are compiled in check: Only test usb-ohci when it is compiled in check: Only test nvme when it is compiled in check: Only test pvpanic when it is compiled in check: Only test wdt_ib700 when it is compiled in check: Only test sdhci when it is compiled in check: Only test i82801b11 when it is compiled in check: Only test ioh3420 when it is compiled in check: Only test ipack when it is compiled in check: Only test hda when it is compiled in check: Only test ac97 when it is compiled in check: Only test es1370 when it is compiled in check: Only test rtl8139 when it is compiled in check: Only test pcnet when it is compiled in check: Only test eepro100 when it is compiled in check: Only test ne2000 when it is compiled in check: Only test vmxnet3 when it is compiled in Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
generated by cgit v1.1 at 2025-02-14 14:08:51 +0000