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Age	Commit message (Collapse)	Author	Files	Lines
2019-02-01	hw/misc/armsse-cpuid: Implement SSE-200 CPU_IDENTITY register block	Peter Maydell	1	-0/+41
	The SSE-200 has a CPU_IDENTITY register block, which is a set of read-only registers. As well as the usual PID/CID registers, there is a single CPUID register which indicates whether the CPU is CPU 0 or CPU 1. Implement a model of this register block. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20190121185118.18550-20-peter.maydell@linaro.org