aboutsummaryrefslogtreecommitdiff
path: root/include/hw/cxl
AgeCommit message (Expand)AuthorFilesLines
2023-05-19hw/cxl: Introduce cxl_device_get_timestamp() utility functionIra Weiny1-0/+2
2023-05-19hw/cxl: Multi-Region CXL Type-3 Devices (Volatile and Persistent)Gregory Price1-3/+8
2023-04-24hw/pci-bridge: Make PCIe and CXL PXB Devices inherit from TYPE_PXB_DEVJonathan Cameron1-2/+2
2023-03-07hw/pxb-cxl: Support passthrough HDM Decoders unless overriddenJonathan Cameron2-0/+2
2023-03-07hw/mem/cxl_type3: Add CXL RAS Error Injection Support.Jonathan Cameron2-0/+37
2023-03-02hw/cxl/mailbox: Use new UUID network order define for cel_uuidIra Weiny1-1/+1
2023-02-08hw/cxl: Clean up includesMarkus Armbruster3-4/+0
2023-01-08include/hw/cxl: Break inclusion loop cxl_pci.h and cxl_cdat_hMarkus Armbruster1-1/+0
2023-01-08include/hw/pci: Split pci_device.h off pci.hMarkus Armbruster1-1/+1
2023-01-08include/hw/cxl: Include hw/cxl/*.h where neededMarkus Armbruster2-0/+2
2023-01-08include/hw/cxl: Move typedef PXBDev to cxl.h, and put it to useMarkus Armbruster1-1/+3
2023-01-08include/hw/pci: Break inclusion loop pci_bridge.h and cxl.hMarkus Armbruster4-3/+2
2022-11-07hw/pci-bridge/cxl-upstream: Add a CDAT table access DOEJonathan Cameron1-0/+1
2022-11-07hw/cxl/cdat: CXL CDAT Data Object Exchange implementationHuai-Cheng Kuo4-0/+176
2022-10-09mem/cxl-type3: Add sn option to provide serial number for PCI ecapJonathan Cameron1-0/+1
2022-07-26hw/cxl: Fix size of constant in interleave granularity function.Jonathan Cameron1-1/+1
2022-06-16pci-bridge/cxl_upstream: Add a CXL switch upstream portJonathan Cameron1-0/+5
2022-06-09pci/pci_expander_bridge: For CXL HB delay the HB register memory region setup.Jonathan Cameron1-0/+1
2022-06-09hw/cxl: Push linking of CXL targets into i386/pc rather than in machine.cJonathan Cameron2-2/+1
2022-06-09hw/cxl: Make the CXL fixed memory window setup a machine parameter.Jonathan Cameron2-5/+23
2022-05-13cxl/cxl-host: Add memops for CFMWS region.Jonathan Cameron1-0/+2
2022-05-13mem/cxl_type3: Add read and write functions for associated hostmem.Jonathan Cameron1-0/+6
2022-05-13CXL/cxl_component: Add cxl_get_hb_cstate()Jonathan Cameron1-0/+2
2022-05-13hw/cxl/host: Add support for CXL Fixed Memory Windows.Jonathan Cameron1-0/+21
2022-05-13hw/cxl/component: Add utils for interleave parameter encoding/decodingJonathan Cameron1-0/+8
2022-05-13hw/cxl/component: Implement host bridge MMIO (8.2.5, table 142)Ben Widawsky1-0/+14
2022-05-13hw/cxl/device: Implement get/set Label Storage Area (LSA)Ben Widawsky1-0/+5
2022-05-13hw/cxl/device: Plumb real Label Storage Area (LSA) sizingBen Widawsky1-1/+10
2022-05-13hw/cxl/device: Add a memory device (8.2.8.5)Ben Widawsky2-0/+36
2022-05-13cxl: Machine level control on whether CXL support is enabledJonathan Cameron1-0/+4
2022-05-13hw/cxl/device: Timestamp implementation (8.2.9.3)Ben Widawsky1-0/+6
2022-05-13hw/cxl/device: Add memory device utilitiesBen Widawsky1-3/+18
2022-05-13hw/cxl/device: Implement basic mailbox (8.2.8.4)Ben Widawsky2-1/+21
2022-05-13hw/cxl/device: Implement the CAP array (8.2.8.1-2)Ben Widawsky1-1/+30
2022-05-13hw/cxl/device: Introduce a CXL device (8.2.8)Ben Widawsky2-0/+167
2022-05-13hw/cxl/component: Introduce CXL components (8.1.x, 8.2.5)Ben Widawsky3-0/+375
generated by cgit v1.1 at 2024-09-04 14:23:11 +0000