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AgeCommit message (Expand)AuthorFilesLines
2021-06-03arm: Consistently use "Cortex-Axx", not "Cortex Axx"Peter Maydell1-1/+1
2021-06-03target/arm: Allow board models to specify initial NS VTORPeter Maydell1-0/+2
2021-05-25hw/arm: Model TCMs in the SSE-300, not the AN547Peter Maydell1-0/+2
2021-05-01aspeed: Integrate HACEJoel Stanley1-0/+3
2021-03-19hw: Replace anti-social QOM type namesMarkus Armbruster7-7/+7
2021-03-12hw/arm: Connect PWM fans in NPCM7XX boardsHao Wu1-1/+10
2021-03-12hw/arm: Add MFT device to NPCM7xx SocHao Wu1-0/+2
2021-03-12hw/arm: versal: Add support for the XRAMsEdgar E. Iglesias1-0/+13
2021-03-11Merge remote-tracking branch 'remotes/stsquad/tags/pull-testing-docs-xen-upda...Peter Maydell1-1/+0
2021-03-11Merge remote-tracking branch 'remotes/legoater/tags/pull-aspeed-20210309' int...Peter Maydell1-0/+3
2021-03-10hw/board: promote fdt from ARM VirtMachineState to MachineStateAlex Bennée1-1/+0
2021-03-10hw/arm: xlnx-zynqmp: Connect a Xilinx CSU DMA module for QSPIXuzhou Cheng1-0/+2
2021-03-10hw/arm: xlnx-zynqmp: Clean up coding convention issuesXuzhou Cheng1-1/+2
2021-03-09hw/misc: Model KCS devices in the Aspeed LPC controllerAndrew Jeffery1-0/+1
2021-03-09hw/misc: Add a basic Aspeed LPC controller modelCédric Le Goater1-0/+2
2021-03-08hw/arm/armsse: Add SSE-300 supportPeter Maydell1-0/+1
2021-03-08hw/arm/armsse: Support variants with ARMSSE_CPU_PWRCTRL blockPeter Maydell1-0/+3
2021-03-08hw/arm/armsse: Add support for TYPE_SSE_TIMER in ARMSSEDeviceInfoPeter Maydell1-0/+2
2021-03-08hw/arm/armsse: Add support for SSE variants with a system counterPeter Maydell1-0/+3
2021-03-08hw/arm/armsse: Add missing SSE-200 SYS_PPUPeter Maydell1-1/+1
2021-03-08hw/arm/armsse: Move PPUs into data-driven frameworkPeter Maydell1-9/+1
2021-03-08hw/arm/armsse: Move s32ktimer into data-driven frameworkPeter Maydell1-2/+1
2021-03-08hw/arm/armsse: Move watchdogs into data-driven frameworkPeter Maydell1-3/+1
2021-03-08hw/arm/armsse: Add framework for data-driven device placementPeter Maydell1-2/+1
2021-03-08hw/arm/armsse: Add a define for number of IRQs used by the SSE itselfPeter Maydell1-1/+4
2021-03-08hw/arm/armsse: Use an array for apb_ppc fields in the state structurePeter Maydell1-3/+3
2021-03-08hw/arm/armsse: Introduce SSE subsystem version propertyPeter Maydell1-0/+42
2021-03-08hw/arm/mps2: Update old infocenter.arm.com URLsPeter Maydell1-2/+2
2021-03-05hw/arm/xlnx-zynqmp: Remove obsolete 'has_rpu' propertyPhilippe Mathieu-Daudé1-2/+0
2021-03-05hw/arm: Add npcm7xx emc modelDoug Evans1-0/+2
2021-02-16hw/i2c: Implement NPCM7XX SMBus Module Single ModeHao Wu1-0/+2
2021-02-05acpi: Permit OEM ID and OEM table ID fields to be changedMarian Postevca1-0/+2
2021-01-29arm: Remove frq properties on CMSDK timer, dualtimer, watchdog, ARMSSEPeter Maydell1-2/+0
2021-01-29hw/arm/armsse: Wire up clocksPeter Maydell1-0/+6
2021-01-29hw/arm/armsse: Rename "MAINCLK" property to "MAINCLK_FRQ"Peter Maydell1-1/+1
2021-01-29hw/timer/cmsdk-apb-timer: Rename CMSDKAPBTIMER struct to CMSDKAPBTimerPeter Maydell1-3/+3
2021-01-29arm-virt: add secure pl061 for reset/power downMaxim Uvarov1-0/+2
2021-01-12hw/misc: Add a PWM module for NPCM7XXHao Wu1-0/+2
2021-01-12hw/adc: Add an ADC module for NPCM7XXHao Wu1-0/+2
2021-01-08hw/arm/virt: Remove virt machine state 'smp_cpus'Andrew Jones1-2/+1
2020-12-15arm: xlnx-versal: Connect usb to virt-versalVikram Garhwal1-0/+9
2020-12-10xlnx-zynqmp: Connect Xilinx ZynqMP CAN controllersVikram Garhwal1-0/+8
2020-12-08hw/arm/virt: Write extra pci roots into fw_cfgJiahui Cen1-0/+1
2020-10-27hw/arm/raspi: add a skeleton implementation of the CPRMANLuc Michel1-1/+2
2020-10-27hw/arm/raspi: fix CPRMAN base addressLuc Michel2-4/+3
2020-10-27hw/arm/bcm2836: Introduce the BCM2835 SoCPhilippe Mathieu-Daudé1-0/+1
2020-10-27hw/arm/bcm2836: Restrict BCM283XInfo declaration to C sourcePhilippe Mathieu-Daudé1-8/+0
2020-10-27hw/gpio: Add GPIO model for Nuvoton NPCM7xxHavard Skinnemoen1-0/+2
2020-10-27hw/arm/npcm7xx: Add EHCI and OHCI controllersHavard Skinnemoen1-0/+4
2020-10-27hw/misc: Add npcm7xx random number generatorHavard Skinnemoen1-0/+2