Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2015-08-25 | xlnx-zynqmp: Connect the four OCM banks | Alistair Francis | 1 | -0/+6 |
2015-06-19 | arm: xlnx-zynqmp: Add 2xCortexR5 CPUs | Peter Crosthwaite | 1 | -0/+2 |
2015-06-19 | arm: xlnx-zynqmp: Add boot-cpu property | Peter Crosthwaite | 1 | -0/+3 |
2015-06-19 | arm: xlnx-zynqmp: Preface CPU variables with "apu" | Peter Crosthwaite | 1 | -2/+2 |
2015-05-18 | arm: xlnx-zynqmp: Add UART support | Peter Crosthwaite | 1 | -0/+3 |
2015-05-18 | arm: xlnx-zynqmp: Add GEM support | Peter Crosthwaite | 1 | -0/+3 |
2015-05-18 | arm: xlnx-zynqmp: Add GIC | Peter Crosthwaite | 1 | -0/+14 |
2015-05-18 | arm: Introduce Xilinx ZynqMP SoC | Peter Crosthwaite | 1 | -0/+38 |