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2015-02-16exec: RCUify AddressSpaceDispatchPaolo Bonzini1-0/+1
Note that even after this patch, most callers of address_space_* functions must still be under the big QEMU lock, otherwise the memory region returned by address_space_translate can disappear as soon as address_space_translate returns. This will be fixed in the next part of this series. Reviewed-by: Fam Zheng <famz@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-02-16exec: make iotlb RCU-friendlyPaolo Bonzini2-2/+3
After the previous patch, TLBs will be flushed on every change to the memory mapping. This patch augments that with synchronization of the MemoryRegionSections referred to in the iotlb array. With this change, it is guaranteed that iotlb_to_region will access the correct memory map, even once the TLB will be accessed outside the BQL. Reviewed-by: Fam Zheng <famz@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-02-16exec: introduce cpu_reload_memory_mapPaolo Bonzini1-0/+1
This for now is a simple TLB flush. This can change later for two reasons: 1) an AddressSpaceDispatch will be cached in the CPUState object 2) it will not be possible to do tlb_flush once the TCG-generated code runs outside the BQL. Reviewed-by: Fam Zheng <famz@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-02-10memory: unregister AddressSpace MemoryListener within BQLPaolo Bonzini1-0/+1
address_space_destroy_dispatch is called from an RCU callback and hence outside the iothread mutex (BQL). However, after address_space_destroy no new accesses can hit the destroyed AddressSpace so it is not necessary to observe changes to the memory map. Move the memory_listener_unregister call earlier, to make it thread-safe again. Reported-by: Alex Williamson <alex.williamson@redhat.com> Fixes: 374f2981d1f10bc4307f250f24b2a7ddb9b14be0 Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
2015-02-05cpu_ldst.h: Allow NB_MMU_MODES to be 7Peter Maydell1-3/+25
Support guest CPUs which need 7 MMU index values. Add a comment about what would be required to raise the limit further (trivial for 8, TCG backend rework for 9 or more). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Greg Bellows <greg.bellows@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
2015-02-02memory: protect current_map by RCUPaolo Bonzini1-0/+5
Replace the flat_view_mutex with RCU, avoiding futex contention for dataplane on large systems and many iothreads. Reviewed-by: Fam Zheng <famz@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-01-20cpu_ldst.h: Don't define helpers if MMU_MODE*_SUFFIX not definedPeter Maydell1-4/+8
Not all targets define a full set of suffix strings for the NB_MMU_MODES that they have. In this situation, don't define any helper functions for that mode, rather than defining helper functions with no suffix at all. The MMU mode is still functional; it is merely not directly accessible via cpu_ld*_MODE from target helper functions. Also add an "NB_MMU_MODES >= 2" check to the definition of the mode 1 helpers -- some targets only define one MMU mode. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Message-id: 1421432008-6786-1-git-send-email-peter.maydell@linaro.org
2015-01-20cpu_ldst.h, cpu-all.h, bswap.h: Update documentation on ld/st accessorsPeter Maydell2-37/+22
Add documentation of what the cpu_*_* accessors look like. Correct some minor errors in the existing documentation of the direct _p accessor family. Remove the near-duplicate comment on the _p accessors from cpu-all.h and replace it with a reference to the comment in bswap.h. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 1421334118-3287-16-git-send-email-peter.maydell@linaro.org
2015-01-20cpu_ldst_template.h: Drop unused cpu_ldfq/stfq/ldfl/stfl accessorsPeter Maydell1-53/+1
The cpu_ldfq/stfq/ldfl/stfl accessors for loading and storing float32 and float64 are completely unused, so delete them. (The union they use for converting from the float32/float64 type to uint32_t or uint64_t is the wrong way to do it anyway: they should be using make_float* and float*_val.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 1421334118-3287-15-git-send-email-peter.maydell@linaro.org
2015-01-20cpu_ldst.h: Drop unused _raw macros, saddr() and laddr()Peter Maydell1-23/+0
The _raw macros and their helpers saddr() and laddr() are now totally unused -- delete them. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 1421334118-3287-14-git-send-email-peter.maydell@linaro.org
2015-01-20cpu_ldst_template.h: Use ld*_p directly rather than via ld*_raw macrosPeter Maydell1-3/+3
The ld*_raw and st*_raw macros are now only used within the code produced by cpu_ldst_template.h, and only in three places. Expand these out to just call the ld_p and st_p functions directly. Note that in all the callsites the address argument is a uintptr_t, so we can drop that part of the double-cast used in the saddr() and laddr() macros. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 1421334118-3287-13-git-send-email-peter.maydell@linaro.org
2015-01-20cpu_ldst.h: Use inline functions for usermode cpu_ld/st accessorsPeter Maydell2-39/+112
Use inline functions rather than macros for cpu_ld/st accessors for the *-user configurations, as we already do for softmmu. This has a two advantages: * we can actually typecheck our arguments * we don't need to leak the _raw macros everywhere Since the _kernel functions were only used by target-i386/seg_helper.c, put the definitions for them in that file too. (It already has the similar template include code to define them for the softmmu case, so it makes sense to have it deal with defining them for user-only.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 1421334118-3287-12-git-send-email-peter.maydell@linaro.org
2015-01-20cpu_ldst.h: Remove unused very short ld*/st* definesPeter Maydell1-26/+0
The very short ld*/st* defines are now not used anywhere; delete them. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 1421334118-3287-11-git-send-email-peter.maydell@linaro.org
2015-01-20cpu_ldst.h: Drop unused ld/st*_kernel definesPeter Maydell1-15/+0
The ld*_kernel and st*_kernel defines are not used anywhere; delete them. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 1421334118-3287-10-git-send-email-peter.maydell@linaro.org
2015-01-20cpu_ldst.h: Remove unused ldul_ macrosPeter Maydell1-9/+0
The five ldul_ macros are not used anywhere and are marked up with an XXX comment. "ldul" is a non-standard prefix for our family of load instructions: we don't mark 32-bit accesses for signedness because they return a 32 bit quantity. So just delete them. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Message-id: 1421334118-3287-2-git-send-email-peter.maydell@linaro.org
2015-01-10Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into stagingPeter Maydell3-7/+61
pc: resizeable ROM blocks This makes ROM blocks resizeable. This infrastructure is required for other functionality we have queued. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # gpg: Signature made Thu 08 Jan 2015 11:19:24 GMT using RSA key ID D28D5469 # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" * remotes/mst/tags/for_upstream: acpi-build: make ROMs RAM blocks resizeable memory: API to allocate resizeable RAM MR arch_init: support resizing on incoming migration exec: qemu_ram_alloc_resizeable, qemu_ram_resize exec: split length -> used_length/max_length exec: cpu_physical_memory_set/clear_dirty_range memory: add memory_region_set_size Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-01-08memory: API to allocate resizeable RAM MRMichael S. Tsirkin1-0/+24
Add API to allocate resizeable RAM MR. This looks just like regular RAM generally, but has a special property that only a portion of it (used_length) is actually used, and migrated. This used_length size can change across reboots. Follow up patches will change used_length for such blocks at migration, making it easier to extend devices using such RAM (notably ACPI, but in the future thinkably other ROMs) without breaking migration compatibility or wasting ROM (guest) memory. Device is notified on resize, so it can adjust if necessary. Note: nothing prevents making all RAM resizeable in this way. However, reviewers felt that only enabling this selectively will make some class of errors easier to detect. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
2015-01-08exec: qemu_ram_alloc_resizeable, qemu_ram_resizeMichael S. Tsirkin2-3/+13
Add API to allocate "resizeable" RAM. This looks just like regular RAM generally, but has a special property that only a portion of it (used_length) is actually used, and migrated. This used_length size can change across reboots. Follow up patches will change used_length for such blocks at migration, making it easier to extend devices using such RAM (notably ACPI, but in the future thinkably other ROMs) without breaking migration compatibility or wasting ROM (guest) memory. Device is notified on resize, so it can adjust if necessary. qemu_ram_alloc_resizeable allocates this memory, qemu_ram_resize resizes it. Note: nothing prevents making all RAM resizeable in this way. However, reviewers felt that only enabling this selectively will make some class of errors easier to detect. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
2015-01-08exec: split length -> used_length/max_lengthMichael S. Tsirkin1-1/+2
This patch allows us to distinguish between two length values for each block: max_length - length of memory block that was allocated used_length - length of block used by QEMU/guest Currently, we set used_length - max_length, unconditionally. Follow-up patches allow used_length <= max_length. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
2015-01-08exec: cpu_physical_memory_set/clear_dirty_rangeMichael S. Tsirkin1-3/+12
Make cpu_physical_memory_set/clear_dirty_range behave symmetrically. To clear range for a given client type only, add cpu_physical_memory_clear_dirty_range_type. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
2015-01-08memory: add memory_region_set_sizeMichael S. Tsirkin1-0/+10
Add API to change MR size. Will be used internally for RAM resize. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
2015-01-03gen-icount: check cflags instead of use_icount globalPaolo Bonzini1-3/+3
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Pavel Dovgalyuk <pavel.dovgaluk@ispras.ru> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-12-23cpu-exec: add a new CF_USE_ICOUNT cflagPaolo Bonzini1-2/+3
Signed-off-by: Pavel Dovgalyuk <pavel.dovgaluk@ispras.ru> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-12-17tcg: add separate monitor command to dump opcode countersMax Filippov1-0/+1
Currently 'info jit' outputs half of the information to monitor and the rest to qemu log. Dumping opcode counts to monitor as a part of 'info jit' command doesn't sound useful. Add new monitor command 'info opcount' that only dumps opcode counters. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
2014-12-16Merge remote-tracking branch 'remotes/amit-migration/tags/for-2.3-2' into ↵Peter Maydell1-0/+7
staging Migration pull for 2.3. Mostly moving the code to the migration/ directory, and updating MAINTAINERS. I've also folded my other MAINTAINERS update patches into this, as they're small by themselves. # gpg: Signature made Tue 16 Dec 2014 12:21:24 GMT using RSA key ID 854083B6 # gpg: Good signature from "Amit Shah <amit@amitshah.net>" # gpg: aka "Amit Shah <amit@kernel.org>" # gpg: aka "Amit Shah <amitshah@gmx.net>" * remotes/amit-migration/tags/for-2.3-2: MAINTAINERS: Update for migrated migration code Split the QEMU buffered file code out Split struct QEMUFile out Remove migration- pre/post fixes off files in migration/ dir Start migrating migration code into a migration directory qmp-command.hx: add missing docs for migration capabilites cpu: verify that block->host is set cpu: assert host pointer offset within block exec: add wrapper for host pointer access MAINTAINERS: add include files to virtio-serial entry MAINTAINERS: add entry for virtio-rng MAINTAINERS: migration: add vmstate static checker files MAINTAINERS: Add myself to migration maintainers Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-12-16cpu: verify that block->host is setMichael S. Tsirkin1-0/+1
If it isn't, access at an offset will cause memory corruption. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Reviewed-by: Amos Kong <akong@redhat.com> Signed-off-by: Amit Shah <amit.shah@redhat.com>
2014-12-16cpu: assert host pointer offset within blockMichael S. Tsirkin1-0/+1
Make accesses safer in case we missed some check somewhere. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Reviewed-by: Amos Kong <akong@redhat.com> Signed-off-by: Amit Shah <amit.shah@redhat.com>
2014-12-16exec: add wrapper for host pointer accessMichael S. Tsirkin1-0/+5
host pointer accesses force pointer math, let's add a wrapper to make them safer. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Reviewed-by: Amos Kong <akong@redhat.com> Signed-off-by: Amit Shah <amit.shah@redhat.com>
2014-12-15Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell1-0/+1
- Migration and linuxboot fixes for 2.2 regressions - valgrind/KVM support - small i386 patches - PCI SD host controller support - malloc/free cleanups from Markus (x86/scsi) - IvyBridge model - XSAVES support for KVM - initial patches from record/replay # gpg: Signature made Mon 15 Dec 2014 16:35:08 GMT using RSA key ID 78C7AE83 # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" # gpg: WARNING: This key is not certified with sufficiently trusted signatures! # gpg: It is not certain that the signature belongs to the owner. # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini/tags/for-upstream: (47 commits) sdhci: Support SDHCI devices on PCI sdhci: Define SDHCI PCI ids sdhci: Add "sysbus" to sdhci QOM types and methods sdhci: Remove class "virtual" methods sdhci: Set a default frequency clock serial: only resample THR interrupt on rising edge of IER.THRI serial: update LSR on enabling/disabling FIFOs serial: clean up THRE/TEMT handling serial: reset thri_pending on IER writes with THRI=0 linuxboot: fix loading old kernels kvm/apic: fix 2.2->2.1 migration target-i386: add Ivy Bridge CPU model target-i386: add f16c and rdrand to Haswell and Broadwell target-i386: add VME to all CPUs pc: add 2.3 machine types i386: do not cross the pages boundaries in replay mode cpus: make icount warp behave well with respect to stop/cont timer: introduce new QEMU_CLOCK_VIRTUAL_RT clock cpu-exec: invalidate nocache translation if they are interrupted icount: introduce cpu_get_icount_raw ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-12-15cpu-exec: invalidate nocache translation if they are interruptedPavel Dovgalyuk1-0/+1
In this case, QEMU might longjmp out of cpu-exec.c and miss the final cleanup in cpu_exec_nocache. Do this manually through a new compile flag. Signed-off-by: Pavel Dovgalyuk <Pavel.Dovgaluk@ispras.ru> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-12-11Add the "-semihosting-config" option.Liviu Ionescu1-0/+6
The usual semihosting behaviour is to process the system calls locally and return; unfortuantelly the initial implementation dinamically changed the target to GDB during debug sessions, which, for the usual arm-none-eabi-gdb, is not implemented. The result was that during debug sessions the semihosting calls were discarded. This patch adds a configuration variable and an option to set it on the command line: -semihosting-config [enable=on|off,]target=native|gdb|auto This option enables semihosting and defines where the semihosting calls will be addressed, to QEMU ('native') or to GDB ('gdb'). The default is auto, which means 'gdb' during debug sessions and 'native' otherwise. Signed-off-by: Liviu Ionescu <ilg@livius.net> Message-id: 1416341957-9796-1-git-send-email-ilg@livius.net [PMM: moved declaration and definition of semihosting_target to gdbstub.h and gdbstub.c to fix build failure on linux-user] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-11-23memory: expose alignment used for allocating RAM as MemoryRegion APIIgor Mammedov2-1/+3
introduce memory_region_get_alignment() that returns underlying memory block alignment or 0 if it's not relevant/implemented for backend. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2014-11-18exec: Handle multipage ranges in invalidate_and_set_dirty()Peter Maydell1-0/+25
The code in invalidate_and_set_dirty() needs to handle addr/length combinations which cross guest physical page boundaries. This can happen, for example, when disk I/O reads large blocks into guest RAM which previously held code that we have cached translations for. Unfortunately we were only checking the clean/dirty status of the first page in the range, and then were calling a tb_invalidate function which only handles ranges that don't cross page boundaries. Fix the function to deal with multipage ranges. The symptoms of this bug were that guest code would misbehave (eg segfault), in particular after a guest reboot but potentially any time the guest reused a page of its physical RAM for new code. Cc: qemu-stable@nongnu.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-id: 1416167061-13203-1-git-send-email-peter.maydell@linaro.org
2014-11-04Merge remote-tracking branch 'remotes/lalrae/tags/mips-20141103' into stagingPeter Maydell1-0/+6
* remotes/lalrae/tags/mips-20141103: (34 commits) target-mips: add MSA support to mips32r5-generic disas/mips.c: disassemble MSA instructions target-mips: add MSA MI10 format instructions target-mips: add MSA 2RF format instructions target-mips: add MSA VEC/2R format instructions target-mips: add MSA 3RF format instructions target-mips: add MSA ELM format instructions target-mips: add MSA 3R format instructions target-mips: add MSA BIT format instructions target-mips: add MSA I5 format instruction target-mips: add MSA I8 format instructions target-mips: add MSA branch instructions target-mips: add msa_helper.c target-mips: add msa_reset(), global msa register target-mips: add MSA opcode enum target-mips: stop translation after ctc1 target-mips: remove duplicated mips/ieee mapping function target-mips: add MSA exceptions target-mips: add MSA defines and data structure target-mips: enable features in MIPS64R6-generic CPU ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-11-03softmmu: provide softmmu access type enumLeon Alrae1-0/+6
New MIPS features depend on the access type and enum is more convenient than using the numbers directly. Signed-off-by: Leon Alrae <leon.alrae@imgtec.com> Reviewed-by: Thomas Huth <thuth@linux.vnet.ibm.com>
2014-10-31Add skip_dump flag to ignore memory region during dumpNikunj A Dadhania1-0/+19
The PCI MMIO might be disabled or the device in the reset state. Make sure we do not dump these memory regions. Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> Acked-by: Alex Williamson <alex.williamson@redhat.com> CC: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-10-06translate-all.c: memory walker initial address miscalculationMikhail Ilyin1-2/+2
The initial base address is miscalculated in walk_memory_regions(). It has to be shifted TARGET_PAGE_BITS more. Holder variables are extended to target_ulong size otherwise they don't fit for MIPS N32 (a 32-bit ABI with a 64-bit address space) and qemu won't compile. The issue led to incorrect debug output of memory maps and a mis-formed coredumped file. Signed-off-by: Mikhail Ilyin <m.ilin@samsung.com> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
2014-09-12Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell2-4/+8
- Memory: improve error reporting and avoid crashes on hotplug - Build: fixing block/iscsi.so and ranlib warnings on Mac OS X - Migration fixes for x86 - The odd KVM patch. # gpg: Signature made Thu 11 Sep 2014 11:21:10 BST using RSA key ID 9B4D86F2 # gpg: Good signature from "Paolo Bonzini <pbonzini@redhat.com>" # gpg: aka "Paolo Bonzini <bonzini@gnu.org>" * remotes/bonzini/tags/for-upstream: (21 commits) gdbstub: init mon_chr through qemu_chr_alloc pckbd: adding new fields to vmstate mc146818rtc: add missed field to vmstate piix: do not set irq while loading vmstate serial: fixing vmstate for save/restore parallel: adding vmstate for save/restore fdc: adding vmstate for save/restore cpu: init vmstate for ticks and clock offset apic_common: vapic_paddr synchronization fix vl: use QLIST_FOREACH_SAFE to visit change state handlers exec: add parameter errp to gethugepagesize exec: report error when memory < hpagesize hostmem-ram: don't exit qemu if size of memory-backend-ram is way too big memory: add parameter errp to memory_region_init_rom_device memory: add parameter errp to memory_region_init_ram exec: add parameter errp to qemu_ram_alloc and qemu_ram_alloc_from_ptr rules.mak: Fix DSO build by pulling in archive symbols util: Don't link host-utils.o if it's empty util: Move general qemu_getauxval to util/getauxval.c trace: Only link generated-tracers.o with "simple" backend ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-09-12cpu-exec: Make debug_excp_handler a QOM CPU methodPeter Maydell1-4/+0
Make the debug_excp_handler target specific hook into a QOM CPU method. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-09-09memory: add parameter errp to memory_region_init_rom_deviceHu Tao1-1/+3
Add parameter errp to memory_region_init_rom_device and update all call sites to propagate the error. Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Hu Tao <hutao@cn.fujitsu.com> [Propagate the error out of realize. - Paolo] Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-09-09memory: add parameter errp to memory_region_init_ramHu Tao1-1/+3
Add parameter errp to memory_region_init_ram and update all call sites to pass in &error_abort. Signed-off-by: Hu Tao <hutao@cn.fujitsu.com> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-09-09exec: add parameter errp to qemu_ram_alloc and qemu_ram_alloc_from_ptrHu Tao1-2/+2
Add parameter errp to qemu_ram_alloc and qemu_ram_alloc_from_ptr so that we can handle errors. Signed-off-by: Hu Tao <hutao@cn.fujitsu.com> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> [Assert ptr != NULL in memory_region_init_ram_ptr. - Paolo] Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-09-02Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into stagingPeter Maydell1-1/+1
pci, pc fixes, features A bunch of bugfixes - these will make sense for 2.1.1 Initial Intel IOMMU support. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # gpg: Signature made Tue 02 Sep 2014 16:05:04 BST using RSA key ID D28D5469 # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" * remotes/mst/tags/for_upstream: vhost_net: start/stop guest notifiers properly pci: avoid losing config updates to MSI/MSIX cap regs virtio-net: don't run bh on vm stopped ioh3420: remove unused ioh3420_init() declaration vhost_net: cleanup start/stop condition intel-iommu: add IOTLB using hash table intel-iommu: add context-cache to cache context-entry intel-iommu: add supports for queued invalidation interface intel-iommu: fix coding style issues around in q35.c and machine.c intel-iommu: add Intel IOMMU emulation to q35 and add a machine option "iommu" as a switch intel-iommu: add DMAR table to ACPI tables intel-iommu: introduce Intel IOMMU (VT-d) emulation iommu: add is_write as a parameter to the translate function of MemoryRegionIOMMUOps Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-09-01implementing victim TLB for QEMU system emulated TLBXin Tong1-2/+7
QEMU system mode page table walks are expensive. Taken by running QEMU qemu-system-x86_64 system mode on Intel PIN , a TLB miss and walking a 4-level page tables in guest Linux OS takes ~450 X86 instructions on average. QEMU system mode TLB is implemented using a directly-mapped hashtable. This structure suffers from conflict misses. Increasing the associativity of the TLB may not be the solution to conflict misses as all the ways may have to be walked in serial. A victim TLB is a TLB used to hold translations evicted from the primary TLB upon replacement. The victim TLB lies between the main TLB and its refill path. Victim TLB is of greater associativity (fully associative in this patch). It takes longer to lookup the victim TLB, but its likely better than a full page table walk. The memory translation path is changed as follows : Before Victim TLB: 1. Inline TLB lookup 2. Exit code cache on TLB miss. 3. Check for unaligned, IO accesses 4. TLB refill. 5. Do the memory access. 6. Return to code cache. After Victim TLB: 1. Inline TLB lookup 2. Exit code cache on TLB miss. 3. Check for unaligned, IO accesses 4. Victim TLB lookup. 5. If victim TLB misses, TLB refill 6. Do the memory access. 7. Return to code cache The advantage is that victim TLB can offer more associativity to a directly mapped TLB and thus potentially fewer page table walks while still keeping the time taken to flush within reasonable limits. However, placing a victim TLB before the refill path increase TLB refill path as the victim TLB is consulted before the TLB refill. The performance results demonstrate that the pros outweigh the cons. some performance results taken on SPECINT2006 train datasets and kernel boot and qemu configure script on an Intel(R) Xeon(R) CPU E5620 @ 2.40GHz Linux machine are shown in the Google Doc link below. https://docs.google.com/spreadsheets/d/1eiItzekZwNQOal_h-5iJmC4tMDi051m9qidi5_nwvH4/edit?usp=sharing In summary, victim TLB improves the performance of qemu-system-x86_64 by 11% on average on SPECINT2006, kernelboot and qemu configscript and with highest improvement of in 26% in 456.hmmer. And victim TLB does not result in any performance degradation in any of the measured benchmarks. Furthermore, the implemented victim TLB is architecture independent and is expected to benefit other architectures in QEMU as well. Although there are measurement fluctuations, the performance improvement is very significant and by no means in the range of noises. Signed-off-by: Xin Tong <trent.tong@gmail.com> Message-id: 1407202523-23553-1-git-send-email-trent.tong@gmail.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-08-28iommu: add is_write as a parameter to the translate function of ↵Le Tan1-1/+1
MemoryRegionIOMMUOps Add a bool variable is_write as a parameter to the translate function of MemoryRegionIOMMUOps to indicate the operation of the access. It can be used for correct fault reporting from within the callback. Change the interface of related functions. Signed-off-by: Le Tan <tamlokveer@gmail.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2014-08-22linux-user: /proc/self/maps contentMikhail Ilyin1-0/+2
Build /proc/self/maps doing a match against guest memory translation table. Output only that map records which are valid for guest memory layout. Signed-off-by: Mikhail Ilyin <m.ilin@samsung.com> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
2014-08-19Revert "memory: Use canonical path component as the name"Peter Maydell1-0/+1
This reverts commit b0225c2c0d89200a29dc3d0b59d2e87a79cbaeb8 (which breaks building with Xen enabled and also leaks memory). Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-08-19Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell1-11/+1
SCSI changes that enable sending vendor-specific commands via virtio-scsi. Memory changes for QOMification and automatic tracking of MR lifetime. # gpg: Signature made Mon 18 Aug 2014 13:03:09 BST using RSA key ID 9B4D86F2 # gpg: Good signature from "Paolo Bonzini <pbonzini@redhat.com>" # gpg: aka "Paolo Bonzini <bonzini@gnu.org>" * remotes/bonzini/tags/for-upstream: mtree: remove write-only field memory: Use canonical path component as the name memory: Use memory_region_name for name access memory: constify memory_region_name exec: Abstract away ref to memory region names loader: Abstract away ref to memory region names tpm_tis: remove instance_finalize callback memory: remove memory_region_destroy memory: convert memory_region_destroy to object_unparent ioport: split deletion and destruction nic: do not destroy memory regions in cleanup functions vga: do not dynamically allocate chain4_alias sysbus: remove unused function sysbus_del_io qom: object: move unparenting to the child property's release callback qom: object: delete properties before calling instance_finalize virtio-scsi: implement parse_cdb scsi-block, scsi-generic: implement parse_cdb scsi-block: extract scsi_block_is_passthrough scsi-bus: introduce parse_cdb in SCSIDeviceClass and SCSIBusInfo scsi-bus: prepare scsi_req_new for introduction of parse_cdb Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-08-18memory: Use canonical path component as the namePeter Crosthwaite1-1/+0
Rather than having the name as separate state. This prepares support for creating a MemoryRegion dynamically (i.e. without memory_region_init() and friends) and the MemoryRegion still getting a usable name. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-08-18memory: constify memory_region_namePeter Crosthwaite1-1/+1
It doesn't change the MR and some prospective call sites will have const MRs at hand. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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