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AgeCommit message (Expand)AuthorFilesLines
2019-07-02spapr_pci: Unregister listeners before destroying the IOMMU address spaceGreg Kurz1-0/+10
2019-06-12Include qemu-common.h exactly where neededMarkus Armbruster2-2/+0
2019-06-11qemu-common: Move tcg_enabled() etc. to sysemu/tcg.hMarkus Armbruster1-0/+1
2019-06-10cpu: Remove CPU_COMMONRichard Henderson1-2/+0
2019-06-10cpu: Move the softmmu tlb to CPUNegativeOffsetStateRichard Henderson2-7/+24
2019-06-10cpu: Move icount_decr to CPUNegativeOffsetStateRichard Henderson3-7/+13
2019-06-10cpu: Introduce CPUNegativeOffsetStateRichard Henderson2-0/+32
2019-06-10cpu: Introduce cpu_set_cpustate_pointersRichard Henderson1-0/+11
2019-06-10cpu: Move ENV_OFFSET to exec/gen-icount.hRichard Henderson1-0/+2
2019-06-10cpu: Introduce env_archcpuRichard Henderson1-2/+12
2019-06-10cpu: Replace ENV_GET_CPU with env_cpuRichard Henderson4-14/+26
2019-06-10tcg: Create struct CPUTLBRichard Henderson2-28/+37
2019-06-10tcg: Split out target/arch/cpu-param.hRichard Henderson1-1/+21
2019-06-10tcg: Fold CPUTLBWindow into CPUTLBDescRichard Henderson1-13/+4
2019-06-03memory: Remove memory_region_get_dirty()Peter Xu1-17/+0
2019-05-28semihosting: move semihosting configuration into its own directoryAlex Bennée1-62/+0
2019-05-16Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20190510' into stagingPeter Maydell2-49/+10
2019-05-13Clean up decorations and whitespace around header guardsMarkus Armbruster1-1/+1
2019-05-10tcg: Use tlb_fill probe from tlb_vaddr_to_hostRichard Henderson1-40/+10
2019-05-10tcg: Use CPUClass::tlb_fill in cputlb.cRichard Henderson1-9/+0
2019-05-09Merge remote-tracking branch 'remotes/huth-gitlab/tags/pull-request-2019-05-0...Peter Maydell1-0/+1
2019-05-09include/exec/poison: Mark TARGET_FMT_lu as poisoned, tooThomas Huth1-0/+1
2019-05-03Header cleanupsAruna Jayasena1-3/+0
2019-04-28Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20190426' into stagingPeter Maydell2-3/+4
2019-04-25exec: Introduce qemu_maxrampagesize() and rename qemu_getrampagesize()David Hildenbrand1-1/+2
2019-04-24tcg: Hoist max_insns computation to tb_gen_codeRichard Henderson2-3/+4
2019-04-18qom/cpu: Simplify how CPUClass:cpu_dump_state() printsMarkus Armbruster1-1/+1
2019-04-18target: Simplify how the TARGET_cpu_list() printMarkus Armbruster1-13/+0
2019-04-18memory: Clean up how mtree_info() printsMarkus Armbruster2-4/+2
2019-04-18tcg: Simplify how dump_exec_info() printsMarkus Armbruster1-1/+1
2019-04-18tcg: Simplify how dump_opcount_info() printsMarkus Armbruster1-1/+1
2019-03-06migration: Add an ability to ignore shared RAM blocksYury Kotov1-1/+0
2019-03-06exec: Change RAMBlockIterFunc definitionYury Kotov1-2/+4
2019-03-04Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into stagingPeter Maydell1-1/+0
2019-02-21include/exec/helper-head.h: support "const void *" in helper callsDavid Hildenbrand1-0/+5
2019-02-21vhost-net: compile it on all targets that have virtio-net.Paolo Bonzini1-1/+0
2019-02-11exec-all: document that tlb_fill can trigger a TLB resizeEmilio G. Cota1-0/+5
2019-02-07Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20190206' into stagingPeter Maydell1-0/+4
2019-02-06accel/tcg: Consider cluster index in tb_lookup__cpu_state()Peter Maydell1-0/+4
2019-02-05Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell3-16/+16
2019-02-05exec: Add target-specific tlb bits to MemTxAttrsRichard Henderson1-0/+10
2019-02-05unify len and addr type for memory/address APIsLi Zhijian3-16/+16
2019-01-29accel/tcg: Add cluster number to TCG TB hashPeter Maydell1-1/+3
2019-01-29memory: add memory_region_flush_rom_device()Stefan Hajnoczi1-0/+18
2019-01-28cputlb: Remove static tlb sizingRichard Henderson2-60/+0
2019-01-28tcg: introduce dynamic TLB sizingEmilio G. Cota2-2/+76
2019-01-11qemu/queue.h: simplify reverse access to QTAILQPaolo Bonzini1-1/+1
2019-01-11qemu/queue.h: leave head structs anonymous unless necessaryPaolo Bonzini1-2/+2
2018-12-26tcg: Add TCG_CALL_NO_RETURNRichard Henderson2-7/+27
2018-12-26exec: Add RISC-V GCC poison macroAlistair Francis1-0/+1
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