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2025-07-04hw/riscv/riscv-iommu: Fix PPN field of Translation-reponse registerNutty Liu1-5/+1
The original implementation incorrectly performed a bitwise AND operation between the PPN of iova and PPN Mask, leading to an incorrect PPN field in Translation-reponse register. The PPN of iova should be set entirely in the PPN field of Translation-reponse register. Also remove the code that was used to clear S field since this field is already zero. Signed-off-by: Nutty Liu <liujingqi@lanxincomputing.com> Reviewed-by: Tomasz Jeznach <tjeznach@rivosinc.com> Message-ID: <20250605124848.1248-1-liujingqi@lanxincomputing.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2025-07-04hw/intc: riscv_aclint: Fix mtime write for sstc extensionJim Shu1-0/+5
When changing the mtime value, the period of [s|vs]timecmp timers should also be updated, similar to the period of mtimecmp timer. The period of the stimecmp timer is the time until the next S-mode timer IRQ. The value is calculated as "stimecmp - time". [1] It is equal to "stimecmp - mtime" since the time CSR is a read-only shadow of the memory-mapped mtime register. Thus, changing mtime value will update the period of stimecmp timer. Similarly, the period of vstimecmp timer is calculated as "vstimecmp - (mtime + htimedelta)" [2], so changing mtime value will update the period of vstimecmp timer. [1] RISC-V Priv spec ch 9.1.1. Supervisor Timer (stimecmp) Register A supervisor timer interrupt becomes pending, as reflected in the STIP bit in the mip and sip registers whenever time contains a value greater than or equal to stimecmp. [2] RISC-V Priv spec ch19.2.1. Virtual Supervisor Timer (vstimecmp) Register A virtual supervisor timer interrupt becomes pending, as reflected in the VSTIP bit in the hip register, whenever (time + htimedelta), truncated to 64 bits, contains a value greater than or equal to vstimecmp Signed-off-by: Jim Shu <jim.shu@sifive.com> Acked-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20250519143518.11086-3-jim.shu@sifive.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2025-07-03hw/arm/aspeed: Add GB200 BMC targetEd Tanous3-0/+102
GB200nvl72 is a system for for accelerated compute. This is a model for the BMC target within the system. This is based on the device tree aspeed-bmc-nvidia-gb200nvl-bmc.dts from: [1] https://github.com/openbmc/linux/blob/dev-6.6/arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-gb200nvl-bmc.dts Signed-off-by: Ed Tanous <etanous@nvidia.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250703144249.3348879-4-etanous@nvidia.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-07-03hw/arm/aspeed: Add second SPI chip to Aspeed modelEd Tanous1-0/+2
Aspeed2600 has two spi lanes; Add a new struct that can mount the second SPI. Signed-off-by: Ed Tanous <etanous@nvidia.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250703144249.3348879-2-etanous@nvidia.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-07-03vfio/container: delete old cpr registerSteve Sistare1-13/+0
vfio_cpr_[un]register_container is no longer used since they were subsumed by container type-specific registration. Delete them. Signed-off-by: Steve Sistare <steven.sistare@oracle.com> Reviewed-by: Zhenzhong Duan <zhenzhong.duan@intel.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/qemu-devel/1751493538-202042-21-git-send-email-steven.sistare@oracle.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-07-03vfio/iommufd: change processSteve Sistare1-0/+31
Finish CPR by change the owning process of the iommufd device in post load. Signed-off-by: Steve Sistare <steven.sistare@oracle.com> Reviewed-by: Zhenzhong Duan <zhenzhong.duan@intel.com> Link: https://lore.kernel.org/qemu-devel/1751493538-202042-19-git-send-email-steven.sistare@oracle.com [ clg: Fixed missing "qemu/error-report.h" include ] Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-07-03vfio/iommufd: reconstruct hwptSteve Sistare1-8/+22
Skip allocation of, and attachment to, hwpt_id. Recover it from CPR state. Signed-off-by: Steve Sistare <steven.sistare@oracle.com> Reviewed-by: Zhenzhong Duan <zhenzhong.duan@intel.com> Link: https://lore.kernel.org/qemu-devel/1751493538-202042-18-git-send-email-steven.sistare@oracle.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-07-03vfio/iommufd: reconstruct deviceSteve Sistare1-2/+28
Reconstruct userland device state after CPR. During vfio_realize, skip all ioctls that configure the device, as it was already configured in old QEMU. Skip bind, and use the devid from CPR state. Skip allocation of, and attachment to, ioas_id. Recover ioas_id from CPR state, and use it to find a matching container, if any, before creating a new one. This reconstruction is not complete. hwpt_id is handled in a subsequent patch. Signed-off-by: Steve Sistare <steven.sistare@oracle.com> Reviewed-by: Zhenzhong Duan <zhenzhong.duan@intel.com> Link: https://lore.kernel.org/qemu-devel/1751493538-202042-17-git-send-email-steven.sistare@oracle.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-07-03vfio/iommufd: preserve descriptorsSteve Sistare2-8/+11
Save the iommu and vfio device fd in CPR state when it is created. After CPR, the fd number is found in CPR state and reused. Signed-off-by: Steve Sistare <steven.sistare@oracle.com> Reviewed-by: Zhenzhong Duan <zhenzhong.duan@intel.com> Link: https://lore.kernel.org/qemu-devel/1751493538-202042-16-git-send-email-steven.sistare@oracle.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-07-03vfio/iommufd: cpr stateSteve Sistare3-1/+102
VFIO iommufd devices will need access to ioas_id, devid, and hwpt_id in new QEMU at realize time, so add them to CPR state. Define CprVFIODevice as the object which holds the state and is serialized to the vmstate file. Define accessors to copy state between VFIODevice and CprVFIODevice. Signed-off-by: Steve Sistare <steven.sistare@oracle.com> Reviewed-by: Zhenzhong Duan <zhenzhong.duan@intel.com> Link: https://lore.kernel.org/qemu-devel/1751493538-202042-15-git-send-email-steven.sistare@oracle.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-07-03migration: vfio cpr state hookSteve Sistare3-0/+21
Define a list of vfio devices in CPR state, in a subsection so that older QEMU can be live updated to this version. However, new QEMU will not be live updateable to old QEMU. This is acceptable because CPR is not yet commonly used, and updates to older versions are unusual. The contents of each device object will be defined by the vfio subsystem in a subsequent patch. Signed-off-by: Steve Sistare <steven.sistare@oracle.com> Reviewed-by: Zhenzhong Duan <zhenzhong.duan@intel.com> Link: https://lore.kernel.org/qemu-devel/1751493538-202042-14-git-send-email-steven.sistare@oracle.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-07-03vfio/iommufd: register container for cprSteve Sistare3-2/+91
Register a vfio iommufd container and device for CPR, replacing the generic CPR register call with a more specific iommufd register call. Add a blocker if the kernel does not support IOMMU_IOAS_CHANGE_PROCESS. This is mostly boiler plate. The fields to to saved and restored are added in subsequent patches. Signed-off-by: Steve Sistare <steven.sistare@oracle.com> Reviewed-by: Zhenzhong Duan <zhenzhong.duan@intel.com> Link: https://lore.kernel.org/qemu-devel/1751493538-202042-13-git-send-email-steven.sistare@oracle.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-07-03vfio/iommufd: device name blockerSteve Sistare1-0/+11
If an invariant device name cannot be created, block CPR. Signed-off-by: Steve Sistare <steven.sistare@oracle.com> Reviewed-by: Zhenzhong Duan <zhenzhong.duan@intel.com> Link: https://lore.kernel.org/qemu-devel/1751493538-202042-12-git-send-email-steven.sistare@oracle.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-07-03vfio/iommufd: add vfio_device_free_nameSteve Sistare5-6/+11
Define vfio_device_free_name to free the name created by vfio_device_get_name. A subsequent patch will do more there. No functional change. Signed-off-by: Steve Sistare <steven.sistare@oracle.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Reviewed-by: Zhenzhong Duan <zhenzhong.duan@intel.com> Link: https://lore.kernel.org/qemu-devel/1751493538-202042-11-git-send-email-steven.sistare@oracle.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-07-03vfio/iommufd: invariant device nameSteve Sistare1-5/+10
cpr-transfer will use the device name as a key to find the value of the device descriptor in new QEMU. However, if the descriptor number is specified by a command-line fd parameter, then vfio_device_get_name creates a name that includes the fd number. This causes a chicken-and-egg problem: new QEMU must know the fd number to construct a name to find the fd number. To fix, create an invariant name based on the id command-line parameter, if id is defined. The user will need to provide such an id to use CPR. Signed-off-by: Steve Sistare <steven.sistare@oracle.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Reviewed-by: Zhenzhong Duan <zhenzhong.duan@intel.com> Link: https://lore.kernel.org/qemu-devel/1751493538-202042-10-git-send-email-steven.sistare@oracle.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-07-03vfio/iommufd: use IOMMU_IOAS_MAP_FILESteve Sistare2-0/+22
Use IOMMU_IOAS_MAP_FILE when the mapped region is backed by a file. Such a mapping can be preserved without modification during CPR, because it depends on the file's address space, which does not change, rather than on the process's address space, which does change. Signed-off-by: Steve Sistare <steven.sistare@oracle.com> Reviewed-by: Zhenzhong Duan <zhenzhong.duan@intel.com> Link: https://lore.kernel.org/qemu-devel/1751493538-202042-9-git-send-email-steven.sistare@oracle.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-07-03migration: close kvm after cprSteve Sistare3-0/+34
cpr-transfer breaks vfio network connectivity to and from the guest, and the host system log shows: irq bypass consumer (token 00000000a03c32e5) registration fails: -16 which is EBUSY. This occurs because KVM descriptors are still open in the old QEMU process. Close them. Cc: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Steve Sistare <steven.sistare@oracle.com> Reviewed-by: Fabiano Rosas <farosas@suse.de> Link: https://lore.kernel.org/qemu-devel/1751493538-202042-4-git-send-email-steven.sistare@oracle.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-07-03vfio-pci: preserve INTxSteve Sistare2-3/+79
Preserve vfio INTx state across cpr-transfer. Preserve VFIOINTx fields as follows: pin : Recover this from the vfio config in kernel space interrupt : Preserve its eventfd descriptor across exec. unmask : Ditto route.irq : This could perhaps be recovered in vfio_pci_post_load by calling pci_device_route_intx_to_irq(pin), whose implementation reads config space for a bridge device such as ich9. However, there is no guarantee that the bridge vmstate is read before vfio vmstate. Rather than fiddling with MigrationPriority for vmstate handlers, explicitly save route.irq in vfio vmstate. pending : save in vfio vmstate. mmap_timeout, mmap_timer : Re-initialize bool kvm_accel : Re-initialize In vfio_realize, defer calling vfio_intx_enable until the vmstate is available, in vfio_pci_post_load. Modify vfio_intx_enable and vfio_intx_kvm_enable to skip vfio initialization, but still perform kvm initialization. Signed-off-by: Steve Sistare <steven.sistare@oracle.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/qemu-devel/1751493538-202042-3-git-send-email-steven.sistare@oracle.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-07-03vfio-pci: preserve MSISteve Sistare3-2/+149
Save the MSI message area as part of vfio-pci vmstate, and preserve the interrupt and notifier eventfd's. migrate_incoming loads the MSI data, then the vfio-pci post_load handler finds the eventfds in CPR state, rebuilds vector data structures, and attaches the interrupts to the new KVM instance. Signed-off-by: Steve Sistare <steven.sistare@oracle.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/qemu-devel/1751493538-202042-2-git-send-email-steven.sistare@oracle.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-07-03i386/tdx: Build TDX only for 64-bit targetXiaoyao Li1-1/+1
Build errors related to TDX were reported when QEMU built on 32-bit host[1][2]. Since TDX cannot work on 32-bit host and it's also not worth supporting TDX with 32-bit QEMU, limit TDX to 64-bit target only. [1] https://lore.kernel.org/qemu-devel/20250602173101.1052983-1-clg@redhat.com/ [2] https://lore.kernel.org/qemu-devel/b8171c39-6a92-4078-a59a-a63d7452e1e9@kaod.org/ Suggested-by: Cédric Le Goater <clg@redhat.com> Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Tested-by: Cédric Le Goater <clg@redhat.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250625073310.2796298-1-xiaoyao.li@intel.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-07-03vfio-user: do not register vfio-user container with cprMark Cave-Ayland1-10/+1
As the full cpr implementation is yet to be merged upstream, do not register the vfio-user container with cpr. Full vfio-user support for cpr can be merged later as a follow-up series. Signed-off-by: Mark Cave-Ayland <mark.caveayland@nutanix.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Message-ID: <20250702120043.267634-1-mark.caveayland@nutanix.com> [ clg: Removed now useless "hw/vfio/vfio-cpr.h" include ] Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-07-03vfio/container: Fix vfio_container_post_load()Zhenzhong Duan1-14/+9
When there are multiple VFIO containers, vioc->dma_map is restored multiple times, this made only first container work and remaining containers using vioc->dma_map restored by first container. Fix it by save and restore vioc->dma_map locally. saved_dma_map in VFIOContainerCPR becomes useless and is removed. Fixes: 7e9f21411302 ("vfio/container: restore DMA vaddr") Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com> Reviewed-by: Steve Sistare <steven.sistare@oracle.com> Link: https://lore.kernel.org/qemu-devel/20250627063332.5173-3-zhenzhong.duan@intel.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-07-03vfio/container: Fix potential SIGSEGV when recover from unmap-all-vaddr failureZhenzhong Duan1-2/+2
CPR overrides then restores dma_map in both outgoing and incoming QEMU, for different reasons. But it only sets saved_dma_map in the target. Fix it by always setting saved_dma_map. Fixes: eba1f657cbb1 ("vfio/container: recover from unmap-all-vaddr failure") Suggested-by: Steven Sistare <steven.sistare@oracle.com> Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com> Reviewed-by: Steve Sistare <steven.sistare@oracle.com> Link: https://lore.kernel.org/qemu-devel/20250627063332.5173-2-zhenzhong.duan@intel.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-07-03hw/misc/aspeed_scu: Handle AST2600 protection key registers correctlyTan Siewert1-2/+14
The AST2600 SCU has two protection key registers (0x00 and 0x10) that both need to be unlocked. (Un-)locking 0x00 modifies both protection key registers, while modifying 0x10 only modifies itself. This commit updates the SCU write logic to reject writes unless both protection key registers are unlocked, matching the behaviour of real hardware. Signed-off-by: Tan Siewert <tan@siewert.io> Reviewed-by: Jamin Lin <jamin_lin@aspeedtech.com> Link: https://lore.kernel.org/qemu-devel/20250619085329.42125-1-tan@siewert.io Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-07-03hw/arm/aspeed: add Catalina machine typePatrick Williams2-0/+201
Add the 'catalina-bmc' machine type based on the kernel DTS[1] as of 6.16-rc2. The i2c model is as complete as the current QEMU models support, but in some cases I substituted devices that are close enough for present functionality. Strap registers are were verified with hardware. This has been tested with an openbmc image built from [2]. Add a functional test in line with Bletchley, pointing at an image obtained from the OpenBMC Jenkins server. [1]: https://github.com/torvalds/linux/blob/v6.16-rc2/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-catalina.dts [2]: https://github.com/openbmc/openbmc/commit/5bc73ec261f981d5e586bda5ac78eb0cbd5f92b0 Signed-off-by: Patrick Williams <patrick@stwcx.xyz> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250619151458.2831859-1-patrick@stwcx.xyz Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-07-03hw/arm/aspeed: bletchley: update hw strap valuesPatrick Williams1-3/+2
Update the Bletchley hardware strap register values per actual hardware: ``` root@bmc:~# devmem 0x1e6e2500 0x00002000 root@bmc:~# devmem 0x1e6e2510 0x00000801 ``` Signed-off-by: Patrick Williams <patrick@stwcx.xyz> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250619035850.2682690-1-patrick@stwcx.xyz Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-07-03hw/misc/aspeed_scu: Support the Frequency Counter Control register for AST2700Jamin Lin1-0/+6
According to the datasheet: BIT[1] (SCU_FREQ_OSC_EN) enables the oscillator frequency measurement counter. BIT[6] (SCU_FREQ_DONE) indicates the measurement is finished. Firmware polls BIT[6] to determine when measurement is complete. The flag can be cleared by writing BIT[1] to 0. To simulate this hardware behavior in QEMU: If BIT[1] is set to 1, BIT[6] is immediately set to 1 to avoid firmware hanging during polling. If BIT[1] is cleared to 0, BIT[6] is also cleared to 0 to match hardware semantics. The initial value of this register is initialized to 0x80, reflecting the default value confirmed from an EVB register dump. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250618080006.846355-3-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-07-03hw/misc/aspeed_sdmc: Skipping dram_init in u-boot for AST2700Jamin Lin1-0/+3
On AST2700 SoC, QEMU now sets BIT6 in VGA0 SCRATCH register to indicate that DDR training has completed, thus skipping the dram_init(). To align with the recent U-Boot changes, where the Main Control Register's BIT16 is checked to skip the dram_init() process, this patch sets BIT16 in the SDMC Main Control Register at reset time. This allows both the main U-Boot stage to correctly detect and bypass DRAM initialization when running under QEMU. Reference: - QEMU: https://github.com/qemu/qemu/commit/2d082fea485ee455a70ed3e963cdf9a70f34858a - U-Boot: https://github.com/AspeedTech-BMC/u-boot/commit/94e5435504fb0d8888f5c1bfd3fa284cdd6aaf9b Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250618080006.846355-2-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-07-03Merge tag 'pull-request-2025-07-02' of https://gitlab.com/thuth/qemu into ↵Stefan Hajnoczi6-8/+8
staging * Fix file names of renamed files in comments and MAINTAINERS * Fix the "deprecated props" in QOM on s390x * Fix URL of the aarch64_sbsaref_freebsd functional test * Fix some trouble with trible # -----BEGIN PGP SIGNATURE----- # # iQJFBAABCAAvFiEEJ7iIR+7gJQEY8+q5LtnXdP5wLbUFAmhlZckRHHRodXRoQHJl # ZGhhdC5jb20ACgkQLtnXdP5wLbVIZhAAltzQ9+lZYa0A5NcgbFlVSmL/E6qDIMXG # AJcNul3dgrIVcCrxN17dBmU4ftemjQCpcw7I4fL0G0CrAMdB9Yp991tis1SwycNX # HEDY8THEE7EiOEKxBHtUFo8JbsnT+lcCwNnpvu6RXwnTN4TjT386OwBSeKv4mhHt # LFoUnX5yZqJQD1bzcrUeo+OBoXrnMkeJRuOTFXval1AGBT4q0G5mMtAcj93gONNe # hKdXhYst4XYLZIe2TJAdsbKs5Ics5UZ9rkSIC8tw1drt+iueSSSHNoPsg2AP8Ueg # iqElX3tzzb/P7QF/LWIfu55WLMbP2C2l6Pb37sdZf8Y1QpRaA/6fxQrNRoVLYfdP # 2Gqtxd8Ynn74LUxOpW+gi90mmrZpIL+M06Al0bzpI+KmWOaZxpBd0E3r5BIO1Ghb # /7XIn9svlVpBXd5V3M7Myg1BKAlJJ6GtuMMDBv8Yym6bTD+bdjGk28k/uvt6BSpq # qiMVjKrmmAO4zBkj3OZUKYoqkktf6mjso0xjXxkI2GTQ44dgvXXluwHF8F5LzBPz # y2X+KGhf/vfXqP7cAGpmFH3SjDqngdqvuBT/pDO/VWRUhyz8lM6DyPsdVhS7KrXl # QByt4FkCzYS+o9kc2Hlobj+ujjEPG+1ffSDDweioYYygsZny+8GBgD5D31e5cPsP # 9/Uc75aJD88= # =SEr8 # -----END PGP SIGNATURE----- # gpg: Signature made Wed 02 Jul 2025 13:00:57 EDT # gpg: using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5 # gpg: issuer "thuth@redhat.com" # gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full] # gpg: aka "Thomas Huth <thuth@redhat.com>" [full] # gpg: aka "Thomas Huth <huth@tuxfamily.org>" [full] # gpg: aka "Thomas Huth <th.huth@posteo.de>" [unknown] # Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5 * tag 'pull-request-2025-07-02' of https://gitlab.com/thuth/qemu: tests/functional/test_aarch64_sbsaref_freebsd: Fix the URL of the ISO image target/s390x: A fix for the trouble with tribles target/s390x: set has_deprecated_props flag MAINTAINERS: fix paths for relocated files treewide: fix paths for relocated files in comments treewide: update docs file extensions (.txt -> .rst) in comments MAINTAINERS: fix VMware filename typo (vwm -> vmw) MAINTAINERS: fix vendor capitalization (Vmware -> VMware) MAINTAINERS: update docs file extensions (.txt -> .rst) Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2025-07-03Merge tag 'pull-10.1-maintainer-june-2025-020725-1' of ↵Stefan Hajnoczi1-0/+44
https://gitlab.com/stsquad/qemu into staging Maintainer updates for June (gitlab, semihosting, plugins, virtio-gpu) - mark s390x runner system tests as allow_fail - build semihosting once - add register write support to plugins - add virtual memory write support to plugins - add harder memory read/write support to plugins - add patcher plugin and tests - re-stock virtio-gpu MAINTAINERS - fix context init for Venus fences * tag 'pull-10.1-maintainer-june-2025-020725-1' of https://gitlab.com/stsquad/qemu: virtio-gpu: support context init multiple timeline MAINTAINERS: add Akihiko and Dmitry as reviewers MAINTAINERS: add myself to virtio-gpu for Odd Fixes plugins: Update plugin version and add notes plugins: Add patcher plugin and test tests/tcg: Remove copy-pasted notes and from i386 and add x86_64 system tests to tests plugins: Add memory hardware address read/write API plugins: Add memory virtual address write API plugins: Add enforcement of QEMU_PLUGIN_CB flags in register R/W callbacks plugins: Add register write API gdbstub: Expose gdb_write_register function to consumers of gdbstub semihosting/uaccess: Compile once semihosting/uaccess: Remove uses of target_ulong type tests/functional: Add PCI hotplug test for aarch64 gitlab: mark s390x-system to allow failures Conflicts: tests/functional/meson.build Context conflict with commit 7bc86ccbb59f ("tests/functional: test device passthrough on aarch64"), keep both changes to tests_aarch64_system_thorough[].
2025-07-02treewide: fix paths for relocated files in commentsSean Wei1-1/+1
After the docs directory restructuring, several comments refer to paths that no longer exist. Replace these references to the current file locations so readers can find the correct files. Related commits --------------- 189c099f75f (Jul 2021) docs: collect the disparate device emulation docs into one section Rename docs/system/{ => devices}/nvme.rst 5f4c96b779f (Feb 2023) docs/system/loongarch: update loongson3.rst and rename it to virt.rst Rename docs/system/loongarch/{loongson3.rst => virt.rst} fe0007f3c1d (Sep 2023) exec: Rename cpu.c -> cpu-target.c Rename cpus-common.c => cpu-common.c 42fa9665e59 (Apr 2025) exec: Restrict 'cpu_ldst.h' to accel/tcg/ Rename include/{exec/cpu_ldst.h => accel/tcg/cpu-ldst.h} Signed-off-by: Sean Wei <me@sean.taipei> Message-ID: <20250616.qemu.relocated.06@sean.taipei> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2025-07-02treewide: update docs file extensions (.txt -> .rst) in commentsSean Wei5-7/+7
Several source comments still refer to docs with the old .txt extension that were previously converted to reStructuredText. Update these references to use the correct .rst extensions to maintain accurate in-tree documentation pointers. No functional changes. Related commits: 50f8174c5c1 (Jul 2021): docs/specs/acpi_nvdimm: Convert to rST f054eb1c920 (Jul 2021): docs/specs/acpi_pci_hotplug: Convert to rST 912fb3678b8 (Sep 2023): docs/specs/vmgenid: Convert to rST bb1cff6ee04 (Sep 2023): docs/specs/ivshmem-spec: Convert to rST 55ff468f781 (Jan 2022): docs: Rename ppc-spapr-hotplug.txt to .rst Signed-off-by: Sean Wei <me@sean.taipei> Message-ID: <20250616.qemu.relocated.05@sean.taipei> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Harsh Prateek Bora <harshpb@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2025-07-02virtio-gpu: support context init multiple timelineYiwei Zhang1-0/+44
Venus and later native contexts have their own fence context along with multiple timelines within. Fences wtih VIRTIO_GPU_FLAG_INFO_RING_IDX in the flags must be dispatched to be created on the target context. Fence signaling also has to be handled on the specific timeline within that target context. Before this change, venus fencing is completely broken if the host driver doesn't support implicit fencing with external memory objects. Frames can go backwards along with random artifacts on screen if the host driver doesn't attach an implicit fence to the render target. The symptom could be hidden by certain guest wsi backend that waits on a venus native VkFence object for the actual payload with limited present modes or under special configs. e.g. x11 mailbox or xwayland. After this change, everything related to venus fencing starts making sense. Confirmed this via guest and host side perfetto tracing. Cc: qemu-stable@nongnu.org Fixes: 94d0ea1c1928 ("virtio-gpu: Support Venus context") Signed-off-by: Yiwei Zhang <zzyiwei@gmail.com> Reviewed-by: Dmitry Osipenko <dmitry.osipenko@collabora.com> Message-Id: <20250518152651.334115-1-zzyiwei@gmail.com> [AJB: remove version history from commit message] Tested-by: Dmitry Osipenko <dmitry.osipenko@collabora.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Akihiko Odaki <odaki@rsg.ci.i.u-tokyo.ac.jp> Message-ID: <20250627112512.1880708-16-alex.bennee@linaro.org>
2025-07-01hw/arm/sbsa-ref: Tidy up use of RAMLIMIT_GB definitionPhilippe Mathieu-Daudé1-3/+5
Define RAMLIMIT_BYTES using the TiB definition and display the error parsed with size_to_str(): $ qemu-system-aarch64-unsigned -M sbsa-ref -m 9T qemu-system-aarch64-unsigned: sbsa-ref: cannot model more than 8 TiB of RAM Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20250623121845.7214-22-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-07-01hw/arm/virt: Rename cpu_post_init() -> post_cpus_gic_realized()Philippe Mathieu-Daudé1-4/+5
QDev uses _post_init() during instance creation, before being realized. Since here both vCPUs and GIC are REALIZED, rename as virt_post_cpus_gic_realized() for clarity. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20250623121845.7214-21-philmd@linaro.org [PMM: also fixed up comment] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-07-01hw/arm/virt: Make EL2 accelerator check an accept-listPhilippe Mathieu-Daudé1-1/+1
Currently only the TCG and qtest accelerators can handle an EL2 guest. Instead of making the condition check be "fail if KVM or HVF" (an exclude-list), make it a be "allow if TCG or qtest" (an accept-list). This is better for if/when we add new accelerators, as it makes the default be that we forbid an EL2 guest. This is the most likely to be correct and also "fails safe"; if the new accelerator really can support EL2 guests then the implementor will see that they need to add it to the accept-list. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20250623121845.7214-20-philmd@linaro.org [PMM: rewrote commit message] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-07-01hw/arm/virt: Make EL3-guest accel check an accept-listPhilippe Mathieu-Daudé1-1/+1
Currently only the TCG and qtest accelerators can handle an EL3 guest. Instead of making the condition check be "fail if KVM or HVF" (an exclude-list), make it a be "allow if TCG or qtest" (an accept-list). This is better for if/when we add new accelerators, as it makes the default be that we forbid an EL3 guest. This is the most likely to be correct and also "fails safe"; if the new accelerator really can support EL3 guests then the implementor will see that they need to add it to the accept-list. Reported-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20250623121845.7214-19-philmd@linaro.org [PMM: rewrote commit message] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-07-01hw/arm/virt-acpi-build: Fix ACPI IORT and MADT tables when its=offGustavo Romero1-54/+88
Currently, the ITS Group nodes in the IORT table and the GIC ITS Struct in the MADT table are always generated, even if GIC ITS is not available on the machine. This commit fixes it by not generating the ITS Group nodes, not mapping any other node to them, and not advertising the GIC ITS in the MADT table, when GIC ITS is not available on the machine. Since the fix changes the MADT and IORT tables, add the blobs for the "its=off" test to the allow list and update them in the next commit. This commit also renames the smmu_idmaps and its_idmaps variables in build_iort() to rc_smmu_idmaps and rc_its_idmaps, respectively, to make it clearer which nodes are involved in the mappings associated with these variables. Reported-by: Udo Steinberg <udo@hypervisor.org> Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org> Message-id: 20250628195722.977078-9-gustavo.romero@linaro.org Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2886 Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org> Co-authored-by: Philippe Mathieu-Daudé <philmd@linaro.org> [PMM: wrapped an overlong comment] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-07-01hw/arm/virt-acpi-build: Factor out create_its_idmapsGustavo Romero1-21/+40
Factor out a new function, create_its_idmaps(), from the current build_iort code. Add proper comments to it clarifying how the ID ranges that go directly to the ITS Group node are computed based on the ones that are directed to the SMMU node. Suggested-by: Eric Auger <eric.auger@redhat.com> Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org> Message-id: 20250628195722.977078-6-gustavo.romero@linaro.org [PMM: drop hardcoded tabs] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-07-01hw/arm/virt-acpi-build: Improve comment in build_iortGustavo Romero1-6/+19
When building the Root Complex table, the comment about the code that maps the RC node to SMMU node is misleading because it reads "RC -> SMMUv3 -> ITS", but the code is only mapping the RCs IDs to the SMMUv3 node. The step of mapping from the SMMUv3 IDs to the ITS Group node is actually defined in another table (in the SMMUv3 node). So change the comment to read "RC -> SMMUv3" instead. Signed-off-by Gustavo Romero <gustavo.romero@linaro.org> Reviewed-by: Eric Auger <eric.auger@redhat.com> Message-id: 20250628195722.977078-5-gustavo.romero@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-07-01hw/arm/virt: Simplify create_its()Philippe Mathieu-Daudé1-10/+7
No need to strstr() check the class name when we can use kvm_irqchip_in_kernel() to check if the ITS from the host can be used. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org> Message-id: 20250628195722.977078-4-gustavo.romero@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-07-01hw/arm/virt: Simplify logic for setting instance's 'tcg_its' variableGustavo Romero1-6/+2
Because 'tcg_its' in the machine instance is set based on the machine class’s negated variable 'no_tcg_its', 'tcg_its' is the opposite of 'no_tcg_its' and hence the code in question can be simplified as: tcg_its = !no_tcg_its. Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org> Reviewed-by: Eric Auger <eric.auger@redhat.com> Message-id: 20250628195722.977078-3-gustavo.romero@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-07-01hw/intc/gicv3_its: Do not check its_class_name()Philippe Mathieu-Daudé1-18/+14
Since commit cc5e719e2c8 ("kvm: require KVM_CAP_SIGNAL_MSI"), the single implementation of its_class_name() no longer returns NULL (it now always returns a valid char pointer). Hence, update the prototype docstring and remove the tautological checks that use the its_class_name() returned value. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Eric Auger <eric.auger@redhat.com> Message-id: 20250628195722.977078-2-gustavo.romero@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-07-01arm/cpu: Store id_mmfr0-5 into the idregs arrayEric Auger1-4/+4
Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Sebastian Ott <sebott@redhat.com> Signed-off-by: Eric Auger <eric.auger@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com> Message-id: 20250617153931.1330449-12-cohuck@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-07-01arm/cpu: Store id_dfr0/1 into the idregs arrayEric Auger1-1/+1
Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Sebastian Ott <sebott@redhat.com> Signed-off-by: Eric Auger <eric.auger@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com> Message-id: 20250617153931.1330449-11-cohuck@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-07-01arm/cpu: Store id_pfr0/1/2 into the idregs arrayEric Auger1-2/+3
Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Sebastian Ott <sebott@redhat.com> Signed-off-by: Eric Auger <eric.auger@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com> Message-id: 20250617153931.1330449-10-cohuck@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-07-01arm/cpu: Store id_isar0-7 into the idregs arrayEric Auger1-6/+6
Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Sebastian Ott <sebott@redhat.com> Signed-off-by: Eric Auger <eric.auger@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com> Message-id: 20250617153931.1330449-9-cohuck@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-06-26Merge tag 'pull-vfio-20250626' of https://github.com/legoater/qemu into stagingStefan Hajnoczi23-14/+3142
vfio queue: * Added several small fixes and cleanups * Added support for vfio-user client device # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEEoPZlSPBIlev+awtgUaNDx8/77KEFAmhc+mwACgkQUaNDx8/7 # 7KHQShAAwGTjc6yzBaFr9DTKaL6Vszwby5tYdV3vWTsnFj2zBks+5BswohxbnYdk # Smy5E/F+yCiHI6X4ohI4FRjJgBJplDxZ6bbEgTwZa6ADs7xWAwFWv349KQY9uLpJ # XV/ACot2b6FZUskv3w1SxQrpzho4ICm3DuLOdAFAvBPRtxyC2aQMLsXTlT+7+5cC # X8zJB/9mtjWIomYWKRXnYUP/uM1g7QLtyU7d01szvqCfSVUilVlg6Ys7RxnqLG0k # A1/kxYOrEPHHxMO+YwFuapIfE8Gqihes2K1GfM871JaBT14dMIAZkajmVasbKD16 # Iljz89nEV3UehDP9HADhx3QuXO7fhJ3cxcHvTH0xhUeoks3EgTlUq0VNRRYzu6rQ # 3P1E3cVaPTmwfoSrhecNIFcln4v/bENdwzYcjh96r9fcFwE+ro4oUTGNKCPYv2t0 # yOoc6PqgiZN7DM89/N2hcesgOun7oOVpMnKhiqHjVe53HoM8bfLojWECKNq9Cz1u # m0YEHn2gEuEB5l03IguRnAywZq76Jivd6WFmAeXGrHRZ9sfxQCwvImbqMa7QxYpI # rt+j7RAyP57WVoBPoW8hlaIQmLuIvIgdWwWkwQd2BTIprLpdHJd4SWkL6eqGozpE # rsaHw+WQZqFoddrl7EUSVY/Z2CfIRr1g/Zo5z4RU9YLtxVxjSPw= # =sX2P # -----END PGP SIGNATURE----- # gpg: Signature made Thu 26 Jun 2025 03:44:44 EDT # gpg: using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1 # gpg: Good signature from "Cédric Le Goater <clg@redhat.com>" [full] # gpg: aka "Cédric Le Goater <clg@kaod.org>" [full] # Primary key fingerprint: A0F6 6548 F048 95EB FE6B 0B60 51A3 43C7 CFFB ECA1 * tag 'pull-vfio-20250626' of https://github.com/legoater/qemu: (25 commits) vfio-user: introduce vfio-user protocol specification docs: add vfio-user documentation vfio-user: add coalesced posted writes vfio-user: support posted writes vfio-user: add 'x-msg-timeout' option vfio-user: implement VFIO_USER_DMA_READ/WRITE vfio-user: implement VFIO_USER_DMA_MAP/UNMAP vfio-user: implement VFIO_USER_DEVICE_RESET vfio-user: set up container access to the proxy vfio-user: forward MSI-X PBA BAR accesses to server vfio-user: implement VFIO_USER_DEVICE_GET/SET_IRQ* vfio-user: set up PCI in vfio_user_pci_realize() vfio-user: implement VFIO_USER_REGION_READ/WRITE vfio-user: implement VFIO_USER_DEVICE_GET_REGION_INFO vfio-user: implement VFIO_USER_DEVICE_GET_INFO vfio-user: implement message send infrastructure vfio-user: implement message receive infrastructure vfio-user: connect vfio proxy to remote server vfio-user: add vfio-user class and container vfio/container: fails mdev hotplug if add migration blocker failed ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2025-06-26vfio-user: add coalesced posted writesJohn Levon5-0/+158
Add new message to send multiple writes to server in a single message. Prevents the outgoing queue from overflowing when a long latency operation is followed by a series of posted writes. Originally-by: John Johnson <john.g.johnson@oracle.com> Signed-off-by: Elena Ufimtseva <elena.ufimtseva@oracle.com> Signed-off-by: Jagannathan Raman <jag.raman@oracle.com> Signed-off-by: John Levon <john.levon@nutanix.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250625193012.2316242-18-john.levon@nutanix.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-06-26vfio-user: support posted writesJohn Levon4-6/+63
Support an asynchronous send of a vfio-user socket message (no wait for a reply) when the write is posted. This is only safe when no regions are mappable by the VM. Add an option to explicitly disable this as well. Signed-off-by: John Levon <john.levon@nutanix.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250625193012.2316242-17-john.levon@nutanix.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
generated by cgit v1.1 at 2025-08-02 22:24:53 +0000