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2013-01-12build: remove CONFIG_SMARTCARDPaolo Bonzini2-2/+2
The passthru smartcard does not have the shared library dependency, build it unconditionally. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-01-12qemu-option: move standard option definitions out of qemu-config.cPaolo Bonzini1-0/+51
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-01-12Merge branch 'ppc-for-upstream' of git://repo.or.cz/qemu/agrafBlue Swirl3-394/+659
* 'ppc-for-upstream' of git://repo.or.cz/qemu/agraf: (31 commits) PPC: linux-user: Calculate context pointer explicitly target-ppc: Error out for -cpu host on unknown PVR target-ppc: Slim conversion of model definitions to QOM subclasses PPC: Bring EPR support closer to reality PPC: KVM: set has-idle in guest device tree kvm: Update kernel headers openpic: fix CTPR and de-assertion of interrupts openpic: move IACK to its own function openpic: IRQ_check: search the queue a word at a time openpic: fix sense and priority bits openpic: add some bounds checking for IRQ numbers openpic: use standard bitmap operations Revert "openpic: Accelerate pending irq search" openpic: always call IRQ_check from IRQ_get_next openpic/fsl: critical interrupts ignore mask before v4.1 openpic: make ctpr signed openpic: rework critical interrupt support openpic: make register names correspond better with hw docs ppc/booke: fix crit/mcheck/debug exceptions openpic: lower interrupt when reading the MSI register ...
2013-01-12hw/pc.c: add ULL suffix in ioport80_read and ioportF0_read return valueJulien Grall1-2/+2
The commit c02e1eac887b1b0aee7361b1fcf889e7d47fed9d broke the compilation for i386. ULL need to be specify for uint64_t value. Signed-off-by: Julien Grall <julien.grall@citrix.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-01-11Merge remote-tracking branch 'stefanha/trivial-patches' into stagingAnthony Liguori2-1/+13
* stefanha/trivial-patches: hw/pc.c: Fix converting of ioport_register* to MemoryRegion Replace remaining gmtime, localtime by gmtime_r, localtime_r savevm: Remove MinGW specific code which is no longer needed qga/channel-posix.c: Explicitly include string.h configure: Fix comment (copy+paste bug) readline: avoid memcpy() of overlapping regions Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-01-11Merge remote-tracking branch 'kraxel/q35.1' into stagingAnthony Liguori3-13/+40
* kraxel/q35.1: Makefile: install the "acpi-dsdt.aml" and "q35-acpi-dsdt.aml" blobs too pc: rename machine types q35: document chipset devices q35: add ich9 intel hda controller Conflicts: hw/intel-hda.c aliguori: resolve conflict with static const change from Andreas. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-01-11Merge remote-tracking branch 'afaerber-or/prep-up' into stagingAnthony Liguori4-32/+461
* afaerber-or/prep-up: prep: Use pc87312 device instead of collection of random ISA devices prep: Add pc87312 Super I/O emulation prep: Include devices for ppc64 as well Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-01-11hw/pc.c: Fix converting of ioport_register* to MemoryRegionJulien Grall1-0/+12
The commit 258711 introduced MemoryRegion to replace ioport_region* for ioport 80h and F0h. A MemoryRegion needs to have both read and write callback otherwise a segfault will occur when an access is made. The previous behaviour of this both ioport is to return 0xffffffffffffffff. So keep this behaviour. Reported-by: Adam Lackorzynski <adam@os.inf.tu-dresden.de> Signed-off-by: Julien Grall <julien.grall@citrix.com> Tested-by: Adam Lackorzynski <adam@os.inf.tu-dresden.de> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2013-01-11Replace remaining gmtime, localtime by gmtime_r, localtime_rStefan Weil1-1/+1
This allows removing of MinGW specific code and improves reentrancy for POSIX hosts. [Removed unused ret variable in qemu_get_timedate() to fix warning: vl.c: In function ‘qemu_get_timedate’: vl.c:451:16: error: variable ‘ret’ set but not used [-Werror=unused-but-set-variable] -- Stefan Hajnoczi] Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2013-01-11pc: rename machine typesGerd Hoffmann2-6/+6
Starting with release 1.4 we have a fully functional q35 machine type, i.e. "qemu -M q35" JustWorks[tm]. Update machine type names to reflect that: * pc-1.4 becomes pc-i440fx-1.4 * q35-next becomes pc-q35-1.4 The pc-1.3 (+older) names are maintained for compatibility reasons. For the same reason the "pc" and "q35" aliases are kept. pc-piix-1.4 continues to be the default machine type, again for compatibility reasons. Also updated the description (shown by "qemu -M ?") with host bridge name, south bridge name and chipset release year. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2013-01-11q35: add ich9 intel hda controllerGerd Hoffmann1-7/+34
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2013-01-10virtio-scsi: abort in-flight I/O when the device is resetPaolo Bonzini1-0/+4
When the device is reset, the SCSI bus should also be reset so that in-flight I/O is cancelled. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-01-10qdev: add qbus_reset_allPaolo Bonzini2-1/+18
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-01-10Make all static TypeInfos constAndreas Färber247-335/+335
Since 39bffca2030950ef6efe57c2fac8327a45ae1015 (qdev: register all types natively through QEMU Object Model), TypeInfo as used in the common, non-iterative pattern is no longer amended with information and should therefore be const. Fix the documented QOM examples: sed -i 's/static TypeInfo/static const TypeInfo/g' include/qom/object.h Since frequently the wrong examples are being copied by contributors of new devices, fix all types in the tree: sed -i 's/^static TypeInfo/static const TypeInfo/g' */*.c sed -i 's/^static TypeInfo/static const TypeInfo/g' */*/*.c This also avoids to piggy-back these changes onto real functional changes or other refactorings. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-01-10Merge branch 'master' of git://git.qemu.org/qemu into prep-upAndreas Färber646-12708/+32412
Conflicts: hw/Makefile.objs hw/ppc_prep.c Signed-off-by: Andreas Färber <andreas.faerber@web.de>
2013-01-10Merge remote-tracking branch 'awilliam/tags/qemu-1.4-vfio-20130109.0' into ↵Anthony Liguori1-6/+28
staging vfio-pci: Fixes for qemu 1.4 & stable * awilliam/tags/qemu-1.4-vfio-20130109.0: vfio-pci: Loosen sanity checks to allow future features vfio-pci: Make host MSI-X enable track guest Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-01-08vfio-pci: Loosen sanity checks to allow future featuresAlex Williamson1-2/+2
VFIO_PCI_NUM_REGIONS and VFIO_PCI_NUM_IRQS should never have been used in this manner as it locks a specific kernel implementation. Future features may introduce new regions or interrupt entries (VGA may add legacy ranges, AER might add an IRQ for error signalling). Fix this before it gets us into trouble. Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Cc: qemu-stable@nongnu.org
2013-01-08vfio-pci: Make host MSI-X enable track guestAlex Williamson1-4/+26
Guests typically enable MSI-X with all of the vectors in the MSI-X vector table masked. Only when the vector is enabled does the vector get unmasked, resulting in a vector_use callback. These two points, enable and unmask, correspond to pci_enable_msix() and request_irq() for Linux guests. Some drivers rely on VF/PF or PF/fw communication channels that expect the physical state of the device to match the guest visible state of the device. They don't appreciate lazily enabling MSI-X on the physical device. To solve this, enable MSI-X with a single vector when the MSI-X capability is enabled and immediate disable the vector. This leaves the physical device in exactly the same state between host and guest. Furthermore, the brief gap where we enable vector 0, it fires into userspace, not KVM, so the guest doesn't get spurious interrupts. Ideally we could call VFIO_DEVICE_SET_IRQS with the right parameters to enable MSI-X with zero vectors, but this will currently return an error as the Linux MSI-X interfaces do not allow it. Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Cc: qemu-stable@nongnu.org
2013-01-08qdev: Don't assume existence of parent bus on unparentingAndreas Färber1-3/+5
Commit 667d22d1ae59da46b4c1fbd094ca61145f19b8c3 (qdev: move bus removal to object_unparent) made the assumption that at unparenting time parent_bus is not NULL. This assumption is unjustified since object_unparent() may well be called directly after object_initialize(), without any qdev_set_parent_bus(). This did not cause any issues yet because qdev_[try_]create() does call qdev_set_parent_bus(), falling back to SysBus if unsupplied. While at it, ensure that this new function uses the device_ prefix and make the name more neutral in light of this semantic change. Reported-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de> Tested-by: Igor Mammedov <imammedo@redhat.com>
2013-01-08qdev: Include qdev code into *-user, tooEduardo Habkost1-2/+7
The code depends on some functions from qemu-option.o, so add qemu-option.o to universal-obj-y to make sure it's included. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-01-08Merge remote-tracking branch 'kraxel/usb.75' into stagingAnthony Liguori21-330/+3279
* kraxel/usb.75: (32 commits) uhci: stop using portio lists usbredir: Add support for buffered bulk input (v2) exynos4210: Add EHCI support usb/ehci: Add SysBus EHCI device for Exynos4210 usb/ehci: Move capsbase and opregbase into SysBus EHCI class usb/ehci: Clean up SysBus and PCI EHCI split xhci: call set-address with dummy usbpacket usb-redir: Add debugging to bufpq save / restore usbredir: Add usbredir_init_endpoints() helper usbredir: Verify we have 32 bits bulk length cap when redirecting to xhci usbredir: Add ep_stopped USBDevice method usbredir: Add USBEP2I and I2USBEP helper macros usbredir: Add an usbredir_stop_ep helper function usb: Add an usb_device_ep_stopped USBDevice method usb: Fix usb_ep_find_packet_by_id hid: Change idle handling to use a timer uhci: Maximize how many frames we catch up when behind uhci: Limit amount of frames processed in one go uhci: Add a QH_VALID define uhci: Fix pending interrupts getting lost on migration ... Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-01-08uhci: stop using portio listsGerd Hoffmann1-76/+30
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2013-01-08usbredir: Add support for buffered bulk input (v2)Hans de Goede7-20/+2717
Buffered bulk mode is intended for bulk *input* endpoints, where the data is of a streaming nature (not part of a command-response protocol). These endpoints' input buffer may overflow if data is not read quickly enough. So in buffered bulk mode the usb-host takes care of the submitting and re-submitting of bulk transfers. Buffered bulk mode is necessary for reliable operation with the bulk in endpoints of usb to serial convertors. Unfortunatelty buffered bulk input mode will only work with certain devices, therefor this patch also adds a usb-id table to enable it for devices which need it, while leaving the bulk ep handling for other devices unmodified. Note that the bumping of the required usbredir from 0.5.3 to 0.6 does not mean that we will now need a newer usbredir release then qemu-1.3, .pc files reporting 0.5.3 have only ever existed in usbredir builds directly from git, so qemu-1.3 needs the 0.6 release too. Changes in v2: -Split of quirk handling into quirks.c Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2013-01-07PPC: Bring EPR support closer to realityAlexander Graf2-2/+23
We already used to support the external proxy facility of FSL MPICs, but only implemented it halfway correctly. This patch adds support for * dynamic enablement of the EPR facility * interrupt acknowledgement only when the interrupt is delivered This way the implementation now is closer to real hardware. Signed-off-by: Alexander Graf <agraf@suse.de>
2013-01-07PPC: KVM: set has-idle in guest device treeStuart Yoder1-0/+4
On e500mc, the platform doesn't provide a way for the CPU to go idle. To still not uselessly burn CPU time, expose an idle hypercall to the guest if kvm supports it. Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com> [agraf: adjust for current code base, add patch description, fix non-kvm case] Signed-off-by: Alexander Graf <agraf@suse.de>
2013-01-07openpic: fix CTPR and de-assertion of interruptsScott Wood1-58/+123
Properly implement level-triggered interrupts by withdrawing an interrupt from the raised queue if the interrupt source de-asserts. Also withdraw from the raised queue if the interrupt becomes masked. When CTPR is written, check whether we need to raise or lower the interrupt output. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-01-07openpic: move IACK to its own functionScott Wood1-42/+53
Besides making the code cleaner, we will need a separate way to access IACK in order to implement EPR (external proxy) interrupt delivery. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-01-07openpic: IRQ_check: search the queue a word at a timeScott Wood1-12/+16
Search the queue more efficiently by first looking for a non-zero word, and then using the common bit-searching function to find the bit within the word. It would be even nicer if bitops_ffsl() could be hooked up to the compiler intrinsic so that bit-searching instructions could be used, but that's another matter. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-01-07openpic: fix sense and priority bitsScott Wood1-6/+71
Previously, the sense and priority bits were masked off when writing to IVPR, and all interrupts were treated as edge-triggered (despite the existence of code for handling level-triggered interrupts). Polarity is implemented only as storage. We don't simulate the bad effects that you'd get on real hardware if you set this incorrectly, but at least the guest sees the right thing when it reads back the register. Sense now controls level/edge on FSL external interrupts (and all interrupts on non-FSL MPIC). FSL internal interrupts do not have a sense bit (reads as zero), but are level. FSL timers and IPIs do not have sense or polarity bits (read as zero), and are edge-triggered. To accommodate FSL internal interrupts, QEMU's internal notion of whether an interrupt is level-triggered is separated from the IVPR bit. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-01-07openpic: add some bounds checking for IRQ numbersScott Wood1-0/+11
The two checks with abort() guard against potential QEMU-internal problems, but the EOI check stops the guest from causing updates to queue position -1 and other havoc if it writes EOI with no interrupt in service. Signed-off-by: Scott Wood <scottwood@freescale.com> [agraf: remove hunk in code that didn't get applied yet] Signed-off-by: Alexander Graf <agraf@suse.de>
2013-01-07openpic: use standard bitmap operationsScott Wood1-26/+29
Besides the private implementation being redundant, namespace collisions prevented the use of other things in bitops.h. Serialization does get a bit more awkward, unfortunately, since the standard bitmap operations are "unsigned long" rather than "uint32_t", though in exchange we will get faster queue lookups on 64-bit hosts once we search a word at a time. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-01-07Revert "openpic: Accelerate pending irq search"Scott Wood1-11/+0
This reverts commit a9bd83f4c65de0058659ede009fa1a241f379edd. This counting approach is not robust against setting a bit that was already set, or clearing a bit that was already clear. Perhaps that is considered a bug, but besides the lack of any documentation for that restriction, it's a pretty unpleasant way for the problem to manifest itself. It could be made more robust by testing the current value of the bit before changing the count, but a later patch speeds up IRQ_check in all cases, not just when there's nothing pending. Hopefully that should be adequate to address performance concerns. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-01-07openpic: always call IRQ_check from IRQ_get_nextScott Wood1-7/+3
Previously the code relied on the queue's "next" field getting set to -1 sometime between an update to the bitmap, and the next call to IRQ_get_next. Sometimes this happened after the update. Sometimes it happened before the check. Sometimes it didn't happen at all. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-01-07openpic/fsl: critical interrupts ignore mask before v4.1Scott Wood1-1/+4
Signed-off-by: Scott Wood <scottwood@freescale.com> [agraf: make bool :1] Signed-off-by: Alexander Graf <agraf@suse.de>
2013-01-07openpic: make ctpr signedScott Wood1-3/+3
Other priorities are signed, so avoid comparisons between signed and unsigned. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-01-07openpic: rework critical interrupt supportScott Wood1-34/+76
Critical interrupts on FSL MPIC are not supposed to pay attention to priority, IACK, EOI, etc. On the currently modeled version it's not supposed to pay attention to the mask bit either. Also reorganize to make it easier to implement newer FSL MPIC models, which encode interrupt level information differently and support mcheck as well as crit, and to reduce problems for later patches in this set. Still missing is the ability to lower the CINT signal to the core, as IACK/EOI is not used. This will come with general IRQ-source-driven lowering in the next patch. New state is added which is not serialized, but instead is recomputed in openpic_load() by calling the appropriate write_IRQreg function. This should have the side effect of causing the IRQ outputs to be raised appropriately on load, which was missing. The serialization format is altered by swapping ivpr and idr (we'd like IDR to be restored before we run the IVPR logic), and moving interrupts to the end (so that other state has been restored by the time we run the IDR/IVPR logic. Serialization for this driver is not yet in a state where backwards compatibility is reasonable (assuming it works at all), and the current serialization format was not built for extensibility. Signed-off-by: Scott Wood <scottwood@freescale.com> [agraf: fix for current code state] Signed-off-by: Alexander Graf <agraf@suse.de>
2013-01-07openpic: make register names correspond better with hw docsScott Wood1-178/+178
The base openpic specification doesn't provide abbreviated register names, so it's somewhat understandable that the QEMU code made up its own, except that most of the names that QEMU used didn't correspond to the terminology used by any implementation I could find. In some cases, like PCTP, the phrase "processor current task priority" could be found in the openpic spec when describing the concept, but the register itself was labelled "current task priority register" and every implementation seems to use either CTPR or the full phrase. In other cases, individual implementations disagree on what to call the register. The implementations I have documentation for are Freescale, Raven (MCP750), and IBM. The Raven docs tend to not use abbreviations at all. The IBM MPIC isn't implemented in QEMU. Thus, where there's disagreement I chose to use the Freescale abbreviations. Signed-off-by: Scott Wood <scottwood@freescale.com> [agraf: rebase on current state of the code] Signed-off-by: Alexander Graf <agraf@suse.de>
2013-01-07openpic: lower interrupt when reading the MSI registerScott Wood1-0/+1
This will stop things from breaking once it's properly treated as a level-triggered interrupt. Note that it's the MPIC's MSI cascade interrupts that are level-triggered; the individual MSIs are edge-triggered. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-01-07openpic: fix debug printsScott Wood1-17/+27
Fix various format errors when debug prints are enabled. Also cause error checking to happen even when debug prints are not enabled, and consistently use 0x for hex output. Signed-off-by: Scott Wood <scottwood@freescale.com> [agraf: adjust for more recent code base, prettify DPRINTF macro] Signed-off-by: Alexander Graf <agraf@suse.de>
2013-01-07PPC: Reset qemu timers when guest resetBharat Bhushan1-0/+13
This patch install the timer reset handler. This will be called when the guest is reset. Signed-off-by: Bharat Bhushan <bharat.bhushan@freescale.com> [agraf: adjust for QOM'ification] Signed-off-by: Alexander Graf <agraf@suse.de>
2013-01-07openpic: fix coding style issuesAlexander Graf1-45/+55
This patch fixes the following coding style violations: - structs have to be typedef and be CamelCase - if()s are always surrounded by curly braces Signed-off-by: Alexander Graf <agraf@suse.de>
2013-01-07openpic: don't crash on a register access without a CPU contextScott Wood1-1/+15
If we access a register via the QEMU memory inspection commands (e.g. "xp") rather than from guest code, we won't have a CPU context. Gracefully fail to access the register in that case, rather than crashing. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-01-07openpic: s/opp->nb_irqs -1/opp->nb_cpus - 1/Scott Wood1-2/+2
"opp->nb_irqs-1" would have been a minor coding style error, but putting in one space but not the other makes it look confusingly like a numeric literal "-1". Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-01-07openpic: BRR1 is not a CPU-specific register.Scott Wood1-3/+2
It's in the address range that normally contains a magic redirection to the CPU-specific region of the curretn CPU, but it isn't actually a per-CPU register. On real hardware BRR1 shows up only at 0x40000, not at 0x60000 or other non-magic per-CPU areas. Plus, this makes it possible to read the register on the QEMU command line with "xp". Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-01-07openpic: support large vectors on FSL mpicScott Wood1-12/+10
Previously only the spurious vector was sized appropriately to the openpic model. Also, instances of "IPVP_VECTOR(opp->spve)" were replace with just "opp->spve", as opp->spve is already just a vector and not an IVPR. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-01-07openpic: remove pcsr (CPU sensitivity register)Scott Wood1-4/+0
I could not find this register in any spec (FSL, IBM, or OpenPIC) and the code doesn't do anything with it but initialize, save, or restore it. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-01-07openpic: symbolicize some magic numbersScott Wood1-22/+32
Deefine symbolic names for some register bits, and use some that have already been defined. Also convert some register values from hex to decimal when it improves readability. IPVP_PRIORITY_MASK is corrected from (0x1F << 16) to (0xF << 16), in conjunction with making wider use of the symbolic name. I looked at Freescale and IBM MPIC docs and at the base OpenPIC spec, and all three had priority as 4 bits rather than 5. Plus, the magic nubmer that is being replaced with symbolic values treated the field as 4 bits wide. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-01-07exynos4210: Add EHCI supportLiming Wang2-1/+8
Add EHCI USB host controller to exynos4210. Signed-off-by: Liming Wang <walimisdev@gmail.com> Signed-off-by: Andreas Färber <andreas.faerber@web.de> Reviewed-by: Igor Mitsyanko <i.mitsyanko@samsung.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2013-01-07usb/ehci: Add SysBus EHCI device for Exynos4210Andreas Färber2-0/+17
It uses a different capsbase and opregbase than the Xilinx device. Signed-off-by: Liming Wang <walimisdev@gmail.com> Signed-off-by: Andreas Färber <andreas.faerber@web.de> Cc: Igor Mitsyanko <i.mitsyanko@samsung.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2013-01-07usb/ehci: Move capsbase and opregbase into SysBus EHCI classAndreas Färber2-2/+26
This allows specific derived models to use different values. Signed-off-by: Andreas Färber <andreas.faerber@web.de> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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