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2020-01-08ppc/pnv: check return value of blk_pwrite()Cédric Le Goater1-2/+6
When updating the PNOR file contents, we should check for a possible failure of blk_pwrite(). Fixes Coverity issue CID 1412228. Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20200107171809.15556-2-clg@kaod.org> Reviewed-by: Greg Kurz <groug@kaod.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2020-01-08pnv/psi: Consolidate some duplicated code in pnv_psi_realize()Greg Kurz1-7/+12
The proper way to do that would be to use device_class_set_parent_realize(), but defining a Pnv8PsiClass and a Pnv9PsiClass types with a parent_realize pointer adds a fair amount of code. Calling pnv_psi_realize() explicitely is fine for now. This should probably be achieved with a device realize hook in the PSI base class and device_class_set_parent_realize() in the children classes. Signed-off-by: Greg Kurz <groug@kaod.org> Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <157841476667.66386.13659183399113837990.stgit@bahia.tlslab.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2020-01-08pnv/psi: Add device reset hookGreg Kurz1-4/+11
And call it from a QEMU reset handler. This allows each PNV child class to override the reset hook if needed, eg. POWER8 doesn't but POWER9 does. The proper way to do that would be to use device_class_set_parent_reset(), but defining a Pnv8PsiClass and a Pnv9PsiClass types with a parent_reset pointer adds a fair amount of code. Calling pnv_psi_reset() explicitely is fine for now. A subsequent patch will consolidate the call to qemu_register_reset() in a single place. Signed-off-by: Greg Kurz <groug@kaod.org> Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <157841476035.66386.17838417527621752518.stgit@bahia.tlslab.ibm.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2020-01-08pnv/xive: Deduce the PnvXive pointer from XiveTCTX::xptrGreg Kurz2-20/+2
And use it instead of reaching out to the machine. This allows to get rid of pnv_get_chip(). Signed-off-by: Greg Kurz <groug@kaod.org> Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20200106145645.4539-11-clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2020-01-08spapr/xive: Deduce the SpaprXive pointer from XiveTCTX::xptrGreg Kurz1-5/+4
And use it instead of reaching out to the machine. This allows to get rid of a call to qdev_get_machine() and to reduce the scope of another one so that it is only used within the argument list of error_append_hint(). This is an acceptable tradeoff compared to all it would require to know about the maximum number of CPUs here without calling qdev_get_machine(). Signed-off-by: Greg Kurz <groug@kaod.org> Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20200106145645.4539-10-clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2020-01-08xive: Add a "presenter" link property to the TCTX objectCédric Le Goater3-3/+8
This will be used in subsequent patches to access the XIVE associated to a TCTX without reaching out to the machine through qdev_get_machine(). Signed-off-by: Cédric Le Goater <clg@kaod.org> [ groug: - split patch - write subject and changelog ] Signed-off-by: Greg Kurz <groug@kaod.org> Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20200106145645.4539-9-clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2020-01-08ppc/pnv: Add a "pnor" const link property to the BMC internal simulatorGreg Kurz2-4/+6
This allows to get rid of a call to qdev_get_machine(). Signed-off-by: Greg Kurz <groug@kaod.org> Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20200106145645.4539-8-clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2020-01-08ppc/pnv: Add an "nr-threads" property to the base chip classGreg Kurz1-3/+5
Set it at chip creation and forward it to the cores. This allows to drop a call to qdev_get_machine(). Signed-off-by: Greg Kurz <groug@kaod.org> Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Message-Id: <20200106145645.4539-7-clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2020-01-08xive: Use the XIVE fabric link under the XIVE routerGreg Kurz1-3/+11
Now that the spapr and pnv machines do set the "xive-fabric" link, the use of the XIVE fabric pointer becomes mandatory. This is checked with an assert() in a new realize hook. Since the XIVE router is realized at machine init for the all the machine's life time, no risk to abort an already running guest (ie. not a hotplug path). This gets rid of a qdev_get_machine() call. Signed-off-by: Greg Kurz <groug@kaod.org> Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20200106145645.4539-6-clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2020-01-08spapr, pnv, xive: Add a "xive-fabric" link to the XIVE routerGreg Kurz3-0/+16
In order to get rid of qdev_get_machine(), first add a pointer to the XIVE fabric under the XIVE router and make it configurable through a QOM link property. Configure it in the spapr and pnv machine. In the case of pnv, the XIVE routers are under the chip, so this is done with a QOM alias property of the POWER9 pnv chip. Signed-off-by: Greg Kurz <groug@kaod.org> Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20200106145645.4539-5-clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2020-01-08pnv/xive: Use device_class_set_parent_realize()Greg Kurz1-0/+10
The XIVE router base class currently inherits an empty realize hook from the sysbus device base class, but it will soon implement one of its own to perform some sanity checks. Do the preliminary plumbing to have it called. Signed-off-by: Greg Kurz <groug@kaod.org> Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Message-Id: <20200106145645.4539-4-clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2020-01-08ppc/pnv: Introduce a "xics" property under the POWER8 chipCédric Le Goater1-5/+19
POWER8 is the only chip using the XICS interface. Add a "xics" link and a XICSFabric attribute under this chip to remove the use of qdev_get_machine() Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Greg Kurz <groug@kaod.org> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Message-Id: <20200106145645.4539-3-clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2020-01-08ppc/pnv: Introduce a "xics" property alias under the PSI modelCédric Le Goater2-11/+4
This removes the need of the intermediate link under PSI to pass the XICS link to the underlying ICSState object. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Greg Kurz <groug@kaod.org> Message-Id: <20200106145645.4539-2-clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2020-01-08spapr/xive: remove redundant check in spapr_match_nvt()Cédric Le Goater1-4/+4
spapr_match_nvt() is a XIVE operation and is used by the machine to look for a matching target when an event notification is being delivered. An assert checks that spapr_match_nvt() is called only when the machine has selected the XIVE interrupt mode but it is redundant with the XIVE_PRESENTER() dynamic cast. Apply the cast to spapr->active_intc and remove the assert. Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20200106163207.4608-1-clg@kaod.org> Reviewed-by: Greg Kurz <groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2020-01-08ppc/pnv: Drop "num-chips" machine propertyGreg Kurz1-50/+12
The number of CPU chips of the powernv machine is configurable through a "num-chips" property. This doesn't fit well with the CPU topology, eg. some configurations can come up with more CPUs than the maximum of CPUs set in the toplogy. This causes assertion to be hit with mttcg: -machine powernv,num-chips=2 -smp cores=2 -accel tcg,thread=multi ERROR: tcg/tcg.c:789:tcg_register_thread: assertion failed: (n < ms->smp.max_cpus) Aborted (core dumped) Mttcg mandates the CPU topology to be dimensioned to the actual number of CPUs, depending on the number of chips the user asked for. That is, '-machine num-chips=N' should always have a '-smp' companion with a topology that meats the resulting number of CPUs, typically '-smp sockets=N'. It thus seems that "num-chips" doesn't bring anything but forcing the user to specify the requested number of chips on the command line twice. Simplify the command line by computing the number of chips based on the CPU topology exclusively. The powernv machine isn't a production thing ; it is mostly used by developpers to prepare the bringup of real HW. Because of this and for simplicity, this deliberately ignores the official deprecation process and dumps "num-chips" right away : '-smp sockets=N' is now the only way to control the number of CPU chips. This is done at machine init because smp_parse() is called after instance init. Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <157830658266.533764.2214183961444213947.stgit@bahia.lan> Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2020-01-08ppc440_bamboo.c: remove label from bamboo_load_device_tree()Daniel Henrique Barboza1-6/+2
'out' label can be replaced by 'return -1' in all cases. CC: David Gibson <david@gibson.dropbear.id.au> CC: qemu-ppc@nongnu.org Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-Id: <20200106182425.20312-3-danielhb413@gmail.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2020-01-08spapr.c: remove 'out' label in spapr_dt_cas_updates()Daniel Henrique Barboza1-6/+3
'out' can be replaced by 'return' with the appropriate return value. CC: David Gibson <david@gibson.dropbear.id.au> CC: qemu-ppc@nongnu.org Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-Id: <20200106182425.20312-2-danielhb413@gmail.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2020-01-08spapr/xive: Use device_class_set_parent_realize()Greg Kurz1-1/+11
The XIVE router base class currently inherits an empty realize hook from the sysbus device base class, but it will soon implement one of its own to perform some sanity checks. Do the preliminary plumbing to have it called. Signed-off-by: Greg Kurz <groug@kaod.org> Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20191219181155.32530-6-clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2020-01-08mos6522: remove anh registerLaurent Vivier1-8/+8
Register addr 1 is defined as buffer A with handshake (vBufAH), register addr 15 is also defined as buffer A without handshake (vBufA). As both addresses access the same register, remove the definition of 'anh' and use only 'a' (with VIA_REG_ANH and VIA_REG_A). Fixes: 51f233ec92cd ("misc: introduce new mos6522 VIA device and enable it for ppc builds") Signed-off-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20191220214054.76525-1-laurent@vivier.eu> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2020-01-08ppc/pnv: Modify the powerdown notifier to get the PowerNV machineCédric Le Goater1-1/+1
Use container_of() instead of qdev_get_machine() Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Greg Kurz <groug@kaod.org> Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20191219181155.32530-2-clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2020-01-08ppc/spapr: Support reboot of secure pseries guestBharata B Rao1-0/+1
A pseries guest can be run as a secure guest on Ultravisor-enabled POWER platforms. When such a secure guest is reset, we need to release/reset a few resources both on ultravisor and hypervisor side. This is achieved by invoking this new ioctl KVM_PPC_SVM_OFF from the machine reset path. As part of this ioctl, the secure guest is essentially transitioned back to normal mode so that it can reboot like a regular guest and become secure again. This ioctl has no effect when invoked for a normal guest. If this ioctl fails for a secure guest, the guest is terminated. Signed-off-by: Bharata B Rao <bharata@linux.ibm.com> Message-Id: <20191219031445.8949-3-bharata@linux.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2020-01-07Merge remote-tracking branch 'remotes/elmarco/tags/prop-ptr-pull-request' ↵Peter Maydell35-308/+383
into staging Clean-ups: qom-ify serial and remove QDEV_PROP_PTR Hi, QDEV_PROP_PTR is marked in multiple places as "FIXME/TODO/remove me". In most cases, it can be easily replaced with QDEV_PROP_LINK when the pointer points to an Object. There are a few places where such substitution isn't possible. For those places, it seems reasonable to use a specific setter method instead, and keep the user_creatable = false. In other places, proper usage of qdev or other facilies is the solution. The serial code wasn't converted to qdev, which makes it a bit more archaic to deal with. Let's convert it first, so we can more easily embed it from other devices, and re-export some properties and drop QDEV_PROP_PTR usage. # gpg: Signature made Tue 07 Jan 2020 15:01:26 GMT # gpg: using RSA key 87A9BD933F87C606D276F62DDAE8E10975969CE5 # gpg: issuer "marcandre.lureau@redhat.com" # gpg: Good signature from "Marc-André Lureau <marcandre.lureau@redhat.com>" [full] # gpg: aka "Marc-André Lureau <marcandre.lureau@gmail.com>" [full] # Primary key fingerprint: 87A9 BD93 3F87 C606 D276 F62D DAE8 E109 7596 9CE5 * remotes/elmarco/tags/prop-ptr-pull-request: (37 commits) qdev/qom: remove some TODO limitations now that PROP_PTR is gone qdev: remove QDEV_PROP_PTR qdev: remove PROP_MEMORY_REGION omap-gpio: remove PROP_PTR omap-i2c: remove PROP_PTR omap-intc: remove PROP_PTR smbus-eeprom: remove PROP_PTR cris: improve passing PIC interrupt vector to the CPU mips/cps: fix setting saar property qdev: use g_strcmp0() instead of open-coding it leon3: use qdev gpio facilities for the PIL leon3: use qemu_irq framework instead of callback as property dp8393x: replace PROP_PTR with PROP_LINK etraxfs: remove PROP_PTR usage lance: replace PROP_PTR with PROP_LINK vmmouse: replace PROP_PTR with PROP_LINK sm501: make SerialMM a child, export chardev property mips: use sysbus_mmio_get_region() instead of internal fields mips: use sysbus_add_io() mips: baudbase is 115200 by default ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-01-07Merge remote-tracking branch 'remotes/vivier/tags/q800-for-5.0-pull-request' ↵Peter Maydell3-84/+309
into staging m68k: fix CACR valid bits q800: add a fake mac rom reset (used by linux) fix and improve PRAM emulation # gpg: Signature made Tue 07 Jan 2020 13:25:50 GMT # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C # gpg: issuer "laurent@vivier.eu" # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full] # gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full] # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full] # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * remotes/vivier/tags/q800-for-5.0-pull-request: target/m68k: only change valid bits in CACR q800: implement mac rom reset function for BIOS-less mode q800: add a block backend to the PRAM q800: fix mac_via RTC PRAM commands Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-01-07Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into stagingPeter Maydell24-78/+927
virtio, pci, pc: fixes, features Bugfixes all over the place. HMAT support. New flags for vhost-user-blk utility. Auto-tuning of seg max for virtio storage. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # gpg: Signature made Mon 06 Jan 2020 17:05:05 GMT # gpg: using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469 # gpg: issuer "mst@redhat.com" # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [full] # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" [full] # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * remotes/mst/tags/for_upstream: (32 commits) intel_iommu: add present bit check for pasid table entries intel_iommu: a fix to vtd_find_as_from_bus_num() virtio-net: delete also control queue when TX/RX deleted virtio: reset region cache when on queue deletion virtio-mmio: update queue size on guest write tests: add virtio-scsi and virtio-blk seg_max_adjust test virtio: make seg_max virtqueue size dependent hw: fix using 4.2 compat in 5.0 machine types for i440fx/q35 vhost-user-scsi: reset the device if supported vhost-user: add VHOST_USER_RESET_DEVICE to reset devices hw/pci/pci_host: Let pci_data_[read/write] use unsigned 'size' argument hw/pci/pci_host: Remove redundant PCI_DPRINTF() virtio-mmio: Clear v2 transport state on soft reset ACPI: add expected files for HMAT tests (acpihmat) tests/bios-tables-test: add test cases for ACPI HMAT tests/numa: Add case for QMP build HMAT hmat acpi: Build Memory Side Cache Information Structure(s) hmat acpi: Build System Locality Latency and Bandwidth Information Structure(s) hmat acpi: Build Memory Proximity Domain Attributes Structure(s) numa: Extend CLI to provide memory side cache information ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-01-07virtio-console: Explicit we ignore some QEMUChrEvent in IOEventHandlerPhilippe Mathieu-Daudé1-0/+5
The Chardev events are listed in the QEMUChrEvent enum. To be able to use this enum in the IOEventHandler typedef, we need to explicit all the events ignored by this frontend, to silent the following GCC warning: CC hw/char/virtio-console.o hw/char/virtio-console.c: In function ‘chr_event’: hw/char/virtio-console.c:154:5: error: enumeration value ‘CHR_EVENT_BREAK’ not handled in switch [-Werror=switch] 154 | switch (event) { | ^~~~~~ hw/char/virtio-console.c:154:5: error: enumeration value ‘CHR_EVENT_MUX_IN’ not handled in switch [-Werror=switch] hw/char/virtio-console.c:154:5: error: enumeration value ‘CHR_EVENT_MUX_OUT’ not handled in switch [-Werror=switch] cc1: all warnings being treated as errors Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20191218172009.8868-11-philmd@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-01-07vhost-user-blk: Explicit we ignore few QEMUChrEvent in IOEventHandlerPhilippe Mathieu-Daudé1-0/+5
The Chardev events are listed in the QEMUChrEvent enum. To be able to use this enum in the IOEventHandler typedef, we need to explicit all the events ignored by this frontend, to silent the following GCC warning: CC s390x-softmmu/hw/block/vhost-user-blk.o hw/block/vhost-user-blk.c: In function ‘vhost_user_blk_event’: hw/block/vhost-user-blk.c:370:5: error: enumeration value ‘CHR_EVENT_BREAK’ not handled in switch [-Werror=switch] 370 | switch (event) { | ^~~~~~ hw/block/vhost-user-blk.c:370:5: error: enumeration value ‘CHR_EVENT_MUX_IN’ not handled in switch [-Werror=switch] hw/block/vhost-user-blk.c:370:5: error: enumeration value ‘CHR_EVENT_MUX_OUT’ not handled in switch [-Werror=switch] cc1: all warnings being treated as errors Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20191218172009.8868-10-philmd@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-01-07ccid-card-passthru: Explicit we ignore QEMUChrEvent in IOEventHandlerPhilippe Mathieu-Daudé1-0/+5
The Chardev events are listed in the QEMUChrEvent enum. To be able to use this enum in the IOEventHandler typedef, we need to explicit all the events ignored by this frontend, to silent the following GCC warning: hw/usb/ccid-card-passthru.c: In function ‘ccid_card_vscard_event’: hw/usb/ccid-card-passthru.c:314:5: error: enumeration value ‘CHR_EVENT_MUX_IN’ not handled in switch [-Werror=switch] 314 | switch (event) { | ^~~~~~ hw/usb/ccid-card-passthru.c:314:5: error: enumeration value ‘CHR_EVENT_MUX_OUT’ not handled in switch [-Werror=switch] hw/usb/ccid-card-passthru.c:314:5: error: enumeration value ‘CHR_EVENT_CLOSED’ not handled in switch [-Werror=switch] cc1: all warnings being treated as errors Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20191218172009.8868-7-philmd@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-01-07hw/usb/redirect: Explicit we ignore few QEMUChrEvent in IOEventHandlerPhilippe Mathieu-Daudé1-0/+5
The Chardev events are listed in the QEMUChrEvent enum. To be able to use this enum in the IOEventHandler typedef, we need to explicit all the events ignored by this frontend, to silent the following GCC warning: CC hw/usb/redirect.o hw/usb/redirect.c: In function ‘usbredir_chardev_event’: hw/usb/redirect.c:1361:5: error: enumeration value ‘CHR_EVENT_BREAK’ not handled in switch [-Werror=switch] 1361 | switch (event) { | ^~~~~~ hw/usb/redirect.c:1361:5: error: enumeration value ‘CHR_EVENT_MUX_IN’ not handled in switch [-Werror=switch] hw/usb/redirect.c:1361:5: error: enumeration value ‘CHR_EVENT_MUX_OUT’ not handled in switch [-Werror=switch] cc1: all warnings being treated as errors Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20191218172009.8868-6-philmd@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-01-07hw/usb/dev-serial: Explicit we ignore few QEMUChrEvent in IOEventHandlerPhilippe Mathieu-Daudé1-0/+4
The Chardev events are listed in the QEMUChrEvent enum. To be able to use this enum in the IOEventHandler typedef, we need to explicit all the events ignored by this frontend, to silent the following GCC warning: hw/usb/dev-serial.c: In function ‘usb_serial_event’: hw/usb/dev-serial.c:468:5: error: enumeration value ‘CHR_EVENT_MUX_IN’ not handled in switch [-Werror=switch] 468 | switch (event) { | ^~~~~~ hw/usb/dev-serial.c:468:5: error: enumeration value ‘CHR_EVENT_MUX_OUT’ not handled in switch [-Werror=switch] cc1: all warnings being treated as errors Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20191218172009.8868-5-philmd@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-01-07hw/char/terminal3270: Explicit ignored QEMUChrEvent in IOEventHandlerPhilippe Mathieu-Daudé1-0/+5
The Chardev events are listed in the QEMUChrEvent enum. To be able to use this enum in the IOEventHandler typedef, we need to explicit all the events ignored by this frontend, to silent the following GCC warning: CC s390x-softmmu/hw/char/terminal3270.o hw/char/terminal3270.c: In function ‘chr_event’: hw/char/terminal3270.c:156:5: error: enumeration value ‘CHR_EVENT_BREAK’ not handled in switch [-Werror=switch] 156 | switch (event) { | ^~~~~~ hw/char/terminal3270.c:156:5: error: enumeration value ‘CHR_EVENT_MUX_IN’ not handled in switch [-Werror=switch] hw/char/terminal3270.c:156:5: error: enumeration value ‘CHR_EVENT_MUX_OUT’ not handled in switch [-Werror=switch] cc1: all warnings being treated as errors Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Cornelia Huck <cohuck@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20191218172009.8868-4-philmd@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-01-07hw/ipmi: Explicit we ignore some QEMUChrEvent in IOEventHandlerPhilippe Mathieu-Daudé1-0/+6
The Chardev events are listed in the QEMUChrEvent enum. To be able to use this enum in the IOEventHandler typedef, we need to explicit all the events ignored by this frontend, to silent the following GCC warning: hw/ipmi/ipmi_bmc_extern.c: In function ‘chr_event’: hw/ipmi/ipmi_bmc_extern.c:389:5: error: enumeration value ‘CHR_EVENT_BREAK’ not handled in switch [-Werror=switch] 389 | switch (event) { | ^~~~~~ hw/ipmi/ipmi_bmc_extern.c:389:5: error: enumeration value ‘CHR_EVENT_MUX_IN’ not handled in switch [-Werror=switch] hw/ipmi/ipmi_bmc_extern.c:389:5: error: enumeration value ‘CHR_EVENT_MUX_OUT’ not handled in switch [-Werror=switch] cc1: all warnings being treated as errors Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Acked-by: Corey Minyard <cminyard@mvista.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20191218172009.8868-3-philmd@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-01-07hw/ipmi: Remove unnecessary declarationsPhilippe Mathieu-Daudé1-4/+0
Since we don't use these methods before defining them, no need to forward-declare them. Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Acked-by: Corey Minyard <cminyard@mvista.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20191218172009.8868-2-philmd@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-01-07qdev/qom: remove some TODO limitations now that PROP_PTR is goneMarc-André Lureau1-8/+0
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com>
2020-01-07qdev: remove QDEV_PROP_PTRMarc-André Lureau1-18/+0
No longer used in the tree. The comment about user_creatable is still quite relevant, but there is already a similar comment in qdev-core.h. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
2020-01-07omap-gpio: remove PROP_PTRMarc-André Lureau3-34/+23
Since clocks are not QOM objects, replace PROP_PTR of clocks with setters methods. Move/adapt the existing TODO comment about a clock framework. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2020-01-07omap-i2c: remove PROP_PTRMarc-André Lureau3-12/+17
Since clocks are not QOM objects, replace PROP_PTR of clocks with setters methods. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Corey Minyard <cminyard@mvista.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2020-01-07omap-intc: remove PROP_PTRMarc-André Lureau3-11/+14
Since clocks are not QOM objects, replace PROP_PTR of clocks with setters methods. (in theory there should probably be different methods for omap1 & omap2 intc, but this is left as a future improvement) Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2020-01-07smbus-eeprom: remove PROP_PTRMarc-André Lureau1-9/+9
Instead, set the initial data field directly. (the initial data is an array of 256 bytes. As I don't know if it may change over time, I keep the pointer to original buffer as is, but it might be worth to consider to copy it instead) Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Corey Minyard <cminyard@mvista.com>
2020-01-07cris: improve passing PIC interrupt vector to the CPUMarc-André Lureau2-29/+1
Instead of accessing cpu interrupt vector directly from PIC, send the vector value over the qemu_irq. Suggested-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2020-01-07mips/cps: fix setting saar propertyMarc-André Lureau1-1/+1
There is no "saar" property. Note: I haven't been able to test this code. Help welcome. May fix commit 043715d1e0fbb3e3411be3f898c5b77b7f90327a ("target/mips: Update ITU to utilize SAARI and SAAR CP0 registers") Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2020-01-07qdev: use g_strcmp0() instead of open-coding itMarc-André Lureau1-5/+2
Minor code simplification. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2020-01-07leon3: use qdev gpio facilities for the PILMarc-André Lureau1-2/+4
As Peter Maydell once said: "Creating a gpio pin on some object that isn't yourself looks a bit odd, but all this leon3 code is modifying the CPU object from the outside anyway. Someday we might tidy it up, but not today." Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2020-01-07leon3: use qemu_irq framework instead of callback as propertyMarc-André Lureau2-35/+13
"set_pin_in" property is used to define a callback mechanism where the device says "call the callback function, passing it an opaque cookie and a 32-bit value". We already have a generic mechanism for doing that, which is the qemu_irq. So we should just use that. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: KONRAD Frederic <frederic.konrad@adacore.com>
2020-01-07dp8393x: replace PROP_PTR with PROP_LINKMarc-André Lureau3-6/+7
Link property is the correct way to pass a MemoryRegion to a device for DMA purposes. Sidenote: as a sysbus device, this remains non-usercreatable even though we can drop the specific flag here. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Tested-by: Laurent Vivier <laurent@vivier.eu>
2020-01-07etraxfs: remove PROP_PTR usageMarc-André Lureau1-11/+33
etraxfs_dma_client are not Object, so can't be exposed to user with QOM path. Let's remove property usage and move the constructor to the .c unit, simplifying some code on the way. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
2020-01-07lance: replace PROP_PTR with PROP_LINKMarc-André Lureau4-6/+5
The device remains non-user creatable since it is a sysbus device. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2020-01-07vmmouse: replace PROP_PTR with PROP_LINKMarc-André Lureau3-13/+9
While at it, use the expected type. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2020-01-07sm501: make SerialMM a child, export chardev propertyMarc-André Lureau2-9/+22
Embed the SerialMM sybus device, and re-export its "chardev" property. That way, we can get rid of PROP_PTR "chr-state" and better track devices relationship. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
2020-01-07mips: use sysbus_mmio_get_region() instead of internal fieldsMarc-André Lureau2-1/+3
Register the memory region with sysbus_init_mmio() and look it up with sysbus_mmio_get_region() to avoid accessing internal device fields. Suggested-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2020-01-07mips: use sysbus_add_io()Marc-André Lureau1-2/+1
sysbus devices should use the associated helper function instead of calling memory_region_add_subregion() manually. This simplifies slightly the code. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>