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2012-03-30qtest: IRQ interception infrastructurePaolo Bonzini3-0/+25
Since /i440fx/piix3 is being removed from the composition tree, the IO-APIC is placed under /i440fx. This is wrong and should be changed as soon as the /i440fx/piix3 path is put back. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-03-30pl031: switch clock base to rtc_clockPaolo Bonzini1-12/+26
This lets the user specify the desired semantics. By default, the RTC will follow adjustments from the host's NTP client, and will remain in sync when the virtual machine is stopped. The previous behavior, which provides determinism with both icount and qtest, remains available with "-rtc clock=vm". pl031 supports migration, so we need to convert the time base from rtc_clock to vm_clock and back for backwards compatibility. (The rtc_clock may not be synchronized on the two machines, especially with savevm/loadvm, so the conversion is needed anyway. And since any time base will do, why not pick the one base that is backwards compatible). Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-03-30pl031: rearm alarm timer upon loadPaolo Bonzini1-15/+24
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-03-30arm: switch real-time clocks to rtc_clockPaolo Bonzini4-25/+26
This lets the user specify the desired semantics. By default, the RTC will follow adjustments from the host's NTP client. "-rtc clock=vm" will improve determinism with both icount and qtest. Finally, the previous behavior is available with "-rtc clock=rt". Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-03-30omap: switch omap_lpg to vm_clockPaolo Bonzini1-3/+3
The output of the pulse generator needs to be deterministic when running in -icount mode, and to remain constant whenever the VM is stopped. So the right clock to use is vm_clock. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-03-28Merge remote-tracking branch 'sstabellini/disk_io' into stagingAnthony Liguori1-5/+5
* sstabellini/disk_io: xen_disk: when using AIO flush after the operation is completed xen_disk: open disk with BDRV_O_NOCACHE | BDRV_O_CACHE_WB | BDRV_O_NATIVE_AIO
2012-03-27xen_disk: detach the blkdev before bdrv_deleteStefano Stabellini1-0/+1
We need to detach the blkdev from the BlockDriverState before calling bdrv_delete. Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
2012-03-27xen_console: ignore console disconnect events from console/0Stefano Stabellini1-0/+3
The first console has a different location compared to other PV devices (console, rather than device/console/0) and doesn't obey the xenstore state protocol. We already special case the first console in con_init and con_initialise, we should also do it in con_disconnect. Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
2012-03-24fix screendumpGerd Hoffmann3-7/+4
Commit 45efb16124efef51de5157afc31984b5a47700f9 optimized a bit too much. We can skip the vga_invalidate_display() in case no console switch happened because we don't need a full redraw then. We can *not* skip vga_hw_update() though, because the screen content will be stale then in case nobody else calls vga_hw_update(). Trigger: vga textmode with vnc display and no client connected. Reported-by: Avi Kivity <avi@redhat.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Alon Levy <alevy@redhat.com> Tested-by: Avi Kivity <avi@redhat.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-03-23xen_disk: when using AIO flush after the operation is completedStefano Stabellini1-3/+3
If ioreq->postsync call bdrv_flush when the AIO operation is actually completed. Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
2012-03-23xen_disk: open disk with BDRV_O_NOCACHE | BDRV_O_CACHE_WB | BDRV_O_NATIVE_AIOStefano Stabellini1-2/+2
Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
2012-03-19Merge remote-tracking branch 'sstabellini/saverestore-8' into stagingAnthony Liguori1-4/+0
* sstabellini/saverestore-8: xen: do not allocate RAM during INMIGRATE runstate xen mapcache: check if memory region has moved. xen: record physmap changes to xenstore Set runstate to INMIGRATE earlier Introduce "xen-save-devices-state" cirrus_vga: do not reset videoram Conflicts: qapi-schema.json Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-03-19Merge remote-tracking branch 'stefanha/trivial-patches' into stagingAnthony Liguori2-1/+2
* stefanha/trivial-patches: qemu-ga: for w32, fix leaked handle ov.hEvent in ga_channel_write() ioapic: fix build with DEBUG_IOAPIC .gitignore: add qemu-bridge-helper and option rom build products cleanup obsolete typedef monitor: Remove unused bool field 'qapi' in mon_cmd_t struct ds1338: Add missing break statement vnc: Fix packed boolean struct members Remove type field in ModuleEntry as it's not used
2012-03-19Merge remote-tracking branch 'spice/spice.v50' into stagingAnthony Liguori2-98/+91
* spice/spice.v50: spice: fix broken initialization hw/qxl.c: Fix compilation failures on 32 bit hosts qxl/qxl_render.c: add trace events qxl: switch qxl.c to trace-events qxl: init_pipe_signaling: exit on failure monitor: fix client_migrate_info error handling spice: set spice uuid and name
2012-03-19Merge remote-tracking branch 'bonzini/scsi-next' into stagingAnthony Liguori3-16/+53
* bonzini/scsi-next: scsi: add get_dev_path virtio-scsi: call unregister_savevm properly scsi: copy serial number into VPD page 0x83 scsi-cd: check ready condition before processing several commands get rid of CONFIG_VIRTIO_SCSI
2012-03-19scsi: add get_dev_pathPaolo Bonzini1-0/+18
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-03-19virtio-scsi: call unregister_savevm properlyPaolo Bonzini1-0/+2
This fixes a use-after-free when migrating after hot-unplug. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-03-19scsi: copy serial number into VPD page 0x83Paolo Bonzini1-3/+4
Currently QEMU passes the qdev device id to the guest in an ASCII-string designator in page 0x83. While this is fine, it does not match what real hardware does; usually the ASCII-string designator there hosts another copy of the serial number (there can be other designators, for example with a world-wide name). Do the same for QEMU SCSI disks. ATAPI does not support VPD pages, so it does not matter there. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-03-19scsi-cd: check ready condition before processing several commandsPaolo Bonzini1-13/+29
This commit is more or less obvious. What it caused is less obvious: SCSI CD drives failed to eject under Linux, though for example the "change" command worked okay. This happens because of the autoclose option in the Linux CD-ROM driver. The actual chain of events is quite complex and somehow involves udev helpers; the actual command that matters is READ TOC, though honestly it's not really clear to me how because it should always be invoked after autoclose, not before. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-03-19Merge remote-tracking branch 'qemu-kvm/memory/urgent' into stagingAnthony Liguori25-333/+445
* qemu-kvm/memory/urgent: (42 commits) memory: check for watchpoints when getting code ram_addr exec: fix write tlb entry misused as iotlb Sparc: avoid AREG0 wrappers for memory access helpers Sparc: avoid AREG0 for memory access helpers TCG: add 5 arg helpers to def-helper.h softmmu templates: optionally pass CPUState to memory access functions i386: Remove REGPARM sparc64: implement PCI and ISA irqs sparc: reset CPU state on reset apb: use normal PCI device header for PBM device w64: Fix data type of next_tb and tcg_qemu_tb_exec softfloat: fix for C99 vmstate: fix varrays with uint32_t indexes Fix large memory chunks allocation with tcg_malloc. hw/pxa2xx.c: Fix handling of pxa2xx_i2c variable offset within region hw/pxa2xx_lcd.c: drop target_phys_addr_t usage in device state hw/pxa2xx_dma.c: drop target_phys_addr_t usage in device state ARM: Remove unnecessary subpage workarounds malta: Fix display for LED array malta: Use symbolic hardware addresses ...
2012-03-19hw/qxl.c: Fix compilation failures on 32 bit hostsPeter Maydell1-8/+8
Fix compilation failures on 32 bit hosts (cast from pointer to integer of different size; %ld expects 'long int' not uint64_t). Reported-by: Steve Langasek <steve.langasek@canonical.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2012-03-19qxl/qxl_render.c: add trace eventsAlon Levy1-9/+4
Signed-off-by: Alon Levy <alevy@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2012-03-19qxl: switch qxl.c to trace-eventsAlon Levy1-72/+69
dprint is still used for qxl_init_common one time prints. also switched parts of spice-display.c over, mainly all the callbacks to spice server. All qxl device trace events start with the qxl device id. Signed-off-by: Alon Levy <alevy@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2012-03-19qxl: init_pipe_signaling: exit on failureAlon Levy1-10/+11
If pipe creation fails, exit, don't log and continue. Fix indentation at the same time. Signed-off-by: Alon Levy <alevy@redhat.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2012-03-19ioapic: fix build with DEBUG_IOAPICJason Wang1-1/+1
ioapic.c:198: error: format ‘%08x’ expects type ‘unsigned int’, but argument 3 has type ‘uint64_t’ Signed-off-by: Jason Wang <jasowang@redhat.com> Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2012-03-19ds1338: Add missing break statementStefan Weil1-0/+1
Without the break statement, case 5 sets month and year from the same data. This does not look correct. The missing break was reported by splint. Signed-off-by: Stefan Weil <sw@weilnetz.de> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2012-03-17sparc64: implement PCI and ISA irqsBlue Swirl3-32/+76
Generate correct trap for external interrupts. Map PCI and ISA IRQs to RIC/UltraSPARC-IIi interrupt vectors. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-03-17apb: use normal PCI device header for PBM deviceBlue Swirl1-1/+0
PBM has a normal PCI device header, fix. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-03-17Merge branch 'arm-devs.for-upstream' of ↵Blue Swirl11-101/+118
git://git.linaro.org/people/pmaydell/qemu-arm * 'arm-devs.for-upstream' of git://git.linaro.org/people/pmaydell/qemu-arm: hw/pxa2xx.c: Fix handling of pxa2xx_i2c variable offset within region hw/pxa2xx_lcd.c: drop target_phys_addr_t usage in device state hw/pxa2xx_dma.c: drop target_phys_addr_t usage in device state ARM: Remove unnecessary subpage workarounds hw/omap_i2c: Convert to qdev
2012-03-17Merge branch 'malta' of git://qemu.weilnetz.de/qemuBlue Swirl1-48/+36
* 'malta' of git://qemu.weilnetz.de/qemu: malta: Fix display for LED array malta: Use symbolic hardware addresses malta: Always allocate flash memory malta: Clean allocation of bios region alias
2012-03-16pci: fix double free of romfile propertyAnthony Liguori1-1/+0
The qdev property release function frees any string properties. This was resulting in a double free during hot unplug. It manifests in network devices because block devices have a NULL romfile property by default. Cc: Michael Tsirkin <mst@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-03-16hw/pxa2xx.c: Fix handling of pxa2xx_i2c variable offset within regionPeter Maydell1-2/+1
The pxa2xx I2C controller can have its registers at an arbitrary offset within the MemoryRegion it creates. We use this to create two controllers, one which covers a region of size 0x10000 with registers starting at an offset 0x1600 into that region, and a second one which covers a region of size just 0x100 with the registers starting at the base of the region. The implementation of this offsetting uses two qdev properties, "offset" (which sets the offset which must be subtracted from the address to get the offset into the actual register bank) and "size", which is the size of the MemoryRegion. We were actually using "offset" for two purposes: firstly the required one of handling the registers not being at the base of the MemoryRegion, and secondly as a workaround for a deficiency of QEMU. Until commit 5312bd8b3, if a MemoryRegion was mapped at a non-page boundary, the address passed into the read and write functions would be the offset from the start of the page, not the offset from the start of the MemoryRegion. So when calculating the value to set the "offset" qdev property we included a rounding to a page boundary. Following commit 5312bd8b3 MemoryRegion read/write functions are now correctly passed the offset from the base of the region, and our workaround now means we're subtracting too much from addresses, resulting in warnings like "pxa2xx_i2c_read: Bad register 0xffffff90". The fix for this is simply to remove the rounding to a page boundary; this allows us to slightly simplify the expression since base - (base & (~region_size)) == base & region_size The qdev property "offset" itself must remain because it is still performing its primary job of handling register banks not being at the base of the MemoryRegion. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Andreas Färber <afaerber@suse.de>
2012-03-16hw/pxa2xx_lcd.c: drop target_phys_addr_t usage in device stateMitsyanko Igor1-6/+6
Pxa2xx LCD controller is intended to work with 32-bit bus and it has no knowledge of system's physical address size, so it should not use target_phys_addr_t in it's state. Convert three variables in DMAChannel state from target_phys_addr_t to uint32_t, use VMSTATE_UINT32 instead of VMSTATE_UINTTL for these variables. We can do this safely because: 1) pxa2xx has 32-bit physical address; 2) rest of the code in file never assumes converted variables to have any size different from uint32_t; 3) we shouldn't have used VMSTATE_UINTTL in the first place because this macro is for target_ulong type (which can be different from target_phys_addr_t). Signed-off-by: Igor Mitsyanko <i.mitsyanko@samsung.com> Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-03-16hw/pxa2xx_dma.c: drop target_phys_addr_t usage in device stateMitsyanko Igor1-6/+6
Pxa2xx DMA controller is a 32-bit device and it has no knowledge of system's physical address size, so it should not use target_phys_addr_t in it's state. Convert variables descr, src and dest from type target_phys_addr_t to uint32_t, use VMSTATE_UINT32 instead of VMSTATE_UINTTL for these variables. We can do this safely because: 1) pxa2xx actually has 32-bit physical address size; 2) rest of the code in file never assumes descr, src and dest variables to have size different from uint32_t; 3) we shouldn't have used VMSTATE_UINTTL in the first place because this macro is for target_ulong type (which can be different from target_phys_addr_t). Signed-off-by: Igor Mitsyanko <i.mitsyanko@samsung.com> Reviewed-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Michael Roth <mdroth@linux.vnet.ibm.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-03-16ARM: Remove unnecessary subpage workaroundsPeter Maydell3-8/+4
In the ARM per-CPU peripherals (GIC, private timers, SCU, etc), remove workarounds for subpage memory region read/write functions being passed offsets from the start of the page rather than the start of the region. Following commit 5312bd8b3 the masking off of high bits of the address offset is now harmless but unnecessary. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Andreas Färber <afaerber@suse.de>
2012-03-16rtl8139: do the network/host communication only in normal operating modeJason Wang1-0/+9
According the spec, the card works in network/host communication mode only when both EEM1 and EEM0 are unset in 93C46 Command Register (normal op mode). So this patch check these bits before trying to receive packets. As some guest driver (such as linux, see cp_init_hw() in 8139cp.c) allocate rx ring after the recevier were enabled, this would cause our emulation codes tries to dma into guest memory when the rx descriptor is not properly configured. This patch fixes this. Signed-off-by: Jason Wang <jasowang@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2012-03-16rtl8139: correctly check the opmodeJason Wang1-3/+5
According to the spec, only when opmode is "Config. Register Write Enable" could driver write to CONFIG0,1,3,4 and bits 13,12,8 of BMCR. Currently, we allow modifying to those registers also when 8139 is in "Auto-load" mode and "93C46 (93C56) Programming" mode. This patch fixes this. Signed-off-by: Jason Wang <jasowang@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2012-03-16net: move compute_mcast_idx() to net.hJason Wang4-98/+0
Reduce duplicated codes. Signed-off-by: Jason Wang <jasowang@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2012-03-16rtl8139: support byte read to TxStatus registersJason Wang1-4/+29
Some drivers (such as win7) use byte read for TxStatus registers, so we need to support this to let guest driver behave correctly. For writing, only double-word access is allowed by spec. Signed-off-by: Jason Wang <jasowang@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2012-03-16rtl8139: remove unused marcoJason Wang1-3/+0
Signed-off-by: Jason Wang <jasowang@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2012-03-16rtl8139: limit transmission buffer size in c+ modeJason Wang1-6/+5
The tx buffer would be re-allocated for tx descriptor with big size and without LS bit set, this would make guest driver could easily let qemu to allocate unlimited. In linux host, a glib failure were easy to be triggered: GLib-ERROR **: gmem.c:176: failed to allocate 18446744071562067968 bytes This patch fix this by adding a limit. As the spec didn't tell the maximum size of buffer allowed, stick it to current CP_TX_BUFFER_SIZE (65536). Changes from V1: Drop the while statement and s->cplus_txbuffer check. Signed-off-by: Jason Wang <jasowang@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2012-03-16pci_regs: Add PCI_EXP_TYPE_PCIE_BRIDGEAnthony PERARD1-0/+1
Signed-off-by: Anthony PERARD <anthony.perard@citrix.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2012-03-16virtio-net: add DATA_VALID flagMichael S. Tsirkin1-0/+1
Add DATA_VALID flag from the Linux header, to keep us in sync with that. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2012-03-16pci_bridge: upper 32 bit are long registersMichael S. Tsirkin1-4/+4
Use pci_set_long for accesses. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2012-03-16pci: fix bridge IO/BASEMichael S. Tsirkin1-2/+2
commit 5caef97a16010f818ea8b950e2ee24ba876643ad introduced a regression: we do not make IO base/limit upper 16 bit registers writeable, so we should report a 16 bit IO range type, not a 32 bit one. Note that PCI_PREF_RANGE_TYPE_32 is 0x0, but PCI_IO_RANGE_TYPE_32 is 0x1. In particular, this broke sparc64. Note: this just reverts to behaviour prior to the commit above. Making PCI_IO_BASE_UPPER16 and PCI_IO_LIMIT_UPPER16 registers writeable should, and seems to, work just as well, but as no system seems to actually be interested in 32 bit IO, let's not make unnecessary changes. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2012-03-16pcie: drop functionality moved to coreMichael S. Tsirkin1-11/+1
Now that core sets memory type correctly, remove this code from pcie port implementation. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2012-03-16pci: set memory type for memory behind the bridgeMichael S. Tsirkin1-0/+3
As we make upper bits in IO and prefetcheable memory registers writeable, we should declare support for 64 bit prefetcheable memory and 32 bit io in the bridge. This changes the default for apb, dec, but I'm guessing they got the defaults wrong by accident. Alternatively, we could let bridges declare lack of 64 bit support and make the upper bits read-only zero. Reported-by: Gerd Hoffmann <kraxel@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2012-03-16pci: add standard bridge deviceMichael S. Tsirkin1-0/+174
This adds support for a standard pci to pci bridge, enabling support for more than 32 PCI devices in the system. Device hotplug is supported by means of SHPC controller. For guests with an SHPC driver, this allows robust hotplug and even hotplug of nested bridges, up to 31 devices per bridge. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2012-03-16slotid: add slot id capabilityMichael S. Tsirkin3-0/+57
This capability makes it possible for the guest to report a unique chassis identifier to the user. The spec also recommends making chassis indentifier persist in eeprom. This isn't implemented. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2012-03-16shpc: standard hot plug controllerMichael S. Tsirkin3-0/+735
This adds support for SHPC interface, as defined by PCI Standard Hot-Plug Controller and Subsystem Specification, Rev 1.0 http://www.pcisig.com/specifications/conventional/pci_hot_plug/SHPC_10 Only SHPC intergrated with a PCI-to-PCI bridge is supported, SHPC integrated with a host bridge would need more work. All main SHPC features are supported: - MRL sensor - Attention button - Attention indicator - Power indicator Wake on hotplug and serr generation are stubbed out but unused as we don't have interfaces to generate these events ATM. One issue that isn't completely resolved is that qemu currently expects an "eject" interface, which SHPC does not provide: it merely removes the power to device and it's up to the user to remove the device from slot. This patch works around that by ejecting the device when power is removed and power LED goes off. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>