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2019-02-25virtio-blk: Increase in_flight for request restart BHKevin Wolf1-0/+4
virtio_blk_dma_restart_bh() submits new requests, so in order to make sure that these requests are not started inside a drained section of the attached BlockBackend, we need to make sure that draining the BlockBackend waits for the BH to be executed. This BH is still questionable because its scheduled in the main thread instead of the configured iothread. Leave a FIXME comment for this. But with this fix, enabling the data plane at least waits for these requests (in bdrv_set_aio_context()) instead of changing the AioContext under their feet and making them run in the wrong thread, causing crashes and failures (e.g. due to missing locking). Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2019-02-25Merge remote-tracking branch 'remotes/kraxel/tags/vga-20190222-pull-request' ↵Peter Maydell3-30/+69
into staging vga: bugfixes and edid support for virtio-vga # gpg: Signature made Fri 22 Feb 2019 08:24:25 GMT # gpg: using RSA key 4CB6D8EED3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" [full] # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" [full] # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" [full] # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138 * remotes/kraxel/tags/vga-20190222-pull-request: display/virtio: add edid support. virtio-gpu: remove useless 'waiting' field virtio-gpu: block both 2d and 3d rendering virtio-gpu: remove unused config_size virtio-gpu: remove unused qdev Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-02-25Merge remote-tracking branch 'remotes/kraxel/tags/ui-20190222-pull-request' ↵Peter Maydell1-1/+13
into staging ui: add support for -display spice-app ui: gtk+sdl bugfixes. # gpg: Signature made Fri 22 Feb 2019 07:53:13 GMT # gpg: using RSA key 4CB6D8EED3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" [full] # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" [full] # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" [full] # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138 * remotes/kraxel/tags/ui-20190222-pull-request: display: add -display spice-app launching a Spice client spice: use a default name for the server qapi: document DisplayType enum build-sys: add gio-2.0 check char: register spice ports after spice started char: move SpiceChardev and open_spice_port() to spice.h header spice: do not stop spice if VM is paused spice: merge options lists spice: avoid spice runtime assert char/spice: discard write() if backend is disconnected char/spice: trigger HUP event ui/gtk: Fix the license information sdl2: drop qemu_input_event_send_key_qcode call spice: set device address and device display ID in QXL interface kbd-state: don't block auto-repeat events Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-02-22Merge remote-tracking branch 'remotes/awilliam/tags/vfio-updates-20190221.0' ↵Peter Maydell2-45/+90
into staging VFIO updates 2019-02-21 - Workaround kernel overflow bug in vfio type1 DMA unmap (Alex Williamson) - Refactor vfio container initialization (Eric Auger) # gpg: Signature made Fri 22 Feb 2019 05:21:07 GMT # gpg: using RSA key 239B9B6E3BB08B22 # gpg: Good signature from "Alex Williamson <alex.williamson@redhat.com>" [full] # gpg: aka "Alex Williamson <alex@shazbot.org>" [full] # gpg: aka "Alex Williamson <alwillia@redhat.com>" [full] # gpg: aka "Alex Williamson <alex.l.williamson@gmail.com>" [full] # Primary key fingerprint: 42F6 C04E 540B D1A9 9E7B 8A90 239B 9B6E 3BB0 8B22 * remotes/awilliam/tags/vfio-updates-20190221.0: hw/vfio/common: Refactor container initialization vfio/common: Work around kernel overflow bug in DMA unmap Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-02-22Merge remote-tracking branch 'remotes/rth/tags/pull-hppa-20190221' into stagingPeter Maydell1-3/+24
Fix dino pci config access. # gpg: Signature made Thu 21 Feb 2019 19:03:26 GMT # gpg: using RSA key 64DF38E8AF7E215F # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * remotes/rth/tags/pull-hppa-20190221: hw/hppa/dino: mask out lower 2 bits of PCI config addr Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-02-22Merge remote-tracking branch ↵Peter Maydell3-25/+24
'remotes/amarkovic/tags/mips-queue-feb-21-2019-v2' into staging MIPS queue for February 21st, 2019, v2 # gpg: Signature made Thu 21 Feb 2019 18:37:04 GMT # gpg: using RSA key D4972A8967F75A65 # gpg: Good signature from "Aleksandar Markovic <amarkovic@wavecomp.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 8526 FBF1 5DA3 811F 4A01 DD75 D497 2A89 67F7 5A65 * remotes/amarkovic/tags/mips-queue-feb-21-2019-v2: target/mips: fulong2e: Dynamically generate SPD EEPROM data target/mips: fulong2e: Fix bios flash size hw/pci-host/bonito.c: Add PCI mem region mapped at the correct address target/mips: implement QMP query-cpu-definitions command tests/tcg: target/mips: Add wrappers for MSA integer compare instructions tests/tcg: target/mips: Change directory name 'bit-counting' to 'bit-count' tests/tcg: target/mips: Correct path to headers in some test source files hw/misc: mips_itu: Fix 32/64 bit issue in a line involving shift operator Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-02-22display/virtio: add edid support.Gerd Hoffmann3-0/+47
This patch adds EDID support to the family of virtio-gpu devices. It is turned off by default, use the new edid property to enable it. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 20190221081054.13853-1-kraxel@redhat.com
2019-02-22virtio-gpu: remove useless 'waiting' fieldMarc-André Lureau1-3/+1
Let's check renderer_blocked instead directly. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Christophe Fergeau <cfergeau@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20190221114330.17968-5-marcandre.lureau@redhat.com Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2019-02-22virtio-gpu: block both 2d and 3d renderingMarc-André Lureau2-26/+22
Now that 2d commands are translated to 3d rendering, qemu must stop sending 3d updates (from 2d) to Spice as well. Fixes: https://bugzilla.redhat.com/show_bug.cgi?id=1674324 Cc: cfergeau@redhat.com Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Christophe Fergeau <cfergeau@redhat.com> Tested-by: Christophe Fergeau <cfergeau@redhat.com> Message-id: 20190221114330.17968-4-marcandre.lureau@redhat.com Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2019-02-22virtio-gpu: remove unused config_sizeMarc-André Lureau1-2/+1
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Christophe Fergeau <cfergeau@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20190221114330.17968-3-marcandre.lureau@redhat.com Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2019-02-22virtio-gpu: remove unused qdevMarc-André Lureau1-1/+0
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Christophe Fergeau <cfergeau@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20190221114330.17968-2-marcandre.lureau@redhat.com Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2019-02-21hw/vfio/common: Refactor container initializationEric Auger1-44/+70
We introduce the vfio_init_container_type() helper. It computes the highest usable iommu type and then set the container and the iommu type. Its usage in vfio_connect_container() makes the code ready for addition of new iommu types. Signed-off-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Greg Kurz <groug@kaod.org> Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
2019-02-21vfio/common: Work around kernel overflow bug in DMA unmapAlex Williamson2-1/+20
A kernel bug was introduced in v4.15 via commit 71a7d3d78e3c which adds a test for address space wrap-around in the vfio DMA unmap path. Unfortunately due to overflow, the kernel detects an unmap of the last page in the 64-bit address space as a wrap-around. In QEMU, a Q35 guest with VT-d emulation and guest IOMMU enabled will attempt to make such an unmap request during VM system reset, triggering an error: qemu-kvm: VFIO_UNMAP_DMA: -22 qemu-kvm: vfio_dma_unmap(0x561f059948f0, 0xfef00000, 0xffffffff01100000) = -22 (Invalid argument) Here the IOVA start address (0xfef00000) and the size parameter (0xffffffff01100000) add to exactly 2^64, triggering the bug. A kernel fix is queued for the Linux v5.0 release to address this. This patch implements a workaround to retry the unmap, excluding the final page of the range when we detect an unmap failing which matches the requirements for this issue. This is expected to be a safe and complete workaround as the VT-d address space does not extend to the full 64-bit space and therefore the last page should never be mapped. This workaround can be removed once all kernels with this bug are sufficiently deprecated. Link: https://bugzilla.redhat.com/show_bug.cgi?id=1662291 Reported-by: Pei Zhang <pezhang@redhat.com> Debugged-by: Peter Xu <peterx@redhat.com> Reviewed-by: Peter Xu <peterx@redhat.com> Reviewed-by: Cornelia Huck <cohuck@redhat.com> Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
2019-02-21target/mips: fulong2e: Dynamically generate SPD EEPROM dataBALATON Zoltan1-18/+13
The machine comes with 256M memory module by default but it's upgradable so it could have different memory size. There was a TODO comment to replace static SPD EEPROM data with dynamically generated one to support this. Now that we have a function for that, it's easy to do. Although this would allow larger RAM sizes, the peculiar memory map of the machine may need some special handling to map it as low and high memory. Because I don't know what the correct place would be for highmem, I've left memory size fixed at 256M for now and TODO is moved there instead. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-02-21target/mips: fulong2e: Fix bios flash sizeBALATON Zoltan1-5/+4
According to both the specifications on linux-mips.org referenced in a comment at the beginning of the file and the flash chip part number the bios size should be 512k not 1M. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-02-21hw/pci-host/bonito.c: Add PCI mem region mapped at the correct addressBALATON Zoltan1-1/+6
Stop using system memory as PCI memory otherwise devices such as VGA that have regions mapped to PCI memory clash with RAM. Use a separate memory region for PCI memory and map it to the correct address in system memory which allows PCI mem regions to show at the correct address where clients expect them. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-02-21hw/misc: mips_itu: Fix 32/64 bit issue in a line involving shift operatorAleksandar Markovic1-1/+1
Fix 32/64 bit issue in a line involving shift operator. "1 << ..." calculation of size is done as a 32-bit signed integer which may then be unintentionally sign-extended into the 64-bit result. The problem was discovered by Coverity (CID 1398648). Using "1ULL" instead of "1" on the LHS of the shift fixes this problem. Reported-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-02-21hw/arm/armsse: Make 0x5... alias region work for per-CPU devicesPeter Maydell1-10/+16
The region 0x40010000 .. 0x4001ffff and its secure-only alias at 0x50010000... are for per-CPU devices. We implement this by giving each CPU its own container memory region, where the per-CPU devices live. Unfortunately, the alias region which makes devices mapped at 0x4... addresses also appear at 0x5... is only implemented in the overall "all CPUs" container. The effect of this bug is that the CPU_IDENTITY register block appears only at 0x4001f000, but not at the 0x5001f000 alias where it should also appear. Guests (like very recent Arm Trusted Firmware-M) which try to access it at 0x5001f000 will crash. Fix this by moving the handling for this alias from the "all CPUs" container to the per-CPU container. (We leave the aliases for 0x1... and 0x3... in the overall container, because there are no per-CPU devices there.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20190215180500.6906-1-peter.maydell@linaro.org Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
2019-02-21hw/arm/musca: Wire up PL011 UARTsPeter Maydell1-5/+29
Wire up the two PL011 UARTs in the Musca board. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2019-02-21hw/arm/musca: Wire up PL031 RTCPeter Maydell1-3/+23
Wire up the PL031 RTC for the Musca board. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2019-02-21hw/arm/musca: Add MPCsPeter Maydell1-8/+147
The Musca board puts its SRAM and flash behind TrustZone Memory Protection Controllers (MPCs). Each MPC sits between the CPU and the RAM/flash, and also has a set of memory mapped control registers. Wire up the MPCs, and the memory behind them. For the moment we implement the flash as simple ROM, which cannot be reprogrammed by the guest. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2019-02-21hw/arm/musca: Add PPCsPeter Maydell1-0/+289
Many of the devices on the Musca board live behind TrustZone Peripheral Protection Controllers (PPCs); add models of the PPCs, using a similar scheme to the MPS2 board models. This commit wires up the PPCs with "unimplemented device" stubs behind them in the correct places in the address map. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2019-02-21hw/arm/musca.c: Implement models of the Musca-A and -B1 boardsPeter Maydell2-0/+198
The Musca-A and Musca-B1 development boards are based on the SSE-200 subsystem for embedded. Implement an initial skeleton model of these boards, which are similar but not identical. This commit creates the board model with the SSE and the IRQ splitters to wire IRQs up to its two CPUs. As yet there are no devices and no memory: these will be added later. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2019-02-21hw/arm/armsse: Allow boards to specify init-svtorPeter Maydell1-4/+4
The Musca boards have DAPLink firmware that sets the initial secure VTOR value (the location of the vector table) differently depending on the boot mode (from flash, from RAM, etc). Export the init-svtor as a QOM property of the ARMSSE object so that the board can change it. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2019-02-21hw/char/pl011: Use '0x' prefix when logging hex numbersPeter Maydell1-2/+2
The pl011 logs when the guest makes a bad access. It prints the address offset in hex but confusingly omits the '0x' prefix; add it. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2019-02-21hw/char/pl011: Support all interrupt linesPeter Maydell1-2/+44
The PL011 UART has six interrupt lines: * RX (receive data) * TX (transmit data) * RT (receive timeout) * MS (modem status) * E (errors) * combined (logical OR of all the above) So far we have only emulated the combined interrupt line; add support for the others, so that boards that wire them up to different interrupt controller inputs can do so. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2019-02-21hw/char/pl011: Allow use as an embedded-struct devicePeter Maydell1-29/+2
Create a new include file for the pl011's device struct, type macros, etc, so that it can be instantiated using the "embedded struct" coding style. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2019-02-21hw/timer/pl031: Convert to using trace eventsPeter Maydell2-25/+36
Convert the debug printing in the PL031 device to use trace events, and augment it to cover the interesting parts of device operation. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2019-02-21hw/timer/pl031: Allow use as an embedded-struct devicePeter Maydell1-24/+1
Create a new include file for the pl031's device struct, type macros, etc, so that it can be instantiated using the "embedded struct" coding style. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2019-02-21hw/misc/tz-ppc: Support having unused ports in the middle of the rangePeter Maydell1-0/+32
The Peripheral Protection Controller's handling of unused ports is that if there is nothing connected to the port's downstream then it does not create the sysbus MMIO region for the upstream end of the port. This results in odd behaviour when there is an unused port in the middle of the range: since sysbus MMIO regions are implicitly consecutively allocated, any used ports above the unused ones end up with sysbus MMIO region numbers that don't match the port number. Avoid this numbering mismatch by creating dummy MMIO regions for the unused ports. This doesn't change anything for our existing boards, which don't have any gaps in the middle of the port ranges they use; but it will be needed for the Musca board. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2019-02-21hw/arm/armsse: Fix memory leak in error-exit pathPeter Maydell1-4/+6
Coverity points out (CID 1398632, CID 1398650) that we leak a couple of allocated strings in the error-exit code path for setting up the MHUs in the ARMSSE. Fix this bug by moving the allocate-and-free of each string to be closer to the use, so we do the free before doing the error-exit check. Fixes: f8574705f62b38a ("hw/arm/armsse: Add unimplemented-device stubs for MHUs") Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20190215113707.24553-1-peter.maydell@linaro.org
2019-02-21hw/hppa/dino: mask out lower 2 bits of PCI config addrSven Schnelle1-3/+24
some versions of HP-UX 10.20 seems to rely on the fact that DINO strips out the lower 2 bits of the PCI configuration address. Also update the binary SeaBIOS distributed to the latest version from Helge's repository, which is required with that change. Signed-off-by: Sven Schnelle <svens@stackframe.org> Message-Id: <20190218183314.20157-1-svens@stackframe.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2019-02-21spice: set device address and device display ID in QXL interfaceLukáš Hrázký1-1/+13
Calls the new SPICE QXL interface function spice_qxl_set_device_info to set the hardware address of the graphics device represented by the QXL interface (e.g. a PCI path) and the device display IDs (the IDs of the device's monitors that belong to this QXL interface). Also stops using the deprecated spice_qxl_set_max_monitors, the new interface function replaces it. Signed-off-by: Lukáš Hrázký <lhrazky@redhat.com> Message-Id: <20190215150919.8263-1-lhrazky@redhat.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2019-02-20usb: remove unnecessary NULL device check from usb_ep_get()Liam Merwick1-3/+1
No caller of usb_ep_get() calls it with a NULL device (previous commits have addressed the few remaining cases which didn't explicitly check). Replace check for 'dev == NULL' with an assert instead. Signed-off-by: Liam Merwick <liam.merwick@oracle.com> Message-id: 1549460216-25808-10-git-send-email-liam.merwick@oracle.com Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2019-02-20usb: add device checks before redirector calls to usb_ep_get()Liam Merwick1-1/+2
Add an assert and an explicit check before the two callers to usb_ep_get() in the USB redirector code to ensure the device passed in is not NULL. Signed-off-by: Liam Merwick <liam.merwick@oracle.com> Message-id: 1549460216-25808-9-git-send-email-liam.merwick@oracle.com Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2019-02-20usb: check device is not NULL before calling usb_ep_get()Liam Merwick1-4/+4
In musb_packet(), the call to usb_find_device() can return NULL if it doesn't find a device matching 'addr' so explicitly check the return value before passing it to usb_ep_get(). This then allows the subsequent calculation of 'id' to be streamlined. Signed-off-by: Liam Merwick <liam.merwick@oracle.com> Message-id: 1549460216-25808-8-git-send-email-liam.merwick@oracle.com Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2019-02-20uhci: check device is not NULL before calling usb_ep_get()Liam Merwick1-3/+5
In uhci_handle_td(), the call to ehci_find_device() can return NULL if it doesn't find a device matching 'addr' so explicitly check the return value before passing it to usb_ep_get(). Signed-off-by: Liam Merwick <liam.merwick@oracle.com> Message-id: 1549460216-25808-7-git-send-email-liam.merwick@oracle.com Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2019-02-20ohci: check device is not NULL before calling usb_ep_get()Liam Merwick1-0/+8
A call to ohci_find_device() can return NULL if it doesn't find a device matching 'addr' so for the two callers, explicitly check the return value before passing it to usb_ep_get(). Signed-off-by: Liam Merwick <liam.merwick@oracle.com> Message-id: 1549460216-25808-6-git-send-email-liam.merwick@oracle.com Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2019-02-20ehci: check device is not NULL before calling usb_ep_get()Liam Merwick1-2/+5
In ehci_process_itd(), the call to ehci_find_device() can return NULL if it doesn't find a device matching 'devaddr' so explicitly check the return value before passing it to usb_ep_get(). Signed-off-by: Liam Merwick <liam.merwick@oracle.com> Message-id: 1549460216-25808-5-git-send-email-liam.merwick@oracle.com Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2019-02-20xhci: check device is not NULL before calling usb_ep_get()Liam Merwick1-2/+2
Signed-off-by: Liam Merwick <liam.merwick@oracle.com> Message-id: 1549460216-25808-4-git-send-email-liam.merwick@oracle.com Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2019-02-20xhci: add asserts to help with static code analysisLiam Merwick1-0/+2
Most callers of xhci_port_update() and xhci_wakeup() pass in a pointer to an array entry and can never be NULL but add two defensive asserts to protect against future changes (e.g. adding a new port speed, etc.) adding a path through xhci_lookup_port() that could result in the return of a NULL XHCIPort. Signed-off-by: Liam Merwick <liam.merwick@oracle.com> Message-id: 1549460216-25808-3-git-send-email-liam.merwick@oracle.com Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2019-02-20usb: rearrange usb_ep_get()Liam Merwick1-1/+1
There is no need to calculate the 'eps' variable in usb_ep_get() if 'ep' is the control endpoint. Instead the calculation should be done after validating the input before returning an entry indexed by the endpoint 'ep'. Signed-off-by: Liam Merwick <liam.merwick@oracle.com> Reviewed-by: Darren Kenny <Darren.Kenny@oracle.com> Reviewed-by: Mark Kanda <Mark.Kanda@oracle.com> Reviewed-by: Ameya More <ameya.more@oracle.com> Message-id: 1549460216-25808-2-git-send-email-liam.merwick@oracle.com Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2019-02-18Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-4.0-20190219' ↵Peter Maydell22-246/+120
into staging ppc patch queue 2019-02-19 Here's the next batch of ppc and spapr patches. Higlights are: * A bunch of improvements to TCG handling of vector instructions from Richard Henderson and Marc Cave-Ayland * Cleanup to the XICS interrupt controller from Greg Kurz, removing the special KVM subclasses which were a bad idea * Some refinements to the XIVE interrupt controller from Cédric Le Goater * Fix from Fabiano Rosas for a really dumb buffer overflow in the device tree code for memory hotplug * Code for allowing access to SPRs from the gdb stub from Fabiano Rosas * Assorted minor fixes and cleanups # gpg: Signature made Mon 18 Feb 2019 13:47:54 GMT # gpg: using RSA key 75F46586AE61A66CC44E87DC6C38CACA20D9B392 # gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" [full] # gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>" [full] # gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>" [full] # gpg: aka "David Gibson (kernel.org) <dwg@kernel.org>" [unknown] # Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392 * remotes/dgibson/tags/ppc-for-4.0-20190219: (43 commits) target/ppc: convert vmin* and vmax* to vector operations target/ppc: convert vadd*s and vsub*s to vector operations target/ppc: Split out VSCR_SAT to a vector field target/ppc: Add set_vscr_sat target/ppc: Use mtvscr/mfvscr for vmstate target/ppc: Add helper_mfvscr target/ppc: Remove vscr_nj and vscr_sat target/ppc: Use helper_mtvscr for reset and gdb target/ppc: Pass integer to helper_mtvscr target/ppc: convert xxsel to vector operations target/ppc: convert xxspltw to vector operations target/ppc: convert xxspltib to vector operations target/ppc: convert VSX logical operations to vector operations target/ppc: convert vsplt[bhw] to use vector operations target/ppc: convert vspltis[bhw] to use vector operations target/ppc: convert vaddu[b,h,w,d] and vsubu[b,h,w,d] over to use vector operations target/ppc: convert VMX logical instructions to use vector operations xics: Drop the KVM ICS class spapr/irq: Use the "simple" ICS class for KVM xics: Handle KVM interrupt presentation from "simple" ICS code ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-02-18Merge remote-tracking branch 'remotes/armbru/tags/pull-qapi-2019-02-18' into ↵Peter Maydell3-4/+4
staging QAPI patches for 2019-02-18 # gpg: Signature made Mon 18 Feb 2019 13:44:30 GMT # gpg: using RSA key 3870B400EB918653 # gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" [full] # gpg: aka "Markus Armbruster <armbru@pond.sub.org>" [full] # Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653 * remotes/armbru/tags/pull-qapi-2019-02-18: qapi: move RTC_CHANGE to the target schema qmp: Deprecate query-events in favor of query-qmp-schema Revert "qapi-events: add 'if' condition to implicit event enum" qapi: remove qmp_unregister_command() qapi: make query-cpu-definitions depend on specific targets qapi: make query-cpu-model-expansion depend on s390 or x86 qapi: make query-gic-capabilities depend on TARGET_ARM target.json: add a note about query-cpu* not being s390x-specific qapi: make s390 commands depend on TARGET_S390X qapi: make rtc-reset-reinjection and SEV depend on TARGET_I386 qapi: New module target.json build: Deal with all of QAPI's .o in qapi/Makefile.objs build-sys: move qmp-introspect per target qapi: Generate QAPIEvent stuff into separate files qapi: Prepare for system modules other than 'builtin' qapi: Clean up modular built-in code generation a bit qapi: Fix up documentation for recent commit a95291007b2 qapi: Belatedly document modular code generation Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-02-18qapi: move RTC_CHANGE to the target schemaMarc-André Lureau2-2/+2
A few targets don't emit RTC_CHANGE, we could restrict the event to the tagets that do emit it. Note: There is a lot more of events & commands that we could restrict to capable targets, with the cost of some additional complexity, but the benefit of added correctness and better introspection. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20190214152251.2073-19-armbru@redhat.com>
2019-02-18qapi: make s390 commands depend on TARGET_S390XMarc-André Lureau1-1/+1
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Acked-by: Cornelia Huck <cohuck@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20190214152251.2073-11-armbru@redhat.com>
2019-02-18qapi: make rtc-reset-reinjection and SEV depend on TARGET_I386Marc-André Lureau1-1/+1
Move rtc-reset-reinjection and SEV in target.json and make them conditional on TARGET_I386. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20190214152251.2073-10-armbru@redhat.com>
2019-02-18s390x/cpumodel: default enable mepoch for z14 and laterCollin Walling1-1/+2
Latest systems and host kernels support mepoch, which is a feature that was meant to be supported for z14 GA1 from the get-go. Let's copy it to the z14 GA1 default CPU model. Machines s390-ccw-virtio-3.1 and older will retain the old CPU models and will not provide this bit nor the extended PTFF functions in the default model. Signed-off-by: Collin Walling <walling@linux.ibm.com> Message-Id: <20190212011657.18324-2-walling@linux.ibm.com> Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2019-02-18s390x: add zPCI feature to "qemu" CPU modelDavid Hildenbrand1-0/+3
As we now always have PCI support, let's add it to the "qemu" CPU model, taking care of backwards compatibility. Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20190212112323.15904-1-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2019-02-18s390x: always provide pci supportCornelia Huck3-83/+1
We tried to make pci support optional on s390x in the past; unfortunately, we still require the s390 phb to be created unconditionally due to backwards compatibility issues. Instead of sinking more effort into this (including compat handling for older machines etc.) for non-obvious gains, let's just make CONFIG_PCI something that is always set on s390x. Note that you can still fence off pci for the _guest_ if you provide a cpu model without the zpci feature. Message-Id: <20190211113255.3837-1-cohuck@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: David Hildenbrand <david@redhat.com> Acked-by: Christian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
generated by cgit v1.1 at 2024-12-28 02:09:40 +0000