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2020-09-09hw/riscv: Move sifive_u_prci model to hw/miscBin Meng5-2/+6
2020-09-09hw/riscv: Move sifive_e_prci model to hw/miscBin Meng6-3/+9
2020-09-09hw/riscv: sifive_u: Connect a DMA controllerBin Meng2-0/+31
2020-09-09hw/riscv: clint: Avoid using hard-coded timebase frequencyBin Meng6-16/+28
2020-09-09hw/riscv: microchip_pfsoc: Hook GPIO controllersBin Meng1-0/+14
2020-09-09hw/riscv: microchip_pfsoc: Connect 2 Cadence GEMsBin Meng1-0/+39
2020-09-09hw/arm: xlnx: Set all boards' GEM 'phy-addr' property value to 23Bin Meng4-3/+7
2020-09-09hw/net: cadence_gem: Add a new 'phy-addr' propertyBin Meng1-2/+3
2020-09-09hw/riscv: microchip_pfsoc: Connect a DMA controllerBin Meng2-0/+16
2020-09-09hw/dma: Add SiFive platform DMA controller emulationBin Meng3-0/+317
2020-09-09hw/riscv: microchip_pfsoc: Connect a Cadence SDHCI controller and an SD cardBin Meng2-0/+24
2020-09-09hw/sd: Add Cadence SDHCI emulationBin Meng3-0/+198
2020-09-09hw/riscv: microchip_pfsoc: Connect 5 MMUARTsBin Meng2-0/+31
2020-09-09hw/char: Add Microchip PolarFire SoC MMUART emulationBin Meng3-0/+90
2020-09-09hw/riscv: Initial support for Microchip PolarFire SoC Icicle Kit boardBin Meng3-0/+319
2020-09-09target/riscv: cpu: Set reset vector based on the configured property valueBin Meng3-0/+4
2020-09-09hw/riscv: hart: Add a new 'resetvec' propertyBin Meng1-0/+3
2020-09-09riscv: sifive_test: Allow 16-bit writes to memory regionNathan Chancellor1-1/+1
2020-09-09virtio-vga: Use typedef name for instance_sizeEduardo Habkost1-3/+3
2020-09-09vhost-user-vga: Use typedef name for instance_sizeEduardo Habkost1-1/+1
2020-09-09xilinx_axienet: Use typedef name for instance_sizeEduardo Habkost1-2/+2
2020-09-09lpc_ich9: Use typedef name for instance_sizeEduardo Habkost1-1/+1
2020-09-09omap_intc: Use typedef name for instance_sizeEduardo Habkost1-1/+1
2020-09-09xilinx_axidma: Use typedef name for instance_sizeEduardo Habkost1-2/+2
2020-09-09tusb6010: Rename TUSB to TUSB6010Eduardo Habkost1-3/+3
2020-09-09pc87312: Rename TYPE_PC87312_SUPERIO to TYPE_PC87312Eduardo Habkost1-1/+1
2020-09-09vfio: Rename PCI_VFIO to VFIO_PCIEduardo Habkost2-12/+12
2020-09-09usb: Rename USB_SERIAL_DEV to USB_SERIALEduardo Habkost1-2/+2
2020-09-09sabre: Rename SABRE_DEVICE to SABREEduardo Habkost2-5/+5
2020-09-09rs6000_mc: Rename RS6000MC_DEVICE to RS6000MCEduardo Habkost1-2/+2
2020-09-09esp: Rename ESP_STATE to ESPEduardo Habkost5-7/+7
2020-09-09ahci: Rename ICH_AHCI to ICH9_AHCIEduardo Habkost2-6/+6
2020-09-09vmgenid: Rename VMGENID_DEVICE to TYPE_VMGENIDEduardo Habkost1-3/+3
2020-09-09vfio: Rename VFIO_AP_DEVICE_TYPE to TYPE_VFIO_AP_DEVICEEduardo Habkost1-4/+4
2020-09-09dev-smartcard-reader: Rename CCID_DEV_NAME to TYPE_USB_CCID_DEVEduardo Habkost1-4/+4
2020-09-09ap-device: Rename AP_DEVICE_TYPE to TYPE_AP_DEVICEEduardo Habkost2-2/+2
2020-09-09trace-events: Fix attribution of trace points to sourceMarkus Armbruster13-21/+27
2020-09-09trace-events: Delete unused trace pointsMarkus Armbruster3-6/+0
2020-09-09hw/gpio/max7310: Replace disabled printf() by qemu_log_mask(UNIMP)Philippe Mathieu-Daudé1-6/+5
2020-09-09hw/gpio/omap_gpio: Replace fprintf() by qemu_log_mask(GUEST_ERROR)Philippe Mathieu-Daudé1-2/+4
2020-09-09Use OBJECT_DECLARE_TYPE where possibleEduardo Habkost2-8/+4
2020-09-09Use DECLARE_*CHECKER* when possible (--force mode)Eduardo Habkost8-25/+24
2020-09-09Use DECLARE_*CHECKER* macrosEduardo Habkost347-829/+853
2020-09-09Move QOM typedefs and add missing includesEduardo Habkost354-757/+1460
2020-09-09hw/acpi/tco: Remove unused definitionsPhilippe Mathieu-Daudé1-11/+0
2020-09-09hw/isa/isa-bus: Replace hw_error() by assert()Philippe Mathieu-Daudé1-7/+2
2020-09-09hw/mips/fuloong2e: Convert pointless error message to an assert()Philippe Mathieu-Daudé1-4/+1
2020-09-08Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-5.2-20200908' into...Peter Maydell20-258/+480
2020-09-08Merge remote-tracking branch 'remotes/rth/tags/pull-mb-20200907-2' into stagingPeter Maydell1-3/+3
2020-09-08Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into ...Peter Maydell3-3/+3