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2012-04-17usb-uhci: stop queue filling when we find a in-flight tdGerd Hoffmann1-0/+3
Not only QHs can form rings, but TDs too. With the new queuing/pipelining support we are following TD chains and can actually walk in circles. An assert() prevents us from entering an endless loop then. Fix is easy: Just stop queuing when we figure the TD we are about to queue up is in flight already. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2012-04-17usb/vmstate: add parent dev pathGerd Hoffmann3-1/+25
... to make vmstate id string truely unique with multiple host controllers, i.e. move from "1/usb-ptr" to "0000:00:01.3/1/usb-ptr" (usb tabled connected to piix3 uhci). This obviously breaks migration. To handle this the usb bus property "full-path" is added. When setting this to false old behavior is maintained. This way current qemu will be compatible with old versions when started using '-M pc-$oldversion'. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2012-04-16Merge remote-tracking branch 'kiszka/queues/pending' into stagingAnthony Liguori3-1/+17
* kiszka/queues/pending: vapic: Disable for pre-1.1 machines Kick io-thread on qemu_chr_accept_input pcnet: Properly handle TX requests during Link Fail pcnet: Clear ERR in CSR0 on stop signrom: Rewrite as python script Conflicts: hw/pc_piix.c Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-04-16Merge remote-tracking branch 'mst/tags/for_anthony' into stagingAnthony Liguori7-294/+204
* mst/tags/for_anthony: pci: fix corrupted pci conf index register by unaligned write acpi: explicitly account for >1 device per slot acpi_piix4: Re-define PCI hotplug eject register read acpi_piix4: Remove PCI_RMV_BASE write code acpi_piix4: Fix PCI hotplug race acpi_piix4: Disallow write to up/down PCI hotplug registers virtio-pci: change virtio balloon PCI class code ivshmem: add missing msix calls vhost: readd assert statement vhost: Fix size of dirty log sync on resize pc: reduce duplication in compat machine types piix_pci: fix typo in i400FX chipset init code
2012-04-16Merge remote-tracking branch 'sstabellini/for_anthony' into stagingAnthony Liguori5-8/+112
* sstabellini/for_anthony: xen: introduce an event channel for buffered io event notifications xen-mapcache: don't unmap locked entry during mapcache invalidation Xen, mapcache: Fix the compute of the size of bucket. xen: handle backend deletion from xenstore Xen: Add xen-apic support and hook it up. Xen: basic HVM MSI injection support.
2012-04-16vapic: Disable for pre-1.1 machinesJan Kiszka1-10/+33
The kvmvapic was not present in older QEMU versions, thus must be disabled in compat machines. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2012-04-16pcnet: Properly handle TX requests during Link FailJan Kiszka2-0/+12
As long as we have no link and we aren't in internal loopback mode, no packet must be sent. Instead, LCAR needs to be set in any active TX descriptor and also CERR in CSR0. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2012-04-16pcnet: Clear ERR in CSR0 on stopJan Kiszka1-1/+1
pcnet_stop already clears any reason (BABL, CERR, MISS, MERR) why ERR (bit 15) should be set in CRS0. So we have to clear that bit as well. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2012-04-15pseries: Fix reset of VIO network deviceDavid Gibson1-3/+11
Currently, the PAPR VIO network device does not have a reset handler. This means that after a hard reset, H_REGISTER_LOGICAL_LAN will return an error when the new guest boot attempts to initialize the device. This patch corrects this, adding a suitable reset hook. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-04-15pseries: Reset vscsi properlyDavid Gibson1-2/+7
Currently the PAPR vscsi implementation does not properly clear its table of request tags when the system is reset. This patch adds a reset hook to do so. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-04-15pseries: Correctly use the device model reset hooksDavid Gibson2-4/+9
Recently we added code to properly clean away VIO CRQs on reset However, this directly uses qemu_register, rather than the existing device model reset callbacks. This patch cleans this up by adding proper use of the reset hook to the VIO bus model. The existing CRQ reset code is converted to the new method. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-04-15pseries: Remove old hcalls hook stubDavid Gibson1-1/+0
Some time ago we removed all use of the 'hcalls' callback in the pseries VIO code, which was used to workaround an ordering problem which has since been solved properly. However, the function pointer for the hook remains. This patch cleans it away. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-04-15pseries: Remove old debug leftovers from spapr_vscsiDavid Gibson1-6/+0
The PAPR VSCSI emulation contains a few lines of code which were once used for debug but now do nothing at all. This patch removes them. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-04-15pseries: Fix RTAS based config accessDavid Gibson1-38/+79
On the pseries platform, access to PCI config space is via RTAS calls( which go to the hypervisor) rather than MMIO. This means we don't use the same code path as nearly everyone else which goes through pci_host.c and we're missing some of the parameter checking along the way. We do have some parameter checking in the RTAS calls, but it's not enough. It checks for overruns, but does not check for unaligned accesses, oversized accesses (which means the guest could trigger an assertion failure from pci_host_config_{read,write}_common(). Worse it doesn't do the basic checking for the number of RTAS arguments and results before accessing them. This patch fixes these bugs. Cc: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au> [AF: Fix typos spotted by mst] Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-04-15pseries: Consolidate hack for RTAS display-character usageDavid Gibson3-5/+3
Currently the pseries machine contains not one but two somewhat ugly hacks to allow printing of early debug messages before the guest has properly read the device tree. First, we special case H_PUT_TERM_CHAR so that a vtermno of 0 (usually invalid) will look for a suitable vty and use that. This supports Linux's early debug code which will use H_PUT_TERM_CHAR with vtermno==0 before reading the device tree. Second, we support the RTAS display-character call. This takes no vtermno so we assume the address of the default first VTY. This patch makes things more consistent by folding the second hack into the first. Now, display-character uses the existing vty_lookup() function to do the same search for a suitable VTY. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-04-15pseries: Remove unused fields from VIOsPAPRBus structureDavid Gibson1-2/+0
The VIOsPAPRBus structure, used on the pseries machine contains some old fields which are no longer used anywhere. This patch removes them. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-04-15pseries: Implement RTAS system-reboot callDavid Gibson1-0/+14
This patch adds the PAPR defined RTAS system-reboot call to the pseries machine emulation, providing the guest with a way to trigger a reboot. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-04-15pseries: Fix bug with reset of VIO CRQsDavid Gibson1-8/+25
PAPR specifies a Command Response Queue (CRQ) mechanism used for virtual IO, which we implement. However, we don't correctly clean up registered CRQs when we reset the system. This patch adds a reset handler to fix this bug. While we're at it, add in some of the extra debug messages that were used to track the problem down. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> [AF: Updated hcall_dprintf()s to not duplicate the function name] Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-04-15pseries: Clean up hcall_dprintf() debugging messagesDavid Gibson3-24/+15
The pseries machine code has a number of debug messages for debugging PAPR hypercalls, dependent on DEBUG_SPAPR_HCALLS. This patch cleans these messages up a bit, by adding __func__ to the hcall_dprintf() macro and simplifying up a number of the individual messages accordingly. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-04-15pci: fix corrupted pci conf index register by unaligned writeAvi Kivity1-0/+3
Commit d0ed8076cbdc261 converted the PCI config access to the memory API, but also inadvertantly changed it to accept unaligned writes, and corrupt the index register in the process. This causes a regression booting NetBSD. Fix by ignoring unaligned or non-dword writes. https://bugs.launchpad.net/qemu/+bug/897771 Reported-by: Andreas Gustafsson <gson@gson.org> Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2012-04-15acpi: explicitly account for >1 device per slotMichael S. Tsirkin1-3/+10
Slot present bit is cleared apparently for each device. Hotplug and non hotplug devices should not mix normally, and we only set the bit when we add a device so it should all work out, but it's more robust to explicitly account for more than one device per slot. Acked-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2012-04-15acpi_piix4: Re-define PCI hotplug eject register readAlex Williamson1-3/+4
The PCI hotplug eject register has always returned 0, so let's redefine it as a hotplug feature register. The existing model of using separate up & down read-only registers and an eject via write to this register becomes the base implementation. As we make use of new interfaces we'll set bits here to allow the BIOS and AML implementation to optimize for the platform implementation. Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2012-04-15acpi_piix4: Remove PCI_RMV_BASE write codeAlex Williamson1-6/+0
Clarify this register as read-only and remove write code. No change in existing behavior. Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2012-04-15acpi_piix4: Fix PCI hotplug raceAlex Williamson1-21/+53
As Michael Tsirkin demonstrated, current PCI hotplug is vulnerable to a few races. The first is a race with other hotplug operations because we clear the up & down registers at each event. If a new event comes before the last is processed, up/down is cleared and the event is lost. To fix this for the down register, we create a life cycle for the event request that starts with the hot unplug request in piix4_device_hotplug() and ends when the device is ejected. This allows us to mask and clear individual bits, preserving them against races. For the up register, we have no clear end point for when the event is finished. We could modify the BIOS to acknowledge the bit and clear it, but this creates BIOS compatibiliy issues without offering a complete solution. Instead we note that gratuitous ACPI device checks are not harmful, which allows us to issue a device check for every slot. We know which slots are present and we know which slots are hotpluggable, so we can easily reduce this to a more manageable set for the guest. The other race Michael noted was that an unplug request followed by reset may also lose the eject notification, which may also result in the eject request being lost which a subsequent add or remove. Once we're in reset, the device is unused and we can flush the queue of device removals ourselves. Previously if a device_del was issued to a guest without ACPI PCI hotplug support, it was necessary to shutdown the guest to recover the device. With this, a guest reboot is sufficient. Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2012-04-15acpi_piix4: Disallow write to up/down PCI hotplug registersAlex Williamson1-30/+14
The write side of these registers is never used and actually can't be used as defined because any read/modify/write sequence from the guest potentially races with qemu. Drop the write support and define these as read-only registers. Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2012-04-14Merge branch 'arm-devs.for-upstream' of ↵Blue Swirl12-169/+330
git://git.linaro.org/people/pmaydell/qemu-arm * 'arm-devs.for-upstream' of git://git.linaro.org/people/pmaydell/qemu-arm: hw/arm_gic: Remove stray hardcoded tab hw/arm_gic: gic_set_pending_private() is NVIC only hw/arm_gic: Use NVIC instead of LEGACY_INCLUDED_GIC define hw/arm_gic: Make gic_reset a sysbus reset function hw/arm11mpcore: Convert to using sysbus GIC device hw/exynos4210_gic: Convert to using sysbus GIC hw/realview_gic: switch to sysbus GIC hw/a9mpcore: Switch to using sysbus GIC hw/a15mpcore: switch to using sysbus GIC hw/arm_gic: Make the GIC its own sysbus device hw/arm_gic: Expose PPI inputs as gpio inputs hw/arm_gic: Move gic_get_current_cpu into arm_gic.c hw/arm_gic: Move NCPU definition to arm_gic.c hw/exynos4210_combiner.c: Drop excessive read/write access check. ARM: Exynos4210: Drop gic_cpu_write() after initialization. Fix bit test in Exynos4210 UART emulation to use & instead of &&
2012-04-13xen: handle backend deletion from xenstoreStefano Stabellini2-8/+13
Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
2012-04-13Xen: Add xen-apic support and hook it up.Wei Liu2-0/+98
Signed-off-by: Wei Liu <wei.liu2@citrix.com> Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> Acked-by: Paolo Bonzini <pbonzini@redhat.com>
2012-04-13Xen: basic HVM MSI injection support.Wei Liu1-0/+1
Signed-off-by: Wei Liu <wei.liu2@citrix.com> Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
2012-04-13Merge remote-tracking branch 'stefanha/trivial-patches' into stagingAnthony Liguori1-0/+29
* stefanha/trivial-patches: configure: Insist on a Python 2, not Python 3 bsd-user: fix compile failure ps2: avoid repeated header file includes make: Always set LC_ALL=C for makeinfo configure: Fix wrong preprocessor statement configure: Remove useless uses of ARCH_CFLAGS
2012-04-13hw/arm_gic: Remove stray hardcoded tabPeter Maydell1-1/+1
Remove the single instance of a hardcoded tab from hw/arm_gic.c. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-04-13hw/arm_gic: gic_set_pending_private() is NVIC onlyPeter Maydell1-2/+3
The function gic_set_pending_private() is now used by the NVIC only (for the GIC we now set PPI interrupts via gpio lines and gic_set_irq()). So make it #ifdef NVIC and remove the 'attribute unused' annotation. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-04-13hw/arm_gic: Use NVIC instead of LEGACY_INCLUDED_GIC definePeter Maydell2-4/+10
Now all the A profile cores have been switched to use the standalone sysbus GIC, the only remaining code which #includes arm_gic.c is the v7M NVIC. The coupling is much closer here so it's not so easily disentangled. For now, add a comment about how arm_gic.c is compiled, and assume that the NVIC always includes arm_gic.c and the non-NVIC GIC is always compiled standalone. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-04-13hw/arm_gic: Make gic_reset a sysbus reset functionPeter Maydell2-2/+19
Make gic_reset a sysbus reset function, so we actually reset the GIC on system reset rather than only at init. For the NVIC this requires us also to implement reset of the SysTick. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-04-13hw/arm11mpcore: Convert to using sysbus GIC devicePeter Maydell1-19/+30
Convert arm11mpcore to using the standalone sysbus GIC device. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-04-13hw/exynos4210_gic: Convert to using sysbus GICPeter Maydell1-8/+24
Convert the Exynos GIC code to use the standalone sysbus GIC device. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Evgeny Voevodin <e.voevodin@samsung.com>
2012-04-13hw/realview_gic: switch to sysbus GICPeter Maydell1-12/+26
Switch the realview_gic device to the standalone sysbus GIC. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-04-13hw/a9mpcore: Switch to using sysbus GICPeter Maydell1-25/+35
Switch the a9mpcore to using the sysbus GIC device rather than having the a9mp private memory region device subclass the GIC. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-04-13hw/a15mpcore: switch to using sysbus GICPeter Maydell1-9/+26
Switch the a15mpcore private peripheral region to using the standalone sysbus GIC device. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-04-13hw/arm_gic: Make the GIC its own sysbus devicePeter Maydell7-1/+57
Compile arm_gic.c as a standalone C file to produce a self contained sysbus GIC device. Support the legacy usage by #include of the .c file by making those users #define LEGACY_INCLUDED_GIC, so we can convert them one by one. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Evgeny Voevodin <e.voevodin@samsung.com>
2012-04-13hw/arm_gic: Expose PPI inputs as gpio inputsPeter Maydell1-9/+40
Expose the Private Peripheral Interrupt inputs as GPIO inputs. The layout of the GPIO array is thus: [0..N-1] SPIs [N..N+31] PPIs for CPU 0 [N+32..N+63] PPIs for CPU 1 ... Treating PPIs as being another kind of input line is in line with the GIC architecture specification, where they are clearly described that way. The 11MPCore TRM is a bit more ambiguous, but there is no practical difference between "set PPI X as pending" and "0->1 transition on a PPI input line configured as edge triggered", and PPIs are always edge triggered, so this change won't affect behaviour. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-04-13hw/arm_gic: Move gic_get_current_cpu into arm_gic.cPeter Maydell7-48/+15
Move the gic_get_current_cpu() function into arm_gic.c. There are only two implementations: (1) "get the index of the currently executing CPU", used by all multicore GICs, and (2) "always 0", used by all GICs instantiated with a single CPU interface (the Realview board GIC and the v7M NVIC). So we can move this into the main GIC source file. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Evgeny Voevodin <e.voevodin@samsung.com>
2012-04-13hw/arm_gic: Move NCPU definition to arm_gic.cPeter Maydell7-26/+19
Move the NCPU definition to arm_gic.c: the maximum number of CPU interfaces is defined by the GIC architecture specification to be 8, so we don't need to have this #define in each of the sources files which currently includes arm_gic.c. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Evgeny Voevodin <e.voevodin@samsung.com>
2012-04-13hw/exynos4210_combiner.c: Drop excessive read/write access check.Evgeny Voevodin1-10/+0
Access to reserved area at offset higher than 0x3c is allowed in External Combiner. Samsung Galaxy Kernel implements this. So, drop excessive checks in read/write functions. Signed-off-by: Evgeny Voevodin <e.voevodin@samsung.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-04-13ARM: Exynos4210: Drop gic_cpu_write() after initialization.Evgeny Voevodin4-2/+34
Remove gic_cpu_write() call after initialization that was emulating functionality of earliest SOC bootloader which enables external GIC CPU1 interface. Instead introduce Exynos4210-specific secondary CPU bootloader, which enables both Internal and External GIC CPU1 interfaces. Signed-off-by: Evgeny Voevodin <e.voevodin@samsung.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-04-13Fix bit test in Exynos4210 UART emulation to use & instead of &&Daniel P. Berrange1-3/+3
* hw/exynos4210_uart.c: s/&&/&/ Signed-off-by: Daniel P. Berrange <berrange@redhat.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-04-12kvmclock: guest stop notificationEric B Munson1-0/+16
Often when a guest is stopped from the qemu console, it will report spurious soft lockup warnings on resume. There are kernel patches being discussed that will give the host the ability to tell the guest that it is being stopped and should ignore the soft lockup warning that generates. This patch uses the qemu Notifier system to tell the guest it is about to be stopped. Signed-off-by: Eric B Munson <emunson@mgebm.net> Signed-off-by: Raghavendra K T <raghavendra.kt@linux.vnet.ibm.com> Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2012-04-12kvm: allow arbitrarily sized mmio ioeventfdMichael S. Tsirkin1-4/+4
We use a 2 byte ioeventfd for virtio memory, add support for this. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Amos Kong <akong@redhat.com> Signed-off-by: Avi Kivity <avi@redhat.com>
2012-04-12ps2: avoid repeated header file includesWanpeng Li1-0/+29
Signed-off-by: Wanpeng Li <liwp@linux.vnet.ibm.com> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2012-04-11rtl8139: do not assume TxStatus[] and TxAddr[] are adjacentStefan Hajnoczi1-11/+15
Commit afe0a595356192d5f79703cf6462fcc112df007c ("rtl8139: support byte read to TxStatus registers") reused rtl8139_TxStatus_read() for reading TxAddr registers. It relies on the fact that TxStatus[] and TxAddr[] are adjacent. This causes a gcc warning because the compiler can detect that array access is out-of-bounds: hw/rtl8139.c:2501:27: error: array subscript is above array bounds [-Werror=array-bounds] This patch refactors the function so that we don't rely on out-of-bounds accesses. Cc: Jason Wang <jasonwang@redhat.com> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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