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2020-11-01vfio: Dirty page tracking when vIOMMU is enabledKirti Wankhede2-6/+83
When vIOMMU is enabled, register MAP notifier from log_sync when all devices in container are in stop and copy phase of migration. Call replay and get dirty pages from notifier callback. Suggested-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Kirti Wankhede <kwankhede@nvidia.com> Reviewed-by: Yan Zhao <yan.y.zhao@intel.com> Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
2020-11-01vfio: Add vfio_listener_log_sync to mark dirty pagesKirti Wankhede2-0/+117
vfio_listener_log_sync gets list of dirty pages from container using VFIO_IOMMU_GET_DIRTY_BITMAP ioctl and mark those pages dirty when all devices are stopped and saving state. Return early for the RAM block section of mapped MMIO region. Signed-off-by: Kirti Wankhede <kwankhede@nvidia.com> Reviewed-by: Neo Jia <cjia@nvidia.com> [aw: fix error_report types, fix cpu_physical_memory_set_dirty_lebitmap() cast] Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
2020-11-01vfio: Add function to start and stop dirty pages trackingKirti Wankhede1-0/+36
Call VFIO_IOMMU_DIRTY_PAGES ioctl to start and stop dirty pages tracking for VFIO devices. Signed-off-by: Kirti Wankhede <kwankhede@nvidia.com> Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
2020-11-01vfio: Get migration capability flags for containerKirti Wankhede2-9/+88
Added helper functions to get IOMMU info capability chain. Added function to get migration capability information from that capability chain for IOMMU container. Similar change was proposed earlier: https://lists.gnu.org/archive/html/qemu-devel/2018-05/msg03759.html Disable migration for devices if IOMMU module doesn't support migration capability. Signed-off-by: Kirti Wankhede <kwankhede@nvidia.com> Cc: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com> Cc: Eric Auger <eric.auger@redhat.com> Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
2020-11-01vfio: Add load state functions to SaveVMHandlersKirti Wankhede2-0/+199
Sequence during _RESUMING device state: While data for this device is available, repeat below steps: a. read data_offset from where user application should write data. b. write data of data_size to migration region from data_offset. c. write data_size which indicates vendor driver that data is written in staging buffer. For user, data is opaque. User should write data in the same order as received. Signed-off-by: Kirti Wankhede <kwankhede@nvidia.com> Reviewed-by: Neo Jia <cjia@nvidia.com> Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Reviewed-by: Yan Zhao <yan.y.zhao@intel.com> Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
2020-11-01vfio: Add save state functions to SaveVMHandlersKirti Wankhede2-0/+282
Added .save_live_pending, .save_live_iterate and .save_live_complete_precopy functions. These functions handles pre-copy and stop-and-copy phase. In _SAVING|_RUNNING device state or pre-copy phase: - read pending_bytes. If pending_bytes > 0, go through below steps. - read data_offset - indicates kernel driver to write data to staging buffer. - read data_size - amount of data in bytes written by vendor driver in migration region. - read data_size bytes of data from data_offset in the migration region. - Write data packet to file stream as below: {VFIO_MIG_FLAG_DEV_DATA_STATE, data_size, actual data, VFIO_MIG_FLAG_END_OF_STATE } In _SAVING device state or stop-and-copy phase a. read config space of device and save to migration file stream. This doesn't need to be from vendor driver. Any other special config state from driver can be saved as data in following iteration. b. read pending_bytes. If pending_bytes > 0, go through below steps. c. read data_offset - indicates kernel driver to write data to staging buffer. d. read data_size - amount of data in bytes written by vendor driver in migration region. e. read data_size bytes of data from data_offset in the migration region. f. Write data packet as below: {VFIO_MIG_FLAG_DEV_DATA_STATE, data_size, actual data} g. iterate through steps b to f while (pending_bytes > 0) h. Write {VFIO_MIG_FLAG_END_OF_STATE} When data region is mapped, its user's responsibility to read data from data_offset of data_size before moving to next steps. Added fix suggested by Artem Polyakov to reset pending_bytes in vfio_save_iterate(). Added fix suggested by Zhi Wang to add 0 as data size in migration stream and add END_OF_STATE delimiter to indicate phase complete. Suggested-by: Artem Polyakov <artemp@nvidia.com> Suggested-by: Zhi Wang <zhi.wang.linux@gmail.com> Signed-off-by: Kirti Wankhede <kwankhede@nvidia.com> Reviewed-by: Neo Jia <cjia@nvidia.com> Reviewed-by: Yan Zhao <yan.y.zhao@intel.com> Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
2020-11-01vfio: Register SaveVMHandlers for VFIO deviceKirti Wankhede2-0/+104
Define flags to be used as delimiter in migration stream for VFIO devices. Added .save_setup and .save_cleanup functions. Map & unmap migration region from these functions at source during saving or pre-copy phase. Set VFIO device state depending on VM's state. During live migration, VM is running when .save_setup is called, _SAVING | _RUNNING state is set for VFIO device. During save-restore, VM is paused, _SAVING state is set for VFIO device. Signed-off-by: Kirti Wankhede <kwankhede@nvidia.com> Reviewed-by: Neo Jia <cjia@nvidia.com> Reviewed-by: Cornelia Huck <cohuck@redhat.com> Reviewed-by: Yan Zhao <yan.y.zhao@intel.com> Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
2020-11-01vfio: Add migration state change notifierKirti Wankhede2-0/+29
Added migration state change notifier to get notification on migration state change. These states are translated to VFIO device state and conveyed to vendor driver. Signed-off-by: Kirti Wankhede <kwankhede@nvidia.com> Reviewed-by: Neo Jia <cjia@nvidia.com> Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Reviewed-by: Cornelia Huck <cohuck@redhat.com> Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
2020-11-01vfio: Add VM state change handler to know state of VMKirti Wankhede2-0/+162
VM state change handler is called on change in VM's state. Based on VM state, VFIO device state should be changed. Added read/write helper functions for migration region. Added function to set device_state. Signed-off-by: Kirti Wankhede <kwankhede@nvidia.com> Reviewed-by: Neo Jia <cjia@nvidia.com> Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Reviewed-by: Cornelia Huck <cohuck@redhat.com> [aw: lx -> HWADDR_PRIx, remove redundant parens] Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
2020-11-01vfio: Add migration region initialization and finalize functionKirti Wankhede3-0/+126
Whether the VFIO device supports migration or not is decided based of migration region query. If migration region query is successful and migration region initialization is successful then migration is supported else migration is blocked. Signed-off-by: Kirti Wankhede <kwankhede@nvidia.com> Reviewed-by: Neo Jia <cjia@nvidia.com> Acked-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Reviewed-by: Cornelia Huck <cohuck@redhat.com> Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
2020-11-01vfio: Add save and load functions for VFIO PCI devicesKirti Wankhede1-0/+51
Added functions to save and restore PCI device specific data, specifically config space of PCI device. Signed-off-by: Kirti Wankhede <kwankhede@nvidia.com> Reviewed-by: Neo Jia <cjia@nvidia.com> Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
2020-11-01vfio: Add vfio_get_object callback to VFIODeviceOpsKirti Wankhede1-0/+8
Hook vfio_get_object callback for PCI devices. Signed-off-by: Kirti Wankhede <kwankhede@nvidia.com> Reviewed-by: Neo Jia <cjia@nvidia.com> Suggested-by: Cornelia Huck <cohuck@redhat.com> Reviewed-by: Cornelia Huck <cohuck@redhat.com> Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
2020-11-01vfio: Add function to unmap VFIO regionKirti Wankhede2-4/+29
This function will be used for migration region. Migration region is mmaped when migration starts and will be unmapped when migration is complete. Signed-off-by: Kirti Wankhede <kwankhede@nvidia.com> Reviewed-by: Neo Jia <cjia@nvidia.com> Reviewed-by: Cornelia Huck <cohuck@redhat.com> Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
2020-11-01Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into stagingPeter Maydell11-51/+117
pc,pci,vhost,virtio: misc fixes Just a bunch of bugfixes all over the place. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # gpg: Signature made Fri 30 Oct 2020 12:44:31 GMT # gpg: using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469 # gpg: issuer "mst@redhat.com" # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [full] # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" [full] # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * remotes/mst/tags/for_upstream: intel_iommu: Fix two misuse of "0x%u" prints virtio: skip guest index check on device load vhost-blk: set features before setting inflight feature pci: Disallow improper BAR registration for type 1 pci: Change error_report to assert(3) pci: advertise a page aligned ATS pc: Implement -no-hpet as sugar for -machine hpet=on vhost: Don't special case vq->used_phys in vhost_get_log_size() pci: Assert irqnum is between 0 and bus->nirqs in pci_bus_change_irq_level hw/pci: Extract pci_bus_change_irq_level() from pci_change_irq_level() hw/virtio/vhost-vdpa: Fix Coverity CID 1432864 acpi/crs: Support ranges > 32b for hosts acpi/crs: Prevent bad ranges for host bridges vhost-vsock: set vhostfd to non-blocking mode vhost-vdpa: negotiate VIRTIO_NET_F_STATUS with driver Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-10-31Merge remote-tracking branch ↵Peter Maydell2-9/+20
'remotes/kraxel/tags/modules-20201029-pull-request' into staging modules: build virtio-gpu-pci & virtio-vga modular. modules: various bugfixes, mostly for macos. # gpg: Signature made Thu 29 Oct 2020 11:09:41 GMT # gpg: using RSA key 4CB6D8EED3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" [full] # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" [full] # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" [full] # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138 * remotes/kraxel/tags/modules-20201029-pull-request: modules: turn off lazy binding modules: unbreak them on macos virtio-gpu: only compile virtio-gpu-3d.c for CONFIG_VIRGL=y virtio-gpu: add virtio-vga module virtio-gpu: add virtio-gpu-pci module Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-10-31Merge remote-tracking branch 'remotes/mcayland/tags/qemu-sparc-20201028' ↵Peter Maydell5-59/+64
into staging qemu-sparc queue # gpg: Signature made Wed 28 Oct 2020 08:17:23 GMT # gpg: using RSA key CC621AB98E82200D915CC9C45BC2C56FAE0F321F # gpg: issuer "mark.cave-ayland@ilande.co.uk" # gpg: Good signature from "Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>" [full] # Primary key fingerprint: CC62 1AB9 8E82 200D 915C C9C4 5BC2 C56F AE0F 321F * remotes/mcayland/tags/qemu-sparc-20201028: hw/pci-host/sabre: Simplify code initializing variable once hw/pci-host/sabre: Remove superfluous address range check hw/pci-host/sabre: Update documentation link sabre: increase number of PCI bus IRQs from 32 to 64 hw/display/tcx: Allow 64-bit accesses to framebuffer stippler and blitter sabre: don't call sysbus_mmio_map() in sabre_realize() sparc32-ledma: don't reference nd_table directly within the device sparc32-espdma: use object_initialize_child() for esp child object sparc32-ledma: use object_initialize_child() for lance child object sparc32-dma: use object_initialize_child() for espdma and ledma child objects Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-10-30Merge remote-tracking branch 'remotes/jsnow-gitlab/tags/ide-pull-request' ↵Peter Maydell1-7/+5
into staging IDE Pull request # gpg: Signature made Tue 27 Oct 2020 14:41:59 GMT # gpg: using RSA key F9B7ABDBBCACDF95BE76CBD07DEF8106AAFC390E # gpg: Good signature from "John Snow (John Huston) <jsnow@redhat.com>" [full] # Primary key fingerprint: FAEB 9711 A12C F475 812F 18F2 88A9 064D 1835 61EB # Subkey fingerprint: F9B7 ABDB BCAC DF95 BE76 CBD0 7DEF 8106 AAFC 390E * remotes/jsnow-gitlab/tags/ide-pull-request: ide: clear SRST after SRST finishes ide: perform SRST as early as possible ide: run diagnostic after SRST Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-10-30intel_iommu: Fix two misuse of "0x%u" printsPeter Xu1-2/+2
Dave magically found this. Fix them with "0x%x". Reported-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Signed-off-by: Peter Xu <peterx@redhat.com> Message-Id: <20201019173922.100270-1-peterx@redhat.com> Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Acked-by: Jason Wang <jasowang@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2020-10-30virtio: skip guest index check on device loadFelipe Franciosi1-6/+7
QEMU must be careful when loading device state off migration streams to prevent a malicious source from exploiting the emulator. Overdoing these checks has the side effect of allowing a guest to "pin itself" in cloud environments by messing with state which is entirely in its control. Similarly to what f3081539 achieved in usb_device_post_load(), this commit removes such a check from virtio_load(). Worth noting, the result of a load without this check is the same as if a guest enables a VQ with invalid indexes to begin with. That is, the virtual device is set in a broken state (by the datapath handler) and must be reset. Signed-off-by: Felipe Franciosi <felipe@nutanix.com> Message-Id: <20201028134643.110698-1-felipe@nutanix.com> Acked-by: Jason Wang <jasowang@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2020-10-30vhost-blk: set features before setting inflight featureJin Yu2-0/+24
Virtqueue has split and packed, so before setting inflight, you need to inform the back-end virtqueue format. Signed-off-by: Jin Yu <jin.yu@intel.com> Message-Id: <20200910134851.7817-1-jin.yu@intel.com> Acked-by: Raphael Norwitz <raphael.norwitz@nutanix.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2020-10-30pci: Disallow improper BAR registration for type 1Ben Widawsky1-0/+6
Prevent future developers working on root complexes, root ports, or bridges that also wish to implement a BAR for those, from shooting themselves in the foot. PCI type 1 headers only support 2 base address registers. It is incorrect and difficult to figure out what is wrong with the device when this mistake is made. With this, it is immediate and obvious what has gone wrong. Signed-off-by: Ben Widawsky <ben.widawsky@intel.com> Message-Id: <20201015181411.89104-2-ben.widawsky@intel.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2020-10-30pci: Change error_report to assert(3)Ben Widawsky1-5/+1
Asserts are used for developer bugs. As registering a bar of the wrong size is not something that should be possible for a user to achieve, this is a developer bug. While here, use the more obvious helper function. Signed-off-by: Ben Widawsky <ben.widawsky@intel.com> Message-Id: <20201015181411.89104-1-ben.widawsky@intel.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2020-10-30pci: advertise a page aligned ATSJason Wang1-2/+3
After Linux kernel commit 61363c1474b1 ("iommu/vt-d: Enable ATS only if the device uses page aligned address."), ATS will be only enabled if device advertises a page aligned request. Unfortunately, vhost-net is the only user and we don't advertise the aligned request capability in the past since both vhost IOTLB and address_space_get_iotlb_entry() can support non page aligned request. Though it's not clear that if the above kernel commit makes sense. Let's advertise a page aligned ATS here to make vhost device IOTLB work with Intel IOMMU again. Note that in the future we may extend pcie_ats_init() to accept parameters like queue depth and page alignment. Cc: qemu-stable@nongnu.org Signed-off-by: Jason Wang <jasowang@redhat.com> Message-Id: <20200909081731.24688-1-jasowang@redhat.com> Reviewed-by: Peter Xu <peterx@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2020-10-30pc: Implement -no-hpet as sugar for -machine hpet=onEduardo Habkost2-20/+43
Get rid of yet another global variable. The default will be hpet=on only if CONFIG_HPET=y. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Message-Id: <20201021144716.1536388-1-ehabkost@redhat.com> Acked-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2020-10-30vhost: Don't special case vq->used_phys in vhost_get_log_size()Greg Kurz1-10/+0
The first loop in vhost_get_log_size() computes the size of the dirty log bitmap so that it allows to track changes in the entire guest memory, in terms of GPA. When not using a vIOMMU, the address of the vring's used structure, vq->used_phys, is a GPA. It is thus already covered by the first loop. When using a vIOMMU, vq->used_phys is a GIOVA that will be translated to an HVA when the vhost backend needs to update the used structure. It will log the corresponding GPAs into the bitmap but it certainly won't log the GIOVA. So in any case, vq->used_phys shouldn't be explicitly used to size the bitmap. Drop the second loop. This fixes a crash of the source when migrating a guest using in-kernel vhost-net and iommu_platform=on on POWER, because DMA regions are put over 0x800000000000000ULL. The resulting insanely huge log size causes g_malloc0() to abort. BugLink: https://bugzilla.redhat.com/show_bug.cgi?id=1879349 Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <160208823418.29027.15172801181796272300.stgit@bahia.lan> Acked-by: Jason Wang <jasowang@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2020-10-30pci: Assert irqnum is between 0 and bus->nirqs in pci_bus_change_irq_levelMark Cave-Ayland1-0/+2
These assertions similar to those in the adjacent pci_bus_get_irq_level() function ensure that irqnum lies within the valid PCI bus IRQ range. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-Id: <20201011082022.3016-1-mark.cave-ayland@ilande.co.uk> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20201024203900.3619498-3-f4bug@amsat.org> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2020-10-30hw/pci: Extract pci_bus_change_irq_level() from pci_change_irq_level()Philippe Mathieu-Daudé1-2/+7
Extract pci_bus_change_irq_level() from pci_change_irq_level() to make it clearer it operates on the bus. Reported-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20201024203900.3619498-2-f4bug@amsat.org> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2020-10-30hw/virtio/vhost-vdpa: Fix Coverity CID 1432864Philippe Mathieu-Daudé1-2/+2
Fix uninitialized value issues reported by Coverity: Field 'msg.reserved' is uninitialized when calling write(). Fixes: a5bd05800f8 ("vhost-vdpa: batch updating IOTLB mappings") Reported-by: Coverity (CID 1432864: UNINIT) Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20201028154004.776760-1-philmd@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2020-10-30acpi/crs: Support ranges > 32b for hostsBen Widawsky1-2/+8
According to PCIe spec 5.0 Type 1 header space Base Address Registers are defined by 7.5.1.2.1 Base Address Registers (same as Type 0). The _CRS region should allow for the same range (up to 64b). Prior to this change, any host bridge utilizing more than 32b for the BAR would have the address truncated and likely lead to conflicts when the operating systems reads the _CRS object. Signed-off-by: Ben Widawsky <ben.widawsky@intel.com> Message-Id: <20201026193924.985014-2-ben.widawsky@intel.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com>
2020-10-30acpi/crs: Prevent bad ranges for host bridgesBen Widawsky1-0/+2
Prevent _CRS resources being quietly chopped off and instead throw an assertion. _CRS is used by host bridges to declare regions of io and/or memory that they consume. On some (all?) platforms the host bridge doesn't have PCI header space and so they need some way to convey the information. Signed-off-by: Ben Widawsky <ben.widawsky@intel.com> Message-Id: <20201026193924.985014-1-ben.widawsky@intel.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Acked-by: Igor Mammedov <imammedo@redhat.com>
2020-10-30vhost-vsock: set vhostfd to non-blocking modeStefano Garzarella1-0/+10
vhost IOTLB API uses read()/write() to exchange iotlb messages with the kernel module. The QEMU implementation expects a non-blocking fd, indeed commit c471ad0e9b ("vhost_net: device IOTLB support") set it for vhost-net. Without this patch, if we enable iommu for the vhost-vsock device, QEMU can hang when exchanging IOTLB messages. As commit 894022e616 ("net: check if the file descriptor is valid before using it") did for tap, let's use qemu_try_set_nonblock() when fd is provided by the user. Signed-off-by: Stefano Garzarella <sgarzare@redhat.com> Message-Id: <20201029144849.70958-1-sgarzare@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2020-10-29Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-5.2-20201028' ↵Peter Maydell9-114/+100
into staging ppc patch queue 2020-10-28 Here's the next pull request for ppc and spapr related patches, which should be the last things for soft freeze. Includes: * Numerous error handling cleanups from Greg Kurz * Cleanups to cpu realization and hotplug handling from Greg Kurz * A handful of other small fixes and cleanups This does include a change to pc_dimm_plug() that isn't in my normal areas of concern. That's there as a a prerequisite for ppc specific changes, and has an ack from Igor. # gpg: Signature made Tue 27 Oct 2020 14:13:21 GMT # gpg: using RSA key 75F46586AE61A66CC44E87DC6C38CACA20D9B392 # gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" [full] # gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>" [full] # gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>" [full] # gpg: aka "David Gibson (kernel.org) <dwg@kernel.org>" [unknown] # Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392 * remotes/dgibson/tags/ppc-for-5.2-20201028: ppc/: fix some comment spelling errors spapr: Improve spapr_reallocate_hpt() error reporting target/ppc: Fix kvmppc_load_htab_chunk() error reporting spapr: Use error_append_hint() in spapr_reallocate_hpt() spapr: Simplify error handling in spapr_memory_plug() spapr: Pass &error_abort when getting some PC DIMM properties spapr: Use appropriate getter for PC_DIMM_SLOT_PROP spapr: Use appropriate getter for PC_DIMM_ADDR_PROP pc-dimm: Drop @errp argument of pc_dimm_plug() spapr: Simplify spapr_cpu_core_realize() and spapr_cpu_core_unrealize() spapr: Make spapr_cpu_core_unrealize() idempotent spapr: Drop spapr_delete_vcpu() unused argument spapr: Unrealize vCPUs with qdev_unrealize() spapr: Fix leak of CPU machine specific data spapr: Move spapr_create_nvdimm_dr_connectors() to core machine code hw/net: move allocation to the heap due to very large stack frame ppc/spapr: re-assert IRQs during event-scan if there are pending spapr: Clarify why DR connectors aren't user creatable Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-10-29Merge remote-tracking branch ↵Peter Maydell30-194/+2432
'remotes/pmaydell/tags/pull-target-arm-20201027-1' into staging target-arm queue: * raspi: add model of cprman clock manager * sbsa-ref: add an SBSA generic watchdog device * arm/trace: Fix hex printing * raspi: Add models of Pi 3 model A+, Pi Zero and Pi A+ * hw/arm/smmuv3: Set the restoration priority of the vSMMUv3 explicitly * Nuvoton NPCM7xx: Add USB, RNG, GPIO and watchdog support * hw/arm: fix min_cpus for xlnx-versal-virt platform * hw/arm/highbank: Silence warnings about missing fallthrough statements * linux-user: Support Aarch64 BTI * Armv7M systick: fix corner case bugs by rewriting to use ptimer # gpg: Signature made Tue 27 Oct 2020 11:27:10 GMT # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20201027-1: (48 commits) hw/timer/armv7m_systick: Rewrite to use ptimers hw/core/ptimer: Support ptimer being disabled by timer callback hw/arm/sbsa-ref: add SBSA watchdog device hw/watchdog: Implement SBSA watchdog device hw/arm/bcm2835_peripherals: connect the UART clock hw/char/pl011: add a clock input hw/misc/bcm2835_cprman: add sane reset values to the registers hw/misc/bcm2835_cprman: add the DSI0HSCK multiplexer hw/misc/bcm2835_cprman: implement clock mux behaviour hw/misc/bcm2835_cprman: add a clock mux skeleton implementation hw/misc/bcm2835_cprman: implement PLL channels behaviour hw/misc/bcm2835_cprman: add a PLL channel skeleton implementation hw/misc/bcm2835_cprman: implement PLLs behaviour hw/misc/bcm2835_cprman: add a PLL skeleton implementation hw/arm/raspi: add a skeleton implementation of the CPRMAN hw/arm/raspi: fix CPRMAN base address hw/core/clock: trace clock values in Hz instead of ns hw/core/clock: provide the VMSTATE_ARRAY_CLOCK macro arm/trace: Fix hex printing hw/arm/raspi: Add the Raspberry Pi 3 model A+ ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-10-29virtio-gpu: only compile virtio-gpu-3d.c for CONFIG_VIRGL=yGerd Hoffmann2-5/+3
There is no actual code in the CONFIG_VIRGL=n case. So building is (a) pointless and (b) makes macos ranlib complain. Reported-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-id: 20201026142851.28735-1-kraxel@redhat.com
2020-10-29virtio-gpu: add virtio-vga moduleGerd Hoffmann1-2/+8
Build virtio-gpu vga devices modular. Must be a separate module because not all qemu softmmu variants come with VGA support. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-id: 20201023064618.21409-3-kraxel@redhat.com
2020-10-29virtio-gpu: add virtio-gpu-pci moduleGerd Hoffmann1-2/+9
Build virtio-gpu pci devices modular. Must be a separate module because not all qemu softmmu variants come with PCI support. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 20201023064618.21409-2-kraxel@redhat.com
2020-10-28Merge remote-tracking branch 'remotes/philmd-gitlab/tags/renesas-20201027' ↵Peter Maydell1-32/+58
into staging Renesas patches (SH4 and RX) - Fix few warnings (Thomas Huth) - Fix typos (Lichang Zhao, Chetan Pant) CI jobs results: . https://cirrus-ci.com/build/6368903343374336 . https://gitlab.com/philmd/qemu/-/pipelines/207919103 . https://travis-ci.org/github/philmd/qemu/builds/739133105 # gpg: Signature made Mon 26 Oct 2020 23:27:39 GMT # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * remotes/philmd-gitlab/tags/renesas-20201027: target/rx: Fix Lesser GPL version number target/rx: Fix some comment spelling errors target/sh4: fix some comment spelling errors target/sh4: Update coding style to make checkpatch.pl happy hw/timer/sh_timer: Remove superfluous "break" statements hw/timer/sh_timer: Silence warnings about missing fallthrough statements hw/timer/sh_timer: Coding style clean-up elf: Add EM_RX definition Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-10-28hw/pci-host/sabre: Simplify code initializing variable oncePhilippe Mathieu-Daudé1-11/+1
We only need to zero-initialize 'val' once. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-Id: <20201012170950.3491912-4-f4bug@amsat.org> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2020-10-28hw/pci-host/sabre: Remove superfluous address range checkPhilippe Mathieu-Daudé1-2/+2
The region is registered as 64KiB in sabre_init(): memory_region_init_io(&s->sabre_config, OBJECT(s), &sabre_config_ops, s, "sabre-config", 0x10000); Remove the superfluous check. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-Id: <20201012170950.3491912-3-f4bug@amsat.org> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2020-10-28hw/pci-host/sabre: Update documentation linkPhilippe Mathieu-Daudé1-1/+1
The current link redirects to https://www.oracle.com/sun/ announcing "Oracle acquired Sun Microsystems in 2010, ..." but does not give hint where to find the datasheet. Use the archived PDF on the Wayback Machine, which works. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-Id: <20201012170950.3491912-2-f4bug@amsat.org> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2020-10-28sabre: increase number of PCI bus IRQs from 32 to 64Mark Cave-Ayland1-1/+1
The rework of the sabre IRQs in commit 6864fa3897 "sun4u: update PCI topology to include simba PCI bridges" changed the IRQ routing so that both PCI and legacy OBIO IRQs are routed through the sabre PCI host bridge to the CPU. Unfortunately this commit failed to increase the number of PCI bus IRQs accordingly meaning that access to the legacy IRQs OBIO (irqnum >= 0x20) would overflow the PCI bus IRQ array causing strange failures running qemu-system-sparc64 in NetBSD. Cc: qemu-stable@nongnu.org Reported-by: Harold Gutch <logix@foobar.franken.de> Fixes: https://bugs.launchpad.net/qemu/+bug/1838658 Fixes: 6864fa3897 ("sun4u: update PCI topology to include simba PCI bridges") Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20201011081347.2146-1-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2020-10-28hw/display/tcx: Allow 64-bit accesses to framebuffer stippler and blitterPhilippe Mathieu-Daudé1-3/+15
The S24/TCX datasheet is listed as "Unable to locate" on [1]. However the NetBSD revision 1.32 of the driver introduced 64-bit accesses to the stippler and blitter [2]. It is safe to assume these memory regions are 64-bit accessible. QEMU implementation is 32-bit, so fill the 'impl' fields. Michael Lorenz (author of the NetBSD code [2]) provided us with more information in [3]: > IIRC the real hardware *requires* 64bit accesses for stipple and > blitter operations to work. For stipples you write a 64bit word into > STIP space, the address defines where in the framebuffer you want to > draw, the data contain a 32bit bitmask, foreground colour and a ROP. > BLIT space works similarly, the 64bit word contains an offset were to > read pixels from, and how many you want to copy. > > One more thing since there seems to be some confusion - 64bit accesses > on the framebuffer are fine as well. TCX/S24 is *not* an SBus device, > even though its node says it is. > S24 is a card that plugs into a special slot on the SS5 mainboard, > which is shared with an SBus slot and looks a lot like a horizontal > UPA slot. Both S24 and TCX are accessed through the Micro/TurboSPARC's > AFX bus which is 64bit wide and intended for graphics. > Early FFB docs even mentioned connecting to both AFX and UPA, > no idea if that was ever realized in hardware though. [1] http://web.archive.org/web/20111209011516/http://wikis.sun.com/display/FOSSdocs/Home [2] http://cvsweb.netbsd.org/bsdweb.cgi/src/sys/dev/sbus/tcx.c.diff?r1=1.31&r2=1.32 [3] https://www.mail-archive.com/qemu-devel@nongnu.org/msg734928.html Cc: qemu-stable@nongnu.org Reported-by: Andreas Gustafsson <gson@gson.org> Buglink: https://bugs.launchpad.net/bugs/1892540 Fixes: 55d7bfe2293 ("tcx: Implement hardware acceleration") Tested-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Tested-by: Andreas Gustafsson <gson@gson.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20201024205100.3623006-1-f4bug@amsat.org> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2020-10-28sabre: don't call sysbus_mmio_map() in sabre_realize()Mark Cave-Ayland2-8/+7
The device should not map itself but instead should be mapped to sysbus by the sun4u machine. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20200926140216.7368-7-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2020-10-28sparc32-ledma: don't reference nd_table directly within the deviceMark Cave-Ayland2-13/+13
Instead use qdev_set_nic_properties() to configure the on-board NIC at the sun4m machine level. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20200926140216.7368-5-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2020-10-28sparc32-espdma: use object_initialize_child() for esp child objectMark Cave-Ayland1-9/+8
Store the child object directly within the sparc32-espdma object rather than using link properties. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20200926140216.7368-4-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2020-10-28sparc32-ledma: use object_initialize_child() for lance child objectMark Cave-Ayland1-6/+8
Store the child object directly within the sparc32-ledma object rather than using link properties. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20200926140216.7368-3-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2020-10-28sparc32-dma: use object_initialize_child() for espdma and ledma child objectsMark Cave-Ayland1-6/+9
Store the child objects directly within the sparc32-dma object rather than using link properties. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20200926140216.7368-2-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2020-10-27Merge remote-tracking branch 'remotes/philmd-gitlab/tags/led-api-20201026' ↵Peter Maydell9-43/+242
into staging API to model LED. CI jobs results: . https://cirrus-ci.com/build/4879251751043072 . https://gitlab.com/philmd/qemu/-/pipelines/207661784 . https://travis-ci.org/github/philmd/qemu/builds/738958191 . https://app.shippable.com/github/philmd/qemu/runs/891/summary/console # gpg: Signature made Mon 26 Oct 2020 22:03:59 GMT # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * remotes/philmd-gitlab/tags/led-api-20201026: hw/arm/tosa: Replace fprintf() calls by LED devices hw/misc/mps2-scc: Use the LED device hw/misc/mps2-fpgaio: Use the LED device hw/arm/aspeed: Add the 3 front LEDs drived by the PCA9552 #1 hw/misc/led: Emit a trace event when LED intensity has changed hw/misc/led: Allow connecting from GPIO output hw/misc/led: Add a LED device Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-10-27ide: clear SRST after SRST finishesJohn Snow1-0/+2
The SRST protocol states that after diagnostics are complete and the status is posted, we should clear the SRST bit if it should so happen to be set. The reset method itself should handle this, but just in case -- make our intention explicit here. Signed-off-by: John Snow <jsnow@redhat.com> Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-id: 20201020200242.1497705-4-jsnow@redhat.com Signed-off-by: John Snow <jsnow@redhat.com>
2020-10-27ide: perform SRST as early as possibleJohn Snow1-3/+1
We don't need to wait for the falling edge. We can set BSY as soon as possible and begin immediately resetting the drive. Devices don't appear to need to take any specific action on the falling edge. Signed-off-by: John Snow <jsnow@redhat.com> Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-id: 20201020200242.1497705-3-jsnow@redhat.com Signed-off-by: John Snow <jsnow@redhat.com>
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