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2020-10-13hw/block/nvme: Simplify timestamp sumPhilippe Mathieu-Daudé1-6/+1
As the 'timestamp' variable is declared as a 48-bit bitfield, we do not need to wrap the sum result. Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Klaus Jensen <k.jensen@samsung.com> Message-Id: <20201002075716.1657849-1-philmd@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-10-09hw/ide: restore replay support of IDEAlex Bennée1-2/+2
A recent change to weak reset handling broke replay due to the use of aio_bh_schedule_oneshot instead of the replay aware replay_bh_schedule_oneshot_event. Fixes: 55adb3c456 ("ide: cancel pending callbacks on SRST") Suggested-by: Pavel Dovgalyuk <pavel.dovgalyuk@ispras.ru> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: John Snow <jsnow@redhat.com> Acked-by: John Snow <jsnow@redhat.com> Message-Id: <20201007160038.26953-4-alex.bennee@linaro.org>
2020-10-09hw/misc/mips_cpc: Start vCPU when powered onPhilippe Mathieu-Daudé1-0/+1
In commit 102ca9667d we set "start-powered-off" on all vCPUs included in the CPS (Coherent Processing System) but forgot to start the vCPUS on when they are powered on in the CPC (Cluster Power Controller). This fixes the following tests: $ avocado run tests/acceptance/machine_mips_malta.py (1/3) test_mips_malta_i6400_framebuffer_logo_1core: PASS (3.67 s) (2/3) test_mips_malta_i6400_framebuffer_logo_7cores: INTERRUPTED: Test interrupted by SIGTERM (30.22 s) (3/3) test_mips_malta_i6400_framebuffer_logo_8cores: INTERRUPTED: Test interrupted by SIGTERM (30.25 s) RESULTS : PASS 1 | ERROR 0 | FAIL 0 | SKIP 0 | WARN 0 | INTERRUPT 2 | CANCEL 0 Fixes: 102ca9667d ("mips/cps: Use start-powered-off CPUState property") Reported-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20201007113942.2523866-1-f4bug@amsat.org> Message-Id: <20201007160038.26953-3-alex.bennee@linaro.org>
2020-10-09Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-5.2-20201009' ↵Peter Maydell10-99/+259
into staging ppc patch queue 2020-10-09 Here's the next set of ppc related patches for qemu-5.2. There are two main things here: * Cleanups to error handling in spapr from Greg Kurz * Improvements to NUMA handling for spapr from Daniel Barboza There are also a handful of other bugfixes. # gpg: Signature made Fri 09 Oct 2020 07:02:29 BST # gpg: using RSA key 75F46586AE61A66CC44E87DC6C38CACA20D9B392 # gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" [full] # gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>" [full] # gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>" [full] # gpg: aka "David Gibson (kernel.org) <dwg@kernel.org>" [unknown] # Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392 * remotes/dgibson/tags/ppc-for-5.2-20201009: specs/ppc-spapr-numa: update with new NUMA support spapr_numa: consider user input when defining associativity spapr_numa: change reference-points and maxdomain settings spapr_numa: forbid asymmetrical NUMA setups spapr: add spapr_machine_using_legacy_numa() helper ppc/pnv: Increase max firmware size spapr: Add a return value to spapr_check_pagesize() spapr: Add a return value to spapr_nvdimm_validate() spapr: Simplify error handling in spapr_cpu_core_realize() spapr: Add a return value to spapr_set_vcpu_id() spapr: Simplify error handling in prop_get_fdt() spapr: Add a return value to spapr_drc_attach() spapr: Simplify error handling in spapr_vio_busdev_realize() spapr: Simplify error handling in do_client_architecture_support() spapr: Get rid of cas_check_pvr() error reporting spapr: Simplify error handling in callers of ppc_set_compat() ppc: Fix return value in cpu_post_load() error path ppc: Add a return value to ppc_set_compat() and ppc_set_compat_all() spapr: Fix error leak in spapr_realize_vcpu() spapr: Handle HPT allocation failure in nested guest Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-10-09Merge remote-tracking branch 'remotes/armbru/tags/pull-error-2020-10-09' ↵Peter Maydell3-19/+6
into staging Error reporting patches for 2020-10-09 # gpg: Signature made Fri 09 Oct 2020 07:45:17 BST # gpg: using RSA key 354BC8B3D7EB2A6B68674E5F3870B400EB918653 # gpg: issuer "armbru@redhat.com" # gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" [full] # gpg: aka "Markus Armbruster <armbru@pond.sub.org>" [full] # Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653 * remotes/armbru/tags/pull-error-2020-10-09: error: Use error_fatal to simplify obvious fatal errors (again) error: Remove NULL checks on error_propagate() calls (again) Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-10-09error: Use error_fatal to simplify obvious fatal errors (again)Markus Armbruster2-13/+4
Patch created mechanically by rerunning: $ spatch --in-place --sp-file scripts/coccinelle/use-error_fatal.cocci \ --macro-file scripts/cocci-macro-file.h --use-gitgrep . Variables now unused dropped manually. Cc: Eric Auger <eric.auger@redhat.com> Cc: David Hildenbrand <david@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20200722084048.1726105-5-armbru@redhat.com> Reviewed-by: David Hildenbrand <david@redhat.com>
2020-10-09error: Remove NULL checks on error_propagate() calls (again)Markus Armbruster1-6/+2
Patch created mechanically by rerunning: $ spatch --sp-file scripts/coccinelle/error_propagate_null.cocci \ --macro-file scripts/cocci-macro-file.h \ --use-gitgrep . Cc: Jens Freimann <jfreimann@redhat.com> Cc: Hailiang Zhang <zhang.zhanghailiang@huawei.com> Cc: Juan Quintela <quintela@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20200722084048.1726105-4-armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com>
2020-10-09monitor: Use getter/setter functions for cur_monKevin Wolf2-2/+2
cur_mon really needs to be coroutine-local as soon as we move monitor command handlers to coroutines and let them yield. As a first step, just remove all direct accesses to cur_mon so that we can implement this in the getter function later. Signed-off-by: Kevin Wolf <kwolf@redhat.com> Message-Id: <20201005155855.256490-4-kwolf@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com>
2020-10-09monitor: Add Monitor parameter to monitor_get_cpu_index()Kevin Wolf1-1/+1
Most callers actually don't have to rely on cur_mon, but already know for which monitor they call monitor_get_cpu_index(). Signed-off-by: Kevin Wolf <kwolf@redhat.com> Message-Id: <20201005155855.256490-3-kwolf@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com>
2020-10-09spapr_numa: consider user input when defining associativityDaniel Henrique Barboza1-1/+109
A new function called spapr_numa_define_associativity_domains() is created to calculate the associativity domains and change the associativity arrays considering user input. This is how the associativity domain between two NUMA nodes A and B is calculated: - get the distance D between them - get the correspondent NUMA level 'n_level' for D. This is done via a helper called spapr_numa_get_numa_level() - all associativity arrays were initialized with their own numa_ids, and we're calculating the distance in node_id ascending order, starting from node id 0 (the first node retrieved by numa_state). This will have a cascade effect in the algorithm because the associativity domains that node 0 defines will be carried over to other nodes, and node 1 associativities will be carried over after taking node 0 associativities into account, and so on. This happens because we'll assign assoc_src as the associativity domain of dst as well, for all NUMA levels beyond and including n_level. The PPC kernel expects the associativity domains of the first node (node id 0) to be always 0 [1], and this algorithm will grant that by default. Ultimately, all of this results in a best effort approximation for the actual NUMA distances the user input in the command line. Given the nature of how PAPR itself interprets NUMA distances versus the expectations risen by how ACPI SLIT works, there might be better algorithms but, in the end, it'll also result in another way to approximate what the user really wanted. To keep this commit message no longer than it already is, the next patch will update the existing documentation in ppc-spapr-numa.rst with more in depth details and design considerations/drawbacks. [1] https://lore.kernel.org/linuxppc-dev/5e8fbea3-8faf-0951-172a-b41a2138fbcf@gmail.com/ Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-Id: <20201007172849.302240-5-danielhb413@gmail.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2020-10-09spapr_numa: change reference-points and maxdomain settingsDaniel Henrique Barboza1-8/+35
This is the first guest visible change introduced in spapr_numa.c. The previous settings of both reference-points and maxdomains were too restrictive, but enough for the existing associativity we're setting in the resources. We'll change that in the following patches, populating the associativity arrays based on user input. For those changes to be effective, reference-points and maxdomains must be more flexible. After this patch, we'll have 4 distinct levels of NUMA (0x4, 0x3, 0x2, 0x1) and maxdomains will allow for any type of configuration the user intends to do - under the scope and limitations of PAPR itself, of course. Reviewed-by: Greg Kurz <groug@kaod.org> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-Id: <20201007172849.302240-4-danielhb413@gmail.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2020-10-09spapr_numa: forbid asymmetrical NUMA setupsDaniel Henrique Barboza1-0/+34
The pSeries machine does not support asymmetrical NUMA configurations. This doesn't make much of a different since we're not using user input for pSeries NUMA setup, but this will change in the next patches. To avoid breaking existing setups, gate this change by checking for legacy NUMA support. Reviewed-by: Greg Kurz <groug@kaod.org> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-Id: <20201007172849.302240-3-danielhb413@gmail.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2020-10-09spapr: add spapr_machine_using_legacy_numa() helperDaniel Henrique Barboza1-0/+12
The changes to come to NUMA support are all guest visible. In theory we could just create a new 5_1 class option flag to avoid the changes to cascade to 5.1 and under. The reality is that these changes are only relevant if the machine has more than one NUMA node. There is no need to change guest behavior that has been around for years needlesly. This new helper will be used by the next patches to determine whether we should retain the (soon to be) legacy NUMA behavior in the pSeries machine. The new behavior will only be exposed if: - machine is pseries-5.2 and newer; - more than one NUMA node is declared in NUMA state. Reviewed-by: Greg Kurz <groug@kaod.org> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-Id: <20201007172849.302240-2-danielhb413@gmail.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2020-10-09ppc/pnv: Increase max firmware sizeCédric Le Goater1-1/+1
Builds enabling GCOV can be bigger than 4MB and the limit on FSP systems is 16MB. Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20201002091440.1349326-1-clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2020-10-09spapr: Add a return value to spapr_check_pagesize()Greg Kurz2-5/+6
As recommended in "qapi/error.h", return true on success and false on failure. This allows to reduce error propagation overhead in the callers. Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <20200914123505.612812-14-groug@kaod.org> Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2020-10-09spapr: Add a return value to spapr_nvdimm_validate()Greg Kurz2-9/+9
As recommended in "qapi/error.h", return true on success and false on failure. This allows to reduce error propagation overhead in the callers. Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <20200914123505.612812-13-groug@kaod.org> Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2020-10-09spapr: Simplify error handling in spapr_cpu_core_realize()Greg Kurz1-9/+7
As recommended in "qapi/error.h", add a bool return value to spapr_realize_vcpu() and use it in spapr_cpu_core_realize() in order to get rid of the error propagation overhead. Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <20200914123505.612812-12-groug@kaod.org> Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2020-10-09spapr: Add a return value to spapr_set_vcpu_id()Greg Kurz2-6/+4
As recommended in "qapi/error.h", return true on success and false on failure. This allows to reduce error propagation overhead in the callers. Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <20200914123505.612812-11-groug@kaod.org> Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2020-10-09spapr: Simplify error handling in prop_get_fdt()Greg Kurz1-7/+5
Use the return value of visit_check_struct() and visit_check_list() for error checking instead of local_err. This allows to get rid of the error propagation overhead. Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <20200914123505.612812-10-groug@kaod.org> Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2020-10-09spapr: Add a return value to spapr_drc_attach()Greg Kurz4-22/+8
As recommended in "qapi/error.h", return true on success and false on failure. This allows to reduce error propagation overhead in the callers. Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <20200914123505.612812-9-groug@kaod.org> Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2020-10-09spapr: Simplify error handling in spapr_vio_busdev_realize()Greg Kurz1-7/+5
Use the return value of spapr_irq_findone() and spapr_irq_claim() to detect failures. This allows to reduce the error propagation overhead. Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <20200914123505.612812-8-groug@kaod.org> Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2020-10-09spapr: Simplify error handling in do_client_architecture_support()Greg Kurz1-4/+3
Use the return value of ppc_set_compat_all() to check failures, which is preferred over hijacking local_err. Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <20200914123505.612812-7-groug@kaod.org> Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2020-10-09spapr: Get rid of cas_check_pvr() error reportingGreg Kurz1-15/+12
The cas_check_pvr() function has two purposes: - finding the "best" logical PVR, ie. the most recent one supported by the guest for this CPU type - checking if the guest supports the real PVR of this CPU type, which is just an optional extra information to workaround the lack of support for "compat" mode in PR KVM This logic doesn't need error reporting, really. If we don't find a suitable logical PVR, we return the special value 0 which is definitely not a valid PVR. Let the caller decide on whether it should error out or not. This doesn't change the behavior. Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <20200914123505.612812-6-groug@kaod.org> Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2020-10-09spapr: Simplify error handling in callers of ppc_set_compat()Greg Kurz1-4/+3
Now that ppc_set_compat() indicates success/failure with a return value, use it and reduce error propagation overhead. Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <20200914123505.612812-5-groug@kaod.org> Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2020-10-09spapr: Fix error leak in spapr_realize_vcpu()Greg Kurz1-2/+1
If spapr_irq_cpu_intc_create() fails, local_err isn't propagated and thus leaked. Fixes: 992861fb1e4c ("error: Eliminate error_propagate() manually") Cc: armbru@redhat.com Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <20200914123505.612812-2-groug@kaod.org> Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2020-10-09spapr: Handle HPT allocation failure in nested guestFabiano Rosas1-0/+6
The nested KVM code does not yet support HPT guests. Calling the KVM_CAP_PPC_ALLOC_HTAB ioctl currently leads to KVM setting the guest as HPT and erroneously executing code in L1 that should only run in hypervisor mode, leading to an exception in the L1 vcpu thread when it enters the nested guest. This can be reproduced with -machine max-cpu-compat=power8 in the L2 guest command line. The KVM code has since been modified to fail the ioctl when running in a nested environment so QEMU needs to be able to handle that. This patch provides an error message informing the user about the lack of support for HPT in nested guests. Reported-by: Satheesh Rajendran <sathnaga@linux.vnet.ibm.com> Signed-off-by: Fabiano Rosas <farosas@linux.ibm.com> Message-Id: <20200911043123.204162-1-farosas@linux.ibm.com> Reviewed-by: Greg Kurz <groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2020-10-08Merge remote-tracking branch ↵Peter Maydell5-39/+93
'remotes/pmaydell/tags/pull-target-arm-20201008-1' into staging target-arm queue: * hw/ssi/npcm7xx_fiu: Fix handling of unsigned integer * hw/arm/fsl-imx25: Fix a typo * hw/arm/sbsa-ref : Fix SMMUv3 Initialisation * hw/arm/sbsa-ref : allocate IRQs for SMMUv3 * hw/char/bcm2835_aux: Allow less than 32-bit accesses * hw/arm/virt: Implement kvm-steal-time * target/arm: Make '-cpu max' have a 48-bit PA # gpg: Signature made Thu 08 Oct 2020 21:40:31 BST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20201008-1: target/arm: Make '-cpu max' have a 48-bit PA hw/arm/virt: Implement kvm-steal-time tests/qtest: Restore aarch64 arm-cpu-features test hw/arm/virt: Move kvm pmu setup to virt_cpu_post_init hw/arm/virt: Move post cpu realize check into its own function target/arm/kvm: Make uncalled stubs explicitly unreachable linux headers: sync to 5.9-rc7 hw/char/bcm2835_aux: Allow less than 32-bit accesses hw/arm/sbsa-ref : allocate IRQs for SMMUv3 hw/arm/sbsa-ref : Fix SMMUv3 Initialisation hw/arm/fsl-imx25: Fix a typo hw/ssi/npcm7xx_fiu: Fix handling of unsigned integer Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-10-08hw/arm/virt: Implement kvm-steal-timeAndrew Jones1-3/+41
We add the kvm-steal-time CPU property and implement it for machvirt. A tiny bit of refactoring was also done to allow pmu and pvtime to use the same vcpu device helper functions. Reviewed-by: Eric Auger <eric.auger@redhat.com> Signed-off-by: Andrew Jones <drjones@redhat.com> Message-id: 20201001061718.101915-7-drjones@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-10-08hw/arm/virt: Move kvm pmu setup to virt_cpu_post_initAndrew Jones1-16/+18
Move the KVM PMU setup part of fdt_add_pmu_nodes() to virt_cpu_post_init(), which is a more appropriate location. Now fdt_add_pmu_nodes() is also named more appropriately, because it no longer does anything but fdt node creation. No functional change intended. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Eric Auger <eric.auger@redhat.com> Signed-off-by: Andrew Jones <drjones@redhat.com> Message-id: 20201001061718.101915-5-drjones@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-10-08hw/arm/virt: Move post cpu realize check into its own functionAndrew Jones1-16/+27
We'll add more to this new function in coming patches so we also state the gic must be created and call it below create_gic(). No functional change intended. Reviewed-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andrew Jones <drjones@redhat.com> Message-id: 20201001061718.101915-4-drjones@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-10-08hw/char/bcm2835_aux: Allow less than 32-bit accessesPhilippe Mathieu-Daudé1-1/+3
The "BCM2835 ARM Peripherals" datasheet [*] chapter 2 ("Auxiliaries: UART1 & SPI1, SPI2"), list the register sizes as 3/8/16/32 bits. We assume this means this peripheral allows 8-bit accesses. This was not an issue until commit 5d971f9e67 which reverted ("memory: accept mismatching sizes in memory_region_access_valid"). The model is implemented as 32-bit accesses (see commit 97398d900c, all registers are 32-bit) so replace MemoryRegionOps.valid as MemoryRegionOps.impl, and re-introduce MemoryRegionOps.valid with a 8/32-bit range. [*] https://www.raspberrypi.org/app/uploads/2012/02/BCM2835-ARM-Peripherals.pdf Fixes: 97398d900c ("bcm2835_aux: add emulation of BCM2835 AUX (aka UART1) block") Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20201002181032.1899463-1-f4bug@amsat.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-10-08hw/arm/sbsa-ref : allocate IRQs for SMMUv3Graeme Gregory1-0/+1
Original commit did not allocate IRQs for the SMMUv3 in the irqmap effectively using irq 0->3 (shared with other devices). Assuming original intent was to allocate unique IRQs then add an allocation to the irqmap. Fixes: e9fdf453240 ("hw/arm: Add arm SBSA reference machine, devices part") Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Graeme Gregory <graeme@nuviainc.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Message-id: 20201007100732.4103790-3-graeme@nuviainc.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-10-08hw/arm/sbsa-ref : Fix SMMUv3 InitialisationGraeme Gregory1-1/+1
SMMUv3 has an error in a previous patch where an i was transposed to a 1 meaning interrupts would not have been correctly assigned to the SMMUv3 instance. Fixes: 48ba18e6d3f3 ("hw/arm/sbsa-ref: Simplify by moving the gic in the machine state") Signed-off-by: Graeme Gregory <graeme@nuviainc.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Eric Auger <eric.auger@redhat.com> Message-id: 20201007100732.4103790-2-graeme@nuviainc.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-10-08hw/ssi/npcm7xx_fiu: Fix handling of unsigned integerPhilippe Mathieu-Daudé2-7/+7
Fix integer handling issues handling issue reported by Coverity: hw/ssi/npcm7xx_fiu.c: 162 in npcm7xx_fiu_flash_read() >>> CID 1432730: Integer handling issues (NEGATIVE_RETURNS) >>> "npcm7xx_fiu_cs_index(fiu, f)" is passed to a parameter that cannot be negative. 162 npcm7xx_fiu_select(fiu, npcm7xx_fiu_cs_index(fiu, f)); hw/ssi/npcm7xx_fiu.c: 221 in npcm7xx_fiu_flash_write() 218 cs_id = npcm7xx_fiu_cs_index(fiu, f); 219 trace_npcm7xx_fiu_flash_write(DEVICE(fiu)->canonical_path, cs_id, addr, 220 size, v); >>> CID 1432729: Integer handling issues (NEGATIVE_RETURNS) >>> "cs_id" is passed to a parameter that cannot be negative. 221 npcm7xx_fiu_select(fiu, cs_id); Since the index of the flash can not be negative, return an unsigned type. Reported-by: Coverity (CID 1432729 & 1432730: NEGATIVE_RETURNS) Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Havard Skinnemoen <hskinnemoen@google.com> Message-id: 20200919132435.310527-1-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-10-08Merge remote-tracking branch ↵Peter Maydell5-705/+756
'remotes/ehabkost/tags/machine-next-pull-request' into staging machine + QOM queue, 2020-10-06 * QOM documentation fixes and cleanups (Eduardo Habkost) * user-mode: Prune build dependencies (Philippe Mathieu-Daudé) * qom: Improve error message (Philippe Mathieu-Daudé) * numa: hmat: require parent cache description before the next level one (Igor Mammedov) # gpg: Signature made Tue 06 Oct 2020 23:09:03 BST # gpg: using RSA key 5A322FD5ABC4D3DBACCFD1AA2807936F984DC5A6 # gpg: issuer "ehabkost@redhat.com" # gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" [full] # Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF D1AA 2807 936F 984D C5A6 * remotes/ehabkost/tags/machine-next-pull-request: (21 commits) numa: hmat: require parent cache description before the next level one kernel-doc: Remove $decl_type='type name' hack memory: Explicitly tag doc comments for structs qom: Explicitly tag doc comments for typedefs and structs kernel-doc: Handle function typedefs without asterisks kernel-doc: Handle function typedefs that return pointers docs/devel/qom: Avoid long lines docs/devel/qom: Remove usage of <code> docs/devel/qom: Use *emphasis* for emphasis docs/devel/qom: Fix indentation of code blocks docs/devel/qom: Fix indentation of bulleted list qom: Fix DECLARE_*CHECKER documentation qom: Improve error message displayed with missing object properties hw/core/cpu: Add missing 'exec/cpu-common.h' include hw/core/qdev-properties: Extract system-mode specific properties hw/core/qdev-properties: Export some integer-related functions hw/core/qdev-properties: Export qdev_prop_enum hw/core/qdev-properties: Export enum-related functions hw/core/qdev-properties: Fix code style hw/core/qdev-properties: Use qemu_strtoul() in set_pci_host_devaddr() ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-10-06numa: hmat: require parent cache description before the next level oneIgor Mammedov1-1/+7
Spec[1] defines 0 - 3 level memory side cache, however QEMU CLI allows to specify an intermediate cache level without specifying previous level. Such option(s) silently ignored when building HMAT table, which leads to incomplete cache information. Make sure that previous level exists and error out if it hasn't been provided. 1) ACPI 6.2A 5.2.27.5 Memory Side Cache Information Structure Fixes: https://bugzilla.redhat.com/show_bug.cgi?id=1842877 Signed-off-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Message-Id: <20201006150002.1601845-1-imammedo@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-10-06hw/core/cpu: Add missing 'exec/cpu-common.h' includePhilippe Mathieu-Daudé1-0/+1
cpu_common_reset() uses tcg_flush_softmmu_tlb() which is declared in "exec/cpu-common.h". Add the missing header to avoid when refactoring other headers: hw/core/cpu.c: In function ‘cpu_common_reset’: hw/core/cpu.c:273:9: error: implicit declaration of function ‘tcg_flush_softmmu_tlb’ [-Werror=implicit-function-declaration] 273 | tcg_flush_softmmu_tlb(cpu); | ^~~~~~~~~~~~~~~~~~~~~ Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200908123433.105706-1-philmd@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-10-06hw/core/qdev-properties: Extract system-mode specific propertiesPhilippe Mathieu-Daudé2-682/+679
Move properties specific to machines into a separate file. Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200930164949.1425294-9-philmd@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-10-06hw/core/qdev-properties: Export some integer-related functionsPhilippe Mathieu-Daudé2-22/+35
We are going to split this file and reuse these static functions. Declare them in the local "qdev-prop-internal.h" header. Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200930164949.1425294-8-philmd@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-10-06hw/core/qdev-properties: Export qdev_prop_enumPhilippe Mathieu-Daudé1-0/+7
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200930164949.1425294-7-philmd@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-10-06hw/core/qdev-properties: Export enum-related functionsPhilippe Mathieu-Daudé2-28/+49
We are going to split this file and reuse these static functions. Add the local "qdev-prop-internal.h" header declaring them. Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200930164949.1425294-6-philmd@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-10-06hw/core/qdev-properties: Fix code stylePhilippe Mathieu-Daudé1-5/+5
We will soon move this code, fix its style to avoid checkpatch.pl to complain. Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200930164949.1425294-5-philmd@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-10-06hw/core/qdev-properties: Use qemu_strtoul() in set_pci_host_devaddr()Philippe Mathieu-Daudé1-13/+12
Replace strtoul() by qemu_strtoul() so checkpatch.pl won't complain if we move this code later. Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200930164949.1425294-4-philmd@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-10-06hw/core/qdev-properties: Use qemu_strtol() in set_mac() handlerPhilippe Mathieu-Daudé1-2/+9
The MACAddr structure contains an array of uint8_t. Previously if a value was out of the [0..255] range, it was silently casted and no input validation was done. Replace strtol() by qemu_strtol() -- so checkpatch.pl won't complain if we move this code later -- and return EINVAL if the input is invalid. Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200930164949.1425294-3-philmd@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-10-05cpus: add handle_interrupt to the CpusAccel interfaceClaudio Fontana1-13/+0
kvm: uses the generic handler qtest: uses the generic handler whpx: changed to use the generic handler (identical implementation) hax: changed to use the generic handler (identical implementation) hvf: changed to use the generic handler (identical implementation) tcg: adapt tcg-cpus to point to the tcg-specific handler Signed-off-by: Claudio Fontana <cfontana@suse.de> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-10-05cpus: prepare new CpusAccel cpu accelerator interfaceClaudio Fontana2-1/+2
The new interface starts unused, will start being used by the next patches. It provides methods for each accelerator to start a vcpu, kick a vcpu, synchronize state, get cpu virtual clock and elapsed ticks. In qemu_wait_io_event, make it clear that APC is used only for HAX on Windows. Signed-off-by: Claudio Fontana <cfontana@suse.de> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-10-05cpu-timers, icount: new modulesClaudio Fontana2-3/+6
refactoring of cpus.c continues with cpu timer state extraction. cpu-timers: responsible for the softmmu cpu timers state, including cpu clocks and ticks. icount: counts the TCG instructions executed. As such it is specific to the TCG accelerator. Therefore, it is built only under CONFIG_TCG. One complication is due to qtest, which uses an icount field to warp time as part of qtest (qtest_clock_warp). In order to solve this problem, provide a separate counter for qtest. This requires fixing assumptions scattered in the code that qtest_enabled() implies icount_enabled(), checking each specific case. Signed-off-by: Claudio Fontana <cfontana@suse.de> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> [remove redundant initialization with qemu_spice_init] Reviewed-by: Alex Bennée <alex.bennee@linaro.org> [fix lingering calls to icount_get] Signed-off-by: Claudio Fontana <cfontana@suse.de> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-10-02vfio-ccw: plug memory leak while getting region infoCornelia Huck1-1/+4
vfio_get_dev_region_info() unconditionally allocates memory for a passed-in vfio_region_info structure (and does not re-use an already allocated structure). Therefore, we have to free the structure we pass to that function in vfio_ccw_get_region() for every region we successfully obtained information for. Fixes: 8fadea24de4e ("vfio-ccw: support async command subregion") Fixes: 46ea3841edaf ("vfio-ccw: Add support for the schib region") Fixes: f030532f2ad6 ("vfio-ccw: Add support for the CRW region and IRQ") Reported-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com> Reviewed-by: Eric Farman <farman@linux.ibm.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200928101701.13540-1-cohuck@redhat.com>
2020-10-02s390: guest support for diagnose 0x318Collin Walling1-0/+5
DIAGNOSE 0x318 (diag318) is an s390 instruction that allows the storage of diagnostic information that is collected by the firmware in the case of hardware/firmware service events. QEMU handles the instruction by storing the info in the CPU state. A subsequent register sync will communicate the data to the hypervisor. QEMU handles the migration via a VM State Description. This feature depends on the Extended-Length SCCB (els) feature. If els is not present, then a warning will be printed and the SCLP bit that allows the Linux kernel to execute the instruction will not be set. Availability of this instruction is determined by byte 134 (aka fac134) bit 0 of the SCLP Read Info block. This coincidentally expands into the space used for CPU entries, which means VMs running with the diag318 capability may not be able to read information regarding all CPUs unless the guest kernel supports an extended-length SCCB. This feature is not supported in protected virtualization mode. Signed-off-by: Collin Walling <walling@linux.ibm.com> Acked-by: Janosch Frank <frankja@linux.ibm.com> Acked-by: Thomas Huth <thuth@redhat.com> Acked-by: David Hildenbrand <david@redhat.com> Acked-by: Claudio Imbrenda <imbrenda@linux.ibm.com> Message-Id: <20200915194416.107460-9-walling@linux.ibm.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2020-10-02s390/sclp: add extended-length sccb support for kvm guestCollin Walling1-6/+37
As more features and facilities are added to the Read SCP Info (RSCPI) response, more space is required to store them. The space used to store these new features intrudes on the space originally used to store CPU entries. This means as more features and facilities are added to the RSCPI response, less space can be used to store CPU entries. With the Extended-Length SCCB (ELS) facility, a KVM guest can execute the RSCPI command and determine if the SCCB is large enough to store a complete reponse. If it is not large enough, then the required length will be set in the SCCB header. The caller of the SCLP command is responsible for creating a large-enough SCCB to store a complete response. Proper checking should be in place, and the caller should execute the command once-more with the large-enough SCCB. This facility also enables an extended SCCB for the Read CPU Info (RCPUI) command. When this facility is enabled, the boundary violation response cannot be a result from the RSCPI, RSCPI Forced, or RCPUI commands. In order to tolerate kernels that do not yet have full support for this feature, a "fixed" offset to the start of the CPU Entries within the Read SCP Info struct is set to allow for the original 248 max entries when this feature is disabled. Additionally, this is introduced as a CPU feature to protect the guest from migrating to a machine that does not support storing an extended SCCB. This could otherwise hinder the VM from being able to read all available CPU entries after migration (such as during re-ipl). Signed-off-by: Collin Walling <walling@linux.ibm.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Acked-by: Cornelia Huck <cohuck@redhat.com> Reviewed-by: Claudio Imbrenda <imbrenda@linux.ibm.com> Message-Id: <20200915194416.107460-7-walling@linux.ibm.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
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