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2020-12-19migration: Replace migration's JSON writer by the general oneMarkus Armbruster11-15/+16
Commit 8118f0950f "migration: Append JSON description of migration stream" needs a JSON writer. The existing qobject_to_json() wasn't a good fit, because it requires building a QObject to convert. Instead, migration got its very own JSON writer, in commit 190c882ce2 "QJSON: Add JSON writer". It tacitly limits numbers to int64_t, and strings contents to characters that don't need escaping, unlike qobject_to_json(). The previous commit factored the JSON writer out of qobject_to_json(). Replace migration's JSON writer by it. Cc: Juan Quintela <quintela@redhat.com> Cc: Dr. David Alan Gilbert <dgilbert@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20201211171152.146877-17-armbru@redhat.com> Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
2020-12-19hw/rdma: Replace QList by GQueueMarkus Armbruster4-26/+30
RdmaProtectedQList provides a thread-safe queue of int64_t on top of a QList. rdma_protected_qlist_destroy() calls qlist_destroy_obj() directly. qlist_destroy_obj() is actually for use by qobject_destroy() only. The next commit will make that obvious. The minimal fix would be calling qobject_unref() instead. But QList is actually a bad fit here. It's designed for representing JSON arrays. We're better off with a GQueue here. Replace. Cc: Yuval Shaia <yuval.shaia.ml@gmail.com> Cc: Marcel Apfelbaum <marcel.apfelbaum@gmail.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20201211171152.146877-8-armbru@redhat.com>
2020-12-19qapi: Use QAPI_LIST_PREPEND() where possibleEric Blake4-43/+15
Anywhere we create a list of just one item or by prepending items (typically because order doesn't matter), we can use QAPI_LIST_PREPEND(). But places where we must keep the list in order by appending remain open-coded until later patches. Note that as a side effect, this also performs a cleanup of two minor issues in qga/commands-posix.c: the old code was performing new = g_malloc0(sizeof(*ret)); which 1) is confusing because you have to verify whether 'new' and 'ret' are variables with the same type, and 2) would conflict with C++ compilation (not an actual problem for this file, but makes copy-and-paste harder). Signed-off-by: Eric Blake <eblake@redhat.com> Message-Id: <20201113011340.463563-5-eblake@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Acked-by: Stefan Hajnoczi <stefanha@redhat.com> [Straightforward conflicts due to commit a8aa94b5f8 "qga: update schema for guest-get-disks 'dependents' field" and commit a10b453a52 "target/mips: Move mips_cpu_add_definition() from helper.c to cpu.c" resolved. Commit message tweaked.] Signed-off-by: Markus Armbruster <armbru@redhat.com>
2020-12-19rocker: Revamp fp_port_get_infoEric Blake3-15/+12
Instead of modifying the value member of a list element passed as a parameter, and open-coding the manipulation of that list, it's nicer to just return a freshly allocated value to be prepended to a list using QAPI_LIST_PREPEND. Signed-off-by: Eric Blake <eblake@redhat.com> Message-Id: <20201113011340.463563-3-eblake@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com>
2020-12-17riscv/opentitan: Update the OpenTitan memory layoutAlistair Francis1-24/+57
OpenTitan is currently only avalible on an FPGA platform and the memory addresses have changed. Update to use the new memory addresses. Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 8eb65314830a75d0fea3fccf77bc45b8ddd01c42.1607982831.git.alistair.francis@wdc.com
2020-12-17hw/riscv: Use the CPU to determine if 32-bitAlistair Francis4-34/+24
Instead of using string compares to determine if a RISC-V machine is using 32-bit or 64-bit CPUs we can use the initalised CPUs. This avoids us having to maintain a list of CPU names to compare against. This commit also fixes the name of the function to match the riscv_cpu_is_32bit() function. Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 8ab7614e5df93ab5267788b73dcd75f9f5615e82.1608142916.git.alistair.francis@wdc.com
2020-12-17hw/riscv: sifive_u: Remove compile time XLEN checksAlistair Francis1-25/+30
Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com> Acked-by: Palmer Dabbelt <palmerdabbelt@google.com> Reviewed-by: Bin Meng <bin.meng@windriver.com> Tested-by: Bin Meng <bin.meng@windriver.com> Message-id: 40d6df4dd05302c566e419be3a1fef7799e57c2e.1608142916.git.alistair.francis@wdc.com
2020-12-17hw/riscv: spike: Remove compile time XLEN checksAlistair Francis1-21/+24
Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com> Acked-by: Palmer Dabbelt <palmerdabbelt@google.com> Message-id: ac75037dd58061486de421a0fcd9ac8a92014607.1608142916.git.alistair.francis@wdc.com
2020-12-17hw/riscv: virt: Remove compile time XLEN checksAlistair Francis1-15/+17
Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Bin Meng <bin.meng@windriver.com> Tested-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com> Acked-by: Palmer Dabbelt <palmerdabbelt@google.com> Message-id: d7ca1aca672515e6a4aa0d41716238b055f3f25c.1608142916.git.alistair.francis@wdc.com
2020-12-17hw/riscv: boot: Remove compile time XLEN checksAlistair Francis4-28/+34
Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Bin Meng <bin.meng@windriver.com> Tested-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com> Acked-by: Palmer Dabbelt <palmerdabbelt@google.com> Message-id: 51e9842dbed1acceebad7f97bd3aae69aa1ac19e.1608142916.git.alistair.francis@wdc.com
2020-12-17riscv: virt: Remove target macro conditionalsAlistair Francis1-1/+1
Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Bin Meng <bin.meng@windriver.com> Tested-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com> Acked-by: Palmer Dabbelt <palmerdabbelt@google.com> Message-id: aed1174c2efd2f050fa5bd8f524d68795b12c0e4.1608142916.git.alistair.francis@wdc.com
2020-12-17riscv: spike: Remove target macro conditionalsAlistair Francis1-1/+1
Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com> Acked-by: Palmer Dabbelt <palmerdabbelt@google.com> Message-id: 04ac7fba2348c92f296a5e6a9959ac72b77ae4c6.1608142916.git.alistair.francis@wdc.com
2020-12-17hw/riscv: Expand the is 32-bit check to support more CPUsAlistair Francis1-1/+11
Currently the riscv_is_32_bit() function only supports the generic rv32 CPUs. Extend the function to support the SiFive and LowRISC CPUs as well. Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com> Acked-by: Palmer Dabbelt <palmerdabbelt@google.com> Message-id: 9a13764115ba78688ba61b56526c6de65fc3ef42.1608142916.git.alistair.francis@wdc.com
2020-12-17intc/ibex_plic: Clear interrupts that occur during claim processAlistair Francis1-3/+10
Previously if an interrupt occured during the claim process (after the interrupt is claimed but before it's completed) it would never be cleared. This patch ensures that we also clear the hidden_pending bits as well. Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Tested-by: Jackie Ke <jackieke724@hotmail.com> Message-id: 4e9786084a86f220689123cc8a7837af8fa071cf.1607100423.git.alistair.francis@wdc.com
2020-12-17hw/core/register.c: Don't use '#' flag of printf formatXinhao Zhang1-8/+8
Fix code style. Don't use '#' flag of printf format ('%#') in format strings, use '0x' prefix instead Signed-off-by: Xinhao Zhang <zhangxinhao1@huawei.com> Signed-off-by: Kai Deng <dengkai1@huawei.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20201116140148.2850128-1-zhangxinhao1@huawei.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2020-12-17hw/riscv: microchip_pfsoc: add QSPI NOR flashVitaly Wool1-0/+21
Add QSPI NOR flash definition for Microchip PolarFire SoC. Signed-off-by: Vitaly Wool <vitaly.wool@konsulko.com> Acked-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Bin Meng <bin.meng@windriver.com> Message-id: 20201112074950.33283-1-vitaly.wool@konsulko.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2020-12-17hw/riscv: sifive_u: Add UART1 DT node in the generated DTBAnup Patel1-0/+15
The sifive_u machine emulates two UARTs but we have only UART0 DT node in the generated DTB so this patch adds UART1 DT node in the generated DTB. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20201111094725.3768755-1-anup.patel@wdc.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2020-12-16cpu: Remove unnecessary noop methodsEduardo Habkost1-13/+0
In the previous commits we made cpu_exec_* and debug_excp_handler optional, so we can now remove these no-op handlers. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Claudio Fontana <cfontana@suse.de> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20201212155530.23098-13-cfontana@suse.de> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-12-16i386: move kvm accel files into kvm/Claudio Fontana7-7/+7
Signed-off-by: Claudio Fontana <cfontana@suse.de> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20201212155530.23098-2-cfontana@suse.de> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-12-15Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into ↵Peter Maydell19-65/+114
staging * New -action option and set-action QMP command (Alejandro) * More vl.c cleanup (myself with help from Daniel and Igor) * Remove deprecated options (Philippe, Thomas) * Dirty bitmap fix (Zenghui) * icount caching speedup (Pavel) * SCSI race fix (Maxim) * Remove pre-GCC 4.8 code (Marc-André) # gpg: Signature made Tue 15 Dec 2020 17:53:24 GMT # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini-gitlab/tags/for-upstream: (45 commits) build: -no-pie is no functional linker flag scripts/git.orderfile: Keep files with .inc extension sorted compiler.h: remove QEMU_GNUC_PREREQ linux-user: remove GNUC check compiler: remove GNUC check xen: remove GNUC check poison: remove GNUC check compiler.h: explicit case for Clang printf attribute virtiofsd: replace _Static_assert with QEMU_BUILD_BUG_ON tests: remove GCC < 4 fallbacks qemu-plugin.h: remove GCC < 4 compiler.h: remove GCC < 3 __builtin_expect fallback accel/tcg: Remove special case for GCC < 4.6 qemu/atomic: Drop special case for unsupported compiler hw/core: Restrict 'fw-path-provider.c' to system mode emulation docs: set CONFDIR when running sphinx vl: rename local variable in configure_accelerators qemu-option: pass QemuOptsList to opts_accepts_any qemu-option: simplify search for end of key kvm: Take into account the unaligned section size when preparing bitmap ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org> # Conflicts: # softmmu/vl.c
2020-12-15hw/core: Restrict 'fw-path-provider.c' to system mode emulationPhilippe Mathieu-Daudé1-1/+1
fw-path-provider.c is only consumed by qdev-fw.c, which itself is in softmmu_ss[], so we can restrict fw-path-provider.c to softmmu too. Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20201207220709.4017938-1-philmd@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-12-15scsi: fix device removal race vs IO restart callback on resumeMaxim Levitsky1-0/+4
There is (mostly theoretical) race between removal of a scsi device and scsi_dma_restart_bh. It used to be easier to hit this race prior to my / Paulo's patch series that added rcu to scsi bus device handling code, but IMHO this race should still be possible to hit, at least in theory. Buglink: https://bugzilla.redhat.com/show_bug.cgi?id=1854811 Fix it anyway with a patch that was proposed by Paulo in the above bugzilla. Suggested-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Maxim Levitsky <mlevitsk@redhat.com> Message-Id: <20201210125929.1136390-2-mlevitsk@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-12-15msix: assert that accesses are within boundsPaolo Bonzini1-0/+3
This makes the testcase from the next patch fail. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-12-15vl: make qemu_get_machine_opts staticPaolo Bonzini8-28/+20
Machine options can be retrieved as properties of the machine object. Encourage that by removing the "easy" accessor to machine options. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-12-15ppc/spapr: cleanup -machine pseries,nvdimm=X handlingIgor Mammedov2-13/+14
Since NVDIMM support was introduced on pseries machine, it ignored machine's nvdimm=on|off option and effectively was always enabled on machines that support NVDIMM. Later on commit (28f5a716212 ppc/spapr_nvdimm: do not enable support with 'nvdimm=off') makes QEMU error out in case user explicitly set 'nvdimm=off' on CLI by peeking at machine_opts. However that's a workaround and leaves 'nvdimms_state->is_enabled' in inconsistent state (false) when it should be set true by default. Instead of using on machine_opts, set default to true for pseries machine in initfn time. If user sets manually 'nvdimm=off' it will overwrite default value to false and QEMU will error as expected without need to peek into machine_opts. That way pseries will have, nvdimm enabled by default and will honor user provided 'nvdimm=on|off'. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20201208164606.4109134-1-imammedo@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-12-15machine: introduce MachineInitPhasePaolo Bonzini6-13/+23
Generalize the qdev_hotplug variable to the different phases of machine initialization. We would like to allow different monitor commands depending on the phase. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-12-15chardev: do not use machine_init_donePaolo Bonzini1-1/+1
machine_init_done is not the right flag to check when preconfig is taken into account; for example "./qemu-system-x86_64 -serial mon:stdio -preconfig" does not print the QEMU monitor header until after exit_preconfig. Add back a custom bool for mux character devices. This partially undoes commit c7278b4355 ("chardev: introduce chr_machine_done hook", 2018-03-12), but it keeps the cleaner logic using a function pointer in ChardevClass. Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-12-15vl: move all generic initialization out of vl.cPaolo Bonzini2-10/+49
qdev_machine_creation_done is only setting a flag now. Extend it to move more code out of vl.c. Leave only consistency checks and gdbserver processing in qemu_machine_creation_done. gdbserver_start can be moved after qdev_machine_creation_done because it only does listen on the socket and creates some internal data structures; it does not send any data (e.g. guest state) over the socket. Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-12-15vl: extract softmmu/globals.cPaolo Bonzini1-0/+2
Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-12-15remove preconfig statePaolo Bonzini1-3/+2
The preconfig state is only used if -incoming is not specified, which makes the RunState state machine more tricky than it need be. However there is already an equivalent condition which works even with -incoming, namely qdev_hotplug. Use it instead of a separate runstate. Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-12-15Merge remote-tracking branch ↵Peter Maydell19-295/+1329
'remotes/pmaydell/tags/pull-target-arm-20201215' into staging target-arm queue: * gdbstub: Correct misparsing of vCont C/S requests * openrisc: Move pic_cpu code into CPU object proper * nios2: Move IIC code into CPU object proper * Improve reporting of ROM overlap errors * xlnx-versal: Add USB support * hw/misc/zynq_slcr: Avoid #DIV/0! error * Numonyx: Fix dummy cycles and check for SPI mode on cmds # gpg: Signature made Tue 15 Dec 2020 13:59:46 GMT # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20201215: hw/block/m25p80: Fix Numonyx fast read dummy cycle count hw/block/m25p80: Check SPI mode before running some Numonyx commands hw/block/m25p80: Fix when VCFG XIP bit is set for Numonyx hw/block/m25p80: Make Numonyx config field names more accurate hw/misc/zynq_slcr: Avoid #DIV/0! error arm: xlnx-versal: Connect usb to virt-versal usb: xlnx-usb-subsystem: Add xilinx usb subsystem usb: Add DWC3 model usb: Add versal-usb2-ctrl-regs module elf_ops.h: Be more verbose with ROM blob names elf_ops.h: Don't truncate name of the ROM blobs we create hw/core/loader.c: Improve reporting of ROM overlap errors hw/core/loader.c: Track last-seen ROM in rom_check_and_register_reset() target/nios2: Use deposit32() to update ipending register target/nios2: Move nios2_check_interrupts() into target/nios2 target/nios2: Move IIC code into CPU object proper target/openrisc: Move pic_cpu code into CPU object proper hw/openrisc/openrisc_sim: Abstract out "get IRQ x of CPU y" hw/openrisc/openrisc_sim: Use IRQ splitter when connecting IRQ to multiple CPUs gdbstub: Correct misparsing of vCont C/S requests Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-12-15Merge remote-tracking branch ↵Peter Maydell12-362/+359
'remotes/ehabkost/tags/machine-next-pull-request' into staging Machine queue, 2020-12-15 * qdev code cleanup * Convert some QOM instance properties to class properties * Update git URLs on MAINTAINERS # gpg: Signature made Tue 15 Dec 2020 15:18:47 GMT # gpg: using RSA key 5A322FD5ABC4D3DBACCFD1AA2807936F984DC5A6 # gpg: issuer "ehabkost@redhat.com" # gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" [full] # Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF D1AA 2807 936F 984D C5A6 * remotes/ehabkost/tags/machine-next-pull-request: (25 commits) MAINTAINERS: Update my git repository URLs qdev: Move UUID property to qdev-properties-system.c qdev: Make qdev_propinfo_get_uint16() static qdev: Make error_set_from_qdev_prop_error() get Object* argument qdev: Make check_prop_still_unset() get Object* argument qdev: Make qdev_find_global_prop() get Object* argument qdev: Make qdev_get_prop_ptr() get Object* arg qdev: Make bit_prop_set() get Object* argument qdev: Make PropertyInfo.print method get Object* argument qdev: Don't use dev->id on set_size32() error message sparc: Check dev->realized at sparc_set_nwindows() qdev: Check dev->realized at set_size() qdev: Move property code to qdev-properties.[ch] cpu: Move cpu_common_props to hw/core/cpu.c cs4231: Get rid of empty property array netfilter: Use class properties netfilter: Reorder functions can_host: Use class properties arm/cpu64: Register "aarch64" as class property virt: Register "its" as class property ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-12-15qdev: Move UUID property to qdev-properties-system.cEduardo Habkost2-57/+57
Only softmmu code uses DEFINE_PROP_UUID, and it currently depends on error_set_from_qdev_prop_error(). Move it to qdev-properties-system.c to get out of our way when refactoring the qdev property system. We can eventually move it back to the core property system later, after removing usage of error_set_from_qdev_prop_error(). Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20201211220529.2290218-15-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-12-15qdev: Make qdev_propinfo_get_uint16() staticEduardo Habkost2-5/+3
There are no users of the function outside qdev-properties.c. Make function static and rename it to get_uint16(). Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20201211220529.2290218-14-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-12-15qdev: Make error_set_from_qdev_prop_error() get Object* argumentEduardo Habkost3-11/+11
Make the code more generic and not specific to TYPE_DEVICE. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Cornelia Huck <cohuck@redhat.com> #s390 parts Message-Id: <20201211220529.2290218-13-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-12-15qdev: Make check_prop_still_unset() get Object* argumentEduardo Habkost1-5/+5
Make the code more generic and not specific to TYPE_DEVICE. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20201211220529.2290218-12-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-12-15qdev: Make qdev_find_global_prop() get Object* argumentEduardo Habkost2-3/+3
Make the code more generic and not specific to TYPE_DEVICE. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20201211220529.2290218-11-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-12-15qdev: Make qdev_get_prop_ptr() get Object* argEduardo Habkost6-94/+64
Make the code more generic and not specific to TYPE_DEVICE. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Cornelia Huck <cohuck@redhat.com> #s390 parts Acked-by: Paul Durrant <paul@xen.org> Message-Id: <20201211220529.2290218-10-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-12-15qdev: Make bit_prop_set() get Object* argumentEduardo Habkost1-4/+6
Make the code more generic and not specific to TYPE_DEVICE. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20201211220529.2290218-9-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-12-15qdev: Make PropertyInfo.print method get Object* argumentEduardo Habkost2-3/+3
Make the code more generic and not specific to TYPE_DEVICE. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20201211220529.2290218-8-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-12-15qdev: Don't use dev->id on set_size32() error messageEduardo Habkost1-1/+1
All other qdev property error messages use "<type>.<property>" instead of "<id>.<property>". Change set_size32() for consistency, and to make the code not specific to TYPE_DEVICE. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20201211220529.2290218-7-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-12-15qdev: Check dev->realized at set_size()Eduardo Habkost1-0/+5
This setter is one of the very few property setters that don't check dev->realized, and there's no reason to make size properties different from the rest. Add the missing check. Fixes: e8cd45c78f53 ("qdev: Add SIZE type to qdev properties") Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20201211220529.2290218-5-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-12-15qdev: Move property code to qdev-properties.[ch]Eduardo Habkost2-120/+120
Move everything related to Property and PropertyInfo to qdev-properties.[ch] to make it easier to refactor that code. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20201211220529.2290218-4-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-12-15cpu: Move cpu_common_props to hw/core/cpu.cEduardo Habkost1-0/+15
There's no reason to keep the property list separate from the CPU class code. Move the variable to hw/core/cpu.c and make it static. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20201211220529.2290218-3-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-12-15cs4231: Get rid of empty property arrayEduardo Habkost1-5/+0
An empty props array is unnecessary, we can just not call device_class_set_props(). Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20201211220529.2290218-2-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-12-15virt: Register "its" as class propertyEduardo Habkost1-5/+7
Class properties make QOM introspection simpler and easier, as they don't require an object to be instantiated. Note: "its" is currently registered conditionally, but this makes the feature be registered unconditionally. The only side effect is that it will be now possible to set its=on on virt-2.7 and older. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20201111183823.283752-7-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-12-15arm/virt: Register most properties as class propertiesEduardo Habkost1-35/+41
Class properties make QOM introspection simpler and easier, as they don't require an object to be instantiated. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20201111183823.283752-6-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-12-15Merge remote-tracking branch ↵Peter Maydell1-5/+0
'remotes/kraxel/tags/audio-20201215-pull-request' into staging audio: coreaudio playback state fixes. audio: misc cleanups. # gpg: Signature made Tue 15 Dec 2020 13:47:57 GMT # gpg: using RSA key 4CB6D8EED3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" [full] # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" [full] # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" [full] # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138 * remotes/kraxel/tags/audio-20201215-pull-request: audio: add sanity check audio: Simplify audio_bug() removing old code cs4231: Get rid of empty property array audio: remove unused function audio_is_cleaning_up() coreaudio: always stop audio playback on shut down coreaudio: don't start playback in init routine coreaudio: rename misnamed variable fake_as Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-12-15hw/block/m25p80: Fix Numonyx fast read dummy cycle countJoe Komlodi1-3/+27
Numonyx chips determine the number of cycles to wait based on bits 7:4 in the volatile configuration register. However, if these bits are 0x0 or 0xF, the number of dummy cycles to wait is 10 for QIOR and QIOR4 commands or when in QIO mode, and otherwise 8 for the currently supported fast read commands. [1] [1] https://www.micron.com/-/media/client/global/documents/products/data-sheet/nor-flash/serial-nor/mt25q/die-rev-b/mt25q_qlkt_u_02g_cbb_0.pdf?rev=9b167fbf2b3645efba6385949a72e453 Signed-off-by: Joe Komlodi <komlodi@xilinx.com> Reviewed-by: Francisco Iglesias <francisco.iglesias@xilinx.com> Message-id: 1605568264-26376-5-git-send-email-komlodi@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-12-15hw/block/m25p80: Check SPI mode before running some Numonyx commandsJoe Komlodi1-19/+95
Some Numonyx flash commands cannot be executed in DIO and QIO mode, such as trying to do DPP or DOR when in QIO mode. Signed-off-by: Joe Komlodi <komlodi@xilinx.com> Reviewed-by: Francisco Iglesias <francisco.iglesias@xilinx.com> Message-id: 1605568264-26376-4-git-send-email-komlodi@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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