riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2020-06-22	hw/timer: RX62N 8-Bit timer (TMR)	Yoshinori Sato	3	-0/+481
2020-06-22	hw/intc: RX62N interrupt controller (ICUa)	Yoshinori Sato	3	-0/+401
2020-06-22	hw/timer/sh_timer: Remove unused 'qemu/timer.h' include	Philippe Mathieu-Daudé	1	-1/+0
2020-06-22	hw/sh4: Extract timer definitions to 'hw/timer/tmu012.h'	Philippe Mathieu-Daudé	2	-0/+3
2020-06-22	Merge remote-tracking branch 'remotes/alistair/tags/pull-riscv-to-apply-20200...	Peter Maydell	9	-82/+1010
2020-06-19	Merge remote-tracking branch 'remotes/kraxel/tags/audio-20200619-pull-request...	Peter Maydell	2	-2/+2
2020-06-19	hw/riscv: sifive_u: Add a dummy DDR memory controller device	Bin Meng	1	-0/+4
2020-06-19	hw/riscv: sifive_u: Sort the SoC memmap table entries	Bin Meng	1	-2/+2
2020-06-19	hw/riscv: sifive_u: Support different boot source per MSEL pin state	Bin Meng	1	-8/+31
2020-06-19	hw/riscv: sifive: Change SiFive E/U CPU reset vector to 0x1004	Bin Meng	2	-7/+9
2020-06-19	hw/riscv: sifive_u: Add a new property msel for MSEL pin state	Bin Meng	1	-0/+7
2020-06-19	hw/riscv: sifive_u: Rename serial property get/set functions to a generic name	Bin Meng	1	-6/+8
2020-06-19	hw/riscv: sifive_u: Add reset functionality	Bin Meng	1	-1/+23
2020-06-19	hw/riscv: sifive_gpio: Do not blindly trigger output IRQs	Bin Meng	1	-1/+3
2020-06-19	hw/riscv: sifive_u: Hook a GPIO controller	Bin Meng	1	-2/+41
2020-06-19	hw/riscv: sifive_gpio: Add a new 'ngpio' property	Bin Meng	1	-11/+19
2020-06-19	hw/riscv: sifive_gpio: Clean up the codes	Bin Meng	1	-8/+5
2020-06-19	hw/riscv: sifive_u: Generate device tree node for OTP	Bin Meng	1	-0/+11
2020-06-19	hw/riscv: sifive_u: Simplify the GEM IRQ connect code a little bit	Bin Meng	1	-6/+1
2020-06-19	hw/riscv: opentitan: Remove the riscv_ prefix of the machine* and soc* functions	Bin Meng	1	-15/+14
2020-06-19	hw/riscv: sifive_e: Remove the riscv_ prefix of the machine* and soc* functions	Bin Meng	1	-12/+12
2020-06-19	riscv/opentitan: Connect the UART device	Alistair Francis	1	-2/+23
2020-06-19	riscv/opentitan: Connect the PLIC device	Alistair Francis	1	-2/+12
2020-06-19	hw/intc: Initial commit of lowRISC Ibex PLIC	Alistair Francis	2	-0/+262
2020-06-19	hw/char: Initial commit of Ibex UART	Alistair Francis	3	-0/+497
2020-06-19	riscv/opentitan: Fix the ROM size	Alistair Francis	1	-1/+2
2020-06-19	sifive_e: Support the revB machine	Alistair Francis	1	-4/+30
2020-06-19	tpm: Move backend code under the 'backends/' directory	Philippe Mathieu-Daudé	8	-2192/+1
2020-06-19	hw/tpm: Make 'tpm_util.h' publicly accessible as "sysemu/tpm_util.h"	Philippe Mathieu-Daudé	7	-78/+6
2020-06-19	hw/tpm: Move DEFINE_PROP_TPMBE() macro to 'tmp_prop.h' local header	Philippe Mathieu-Daudé	6	-5/+35
2020-06-19	hw/tpm: Move few declarations from 'tpm_util.h' to 'tpm_int.h'	Philippe Mathieu-Daudé	2	-10/+11
2020-06-19	hw/tpm: Make TRACE_TPM_UTIL_SHOW_BUFFER check local to tpm_util.c	Philippe Mathieu-Daudé	2	-6/+5
2020-06-19	hw/tpm: Remove unnecessary 'tpm_int.h' header inclusion	Philippe Mathieu-Daudé	3	-3/+0
2020-06-19	hw/tpm: Move 'hw/acpi/tpm.h' inclusion from header to sources	Philippe Mathieu-Daudé	4	-1/+3
2020-06-19	hw/tpm: Include missing 'qemu/option.h' header	Philippe Mathieu-Daudé	1	-0/+2
2020-06-19	hw/tpm: Do not include 'qemu/osdep.h' in header	Philippe Mathieu-Daudé	1	-1/+0
2020-06-19	hw/tpm: Rename TPMDEV as TPM_BACKEND in Kconfig	Philippe Mathieu-Daudé	1	-6/+6
2020-06-19	Merge remote-tracking branch 'remotes/cohuck/tags/s390x-20200618' into staging	Peter Maydell	3	-38/+248
2020-06-19	hw/audio/gus: Fix registers 32-bit access	Allan Peramaki	2	-2/+2
2020-06-18	Merge remote-tracking branch 'remotes/jasowang/tags/net-pull-request' into st...	Peter Maydell	7	-248/+625
2020-06-18	hw/net/e1000e: Do not abort() on invalid PSRCTL register value	Philippe Mathieu-Daudé	1	-3/+7
2020-06-18	net: cadence_gem: Fix RX address filtering	Tong Ho	1	-15/+11
2020-06-18	net: cadence_gem: TX_LAST bit should be set by guest	Sai Pavan Boddu	1	-6/+0
2020-06-18	net: cadence_gem: Update the reset value for interrupt mask register	Sai Pavan Boddu	1	-0/+1
2020-06-18	net: cadnece_gem: Update irq_read_clear field of designcfg_debug1 reg	Sai Pavan Boddu	1	-1/+1
2020-06-18	net: cadence_gem: Add support for jumbo frames	Sai Pavan Boddu	1	-5/+46
2020-06-18	net: cadence_gem: Fix up code style	Sai Pavan Boddu	1	-101/+103
2020-06-18	net: cadence_gem: Move tx/rx packet buffert to CadenceGEMState	Sai Pavan Boddu	1	-21/+17
2020-06-18	net: cadence_gem: Set ISR according to queue in use	Sai Pavan Boddu	1	-10/+17
2020-06-18	net: cadence_gem: Define access permission for interrupt registers	Sai Pavan Boddu	1	-0/+14