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2023-02-07hw/riscv/boot.c: calculate fdt size after fdt_pack()Daniel Henrique Barboza1-4/+6
fdt_pack() can change the fdt size, meaning that fdt_totalsize() can contain a now deprecated (bigger) value. Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Message-Id: <20230201171212.1219375-2-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2023-02-07hw/riscv/spike.c: rename MachineState 'mc' pointers to' ms'Daniel Henrique Barboza1-9/+9
Follow the QEMU convention of naming MachineState pointers as 'ms' by renaming the instances where we're calling it 'mc'. Suggested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Message-Id: <20230124212234.412630-4-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2023-02-07hw/riscv/virt.c: rename MachineState 'mc' pointers to 'ms'Daniel Henrique Barboza1-217/+217
We have a convention in other QEMU boards/archs to name MachineState pointers as either 'machine' or 'ms'. MachineClass pointers are usually called 'mc'. The 'virt' RISC-V machine has a lot of instances where MachineState pointers are named 'mc'. There is nothing wrong with that, but we gain more compatibility with the rest of the QEMU code base, and easier reviews, if we follow QEMU conventions. Rename all 'mc' MachineState pointers to 'ms'. This is a very tedious and mechanical patch that was produced by doing the following: - find/replace all 'MachineState *mc' to 'MachineState *ms'; - find/replace all 'mc->fdt' to 'ms->fdt'; - find/replace all 'mc->smp.cpus' to 'ms->smp.cpus'; - replace any remaining occurrences of 'mc' that the compiler complained about. Suggested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Message-Id: <20230124212234.412630-3-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2023-02-07hw/riscv/virt.c: calculate socket count once in create_fdt_imsic()Daniel Henrique Barboza1-15/+19
riscv_socket_count() returns either ms->numa_state->num_nodes or 1 depending on NUMA support. In any case the value can be retrieved only once and used in the rest of the function. This will also alleviate the rename we're going to do next by reducing the instances of MachineState 'mc' inside hw/riscv/virt.c. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Message-Id: <20230124212234.412630-2-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2023-02-07hw/riscv: boot: Don't use CSRs if they are disabledAlistair Francis1-0/+9
If the CSRs and CSR instructions are disabled because the Zicsr extension isn't enabled then we want to make sure we don't run any CSR instructions in the boot ROM. This patches removes the CSR instructions from the reset-vec if the extension isn't enabled. We replace the instruction with a NOP instead. Note that we don't do this for the SiFive U machine, as we are modelling the hardware in that case. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1447 Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Message-Id: <20230123035754.75553-1-alistair.francis@opensource.wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2023-02-07include/hw/riscv/opentitan: update opentitan IRQsWilfred Mallawa1-40/+40
Updates the opentitan IRQs to match the latest supported commit of Opentitan from TockOS. OPENTITAN_SUPPORTED_SHA := 565e4af39760a123c59a184aa2f5812a961fde47 Memory layout as per [1] [1] https://github.com/lowRISC/opentitan/blob/565e4af39760a123c59a184aa2f5812a961fde47/hw/top_earlgrey/sw/autogen/top_earlgrey_memory.h Signed-off-by: Wilfred Mallawa <wilfred.mallawa@wdc.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20230123063619.222459-1-wilfred.mallawa@opensource.wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2023-02-05hw/display/sm501: Code style fixBALATON Zoltan1-1/+2
Fix checkpatch warning about multi-line comment. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <8801292992a304609e1eac680fe36b515592b926.1674333199.git.balaton@eik.bme.hu> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2023-02-05hw/display/sm501: Remove unneeded casts from void pointerBALATON Zoltan1-11/+11
This is not needed in C. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <58f599387dd0739ea1880bfb678872c0be26bf1b.1674333199.git.balaton@eik.bme.hu> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2023-02-05hw/display/sm501: Remove parenthesis around constant macro definitionsBALATON Zoltan1-197/+197
No need to wrap constants in parenthesis. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <9194546b73b05e7098761ec62b2dfd0699b97b65.1674333199.git.balaton@eik.bme.hu> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2023-02-05hw/ppc/pegasos2: Fix a typo in a commentBALATON Zoltan1-1/+1
Reported-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20230203194312.33834745712@zero.eik.bme.hu> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2023-02-05ppc/pnv/pci: Fix PHB xscom registers memory region nameFrederic Barrat1-1/+1
The name is for the region mapping the PHB xscom registers. It was apparently a bad cut-and-paste from the per-stack pci xscom area just above, so we had two regions with the same name. Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20230127122848.550083-5-fbarrat@linux.ibm.com> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2023-02-05hw/ppc/e500.c: Attach eSDHC unimplemented region to ccsr_addr_spaceBernhard Beschow1-3/+7
Makes the unimplemented region move together with the CCSR address space if moved by a bootloader. Moving the CCSR address space isn't implemented yet but this patch is a preparation for it. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20230125130024.158721-5-shentey@gmail.com> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2023-02-05hw/ppc/e500.c: Avoid hardcoding parent device in create_devtree_etsec()Bernhard Beschow1-1/+1
The "platform" node is available through data->node, so use that instead of making assumptions about the parent device. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-Id: <20230125130024.158721-4-shentey@gmail.com> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2023-02-05hw/ppc/e500{, plat}: Drop redundant checks for presence of platform busBernhard Beschow2-9/+5
This is a follow-up on commit 47a0b1dff7e9 'hw/ppc/mpc8544ds: Add platform bus': Both mpc85xx boards now have a platform bus unconditionally. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-Id: <20230125130024.158721-3-shentey@gmail.com> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2023-02-05hw/ppc: Set machine->fdt in e500 machinesBernhard Beschow1-1/+6
This enables support for the 'dumpdtb' QMP/HMP command for all e500 machines. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-Id: <20230125130024.158721-2-shentey@gmail.com> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2023-02-05hw/pci-host/mv64361: Reuse pci_swizzle_map_irq_fnBernhard Beschow1-6/+1
mv64361_pcihost_map_irq() is a reimplementation of pci_swizzle_map_irq_fn(). Resolve this redundancy. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu> Message-Id: <20230106113927.8603-1-shentey@gmail.com> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2023-02-05ppc/pegasos2: Improve readability of VIA south bridge creationBALATON Zoltan1-7/+7
Slightly improve readability of creating the south btidge by cnamging type of a local variable to avoid some casts within function arguments which makes some lines shorter and easier to read. Also remove an unneded line break. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20230117214545.5E191746369@zero.eik.bme.hu> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2023-02-04Merge tag 'pull-monitor-2023-02-03-v2' of https://repo.or.cz/qemu/armbru ↵Peter Maydell8-0/+1022
into staging Monitor patches for 2023-02-03 # -----BEGIN PGP SIGNATURE----- # # iQJGBAABCAAwFiEENUvIs9frKmtoZ05fOHC0AOuRhlMFAmPeAkgSHGFybWJydUBy # ZWRoYXQuY29tAAoJEDhwtADrkYZTUagP/iZ24jXaWoFOKaO70wdQ/tdoQObWZnUV # 8xJNJYmYYbWoiq9wQXHebi/yEgBudso1lLzAnp8lsF12ybnNV1zsjyV/yumEKSNW # 3nL1NZIcuY9IDmCe97clY9nm9H2lUhjjyCG3gnjg+uC3JjlSjO/T8lbkdT+fYnkR # AInVTCPYFjSO9MIOhN0WNIY73HlAjr4zx5TEgS/D4pFj6iGq2qEniSDGMRf+/fVr # uSbIXbQlum+VAdxbGMSVf8yQPlNcFUXUpSJrbgJE272H6saQuvn5mkwD0RcYXyaI # OlfXpATDRNTsP3yYImxgr7y29Exo1HnCuC6T1n/+fwkirtMR3a7X6XjaQwFsWcrx # xxGiHQOve3r/I3DAO6A64T2ceD/XuI43LygqkkljfuoXifnJz7Lo39P9HrY0dhpC # KSld2n/Vv4xYyykvqAzpvzijwq679ILIbTplhm9gOrfrDRZjWad3uLAcYxsTXXR8 # BQbHGovcAzTOEx/0Quo3NThpAeNYPGyrPz3xBIV+XtPJGWvFsrA/s/po4qWDTmF6 # UTzPoEmznsD+DRboNOKfinCsOnpTAru4gbXevi7sfmMHQbLYN5xgsrF7WdlaxWa6 # 4QbJyNUq0O+aL0gyfVLuiZBCQ32Jaz1WvowK856Yl4jwczP5HM0ujyyM75+Kx072 # PdnMgxYYLSij # =d+wL # -----END PGP SIGNATURE----- # gpg: Signature made Sat 04 Feb 2023 06:59:20 GMT # gpg: using RSA key 354BC8B3D7EB2A6B68674E5F3870B400EB918653 # gpg: issuer "armbru@redhat.com" # gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" [full] # gpg: aka "Markus Armbruster <armbru@pond.sub.org>" [full] # Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653 * tag 'pull-monitor-2023-02-03-v2' of https://repo.or.cz/qemu/armbru: (35 commits) monitor: Rename misc.c to hmp-target.c monitor: Loosen coupling between misc.c and monitor.c slightly monitor: Move remaining QMP stuff from misc.c to qmp-cmds.c monitor: Move remaining HMP commands from misc.c to hmp-cmds.c monitor: Move target-dependent HMP commands to hmp-cmds-target.c monitor: Move monitor_putc() next to monitor_puts & external linkage monitor: Split file descriptor passing stuff off misc.c qdev: Move HMP command completion from monitor to softmmu/ acpi: Move the QMP command from monitor/ to hw/acpi/ stats: Move HMP commands from monitor/ to stats/ stats: Move QMP commands from monitor/ to stats/ runstate: Move HMP commands from monitor/ to softmmu/ tpm: Move HMP commands from monitor/ to softmmu/ virtio: Move HMP commands from monitor/ to hw/virtio/ migration: Move the QMP command from monitor/ to migration/ migration: Move HMP commands from monitor/ to migration/ net: Move hmp_info_network() to net-hmp-cmds.c net: Move HMP commands from monitor to net/ hmp: Rewrite strlist_from_comma_list() as hmp_split_at_comma() rocker: Move HMP commands from monitor to hw/net/rocker/ ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-02-04acpi: Move the QMP command from monitor/ to hw/acpi/Markus Armbruster2-0/+31
This moves the command from MAINTAINERS section "QMP" to section "ACPI/SMBIOS)". Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20230124121946.1139465-25-armbru@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2023-02-04virtio: Move HMP commands from monitor/ to hw/virtio/Markus Armbruster2-0/+322
This moves these commands from MAINTAINERS section "Human Monitor (HMP)" to "virtio". Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20230124121946.1139465-20-armbru@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2023-02-04rocker: Move HMP commands from monitor to hw/net/rocker/Markus Armbruster2-0/+317
This moves these commands from MAINTAINERS section "Human Monitor (HMP)" to "Rocker" and "Network devices". Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20230124121946.1139465-14-armbru@redhat.com>
2023-02-04machine: Move HMP commands from monitor/ to hw/core/Markus Armbruster1-0/+208
This moves these commands from MAINTAINERS section "Human Monitor (HMP)" to "Machine core". Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20230124121946.1139465-11-armbru@redhat.com>
2023-02-04machine: Move QMP commands from monitor/ to hw/core/Markus Armbruster1-0/+144
This moves these commands from MAINTAINERS section "QMP" to "Machine core". Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20230124121946.1139465-10-armbru@redhat.com>
2023-02-03Merge tag 'pull-target-arm-20230203' of ↵Peter Maydell4-118/+200
https://git.linaro.org/people/pmaydell/qemu-arm into staging target-arm queue: * Fix physical address resolution for Stage2 * pl011: refactoring, implement reset method * Support GICv3 with hvf acceleration * sbsa-ref: remove cortex-a76 from list of supported cpus * Correct syndrome for ATS12NSO* traps at Secure EL1 * Fix priority of HSTR_EL2 traps vs UNDEFs * Implement FEAT_FGT for '-cpu max' # -----BEGIN PGP SIGNATURE----- # # iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmPdGisZHHBldGVyLm1h # eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3iTND/4qnI00PcqPhdZAD083admx # Tn+7OaTd8aaWHDMvbnV3fNsvAEt//j8DdzeBGDLbgfhBuOCPB8z7oDSr7oqczmys # Yjnh25o6IDUYtMnKR+dBwFKGvAqWwM4UdEllkHJvvM+QpnlH7iu9lCkgYr6PvBYA # h4ajfZ5J7C2OmFJZqsKa2Ot3mveFxos1QzgWSmsWNGTJiZTOCiD7AvuCnEsBBaVP # pESY+5eGjVmjv6ocHxcHG4LA456bHAf6JiCgKqgwowRBlJenpsnNgKleIN4gQA/J # wtfLALNe6FkTV9tzK/MgtO1qOhxkUHrnTrYTtTLmk4H1VryFdDvomYB34zBIgfMY # l1LmMba6UCoxtck13D5jv1xkE56o7Z3kqrhyOvP+aHFdi+dvYQ/z+b8pqUeYeSiu # EbVWa/270JwVdbBT08vfW33Ci9n7fxZtRCrvj2viMgOiQOKwXYEb5AVxM9TRZSKC # Y+1m5frW2HQ+KNvjEyHdMJ8q4nFhaS5Bq2A2RMaQCV2QBuBJvFkGL3ul6M0lw/eq # cAZDKN6H/8N2l2DPcPHUy6RMiqUPSnemvFI814ElKeHGa1V1c7Iw9C4lWAV5Ue5E # gotHC1ros89xV0Eg0gaB9UgX8TgbQUfc3g1g6YUvTCfQdvxL0H1rY+wUWU1h1V2r # VdhxI95gUkgmoVnk8KnwIw== # =hk0j # -----END PGP SIGNATURE----- # gpg: Signature made Fri 03 Feb 2023 14:28:59 GMT # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # gpg: aka "Peter Maydell <peter@archaic.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * tag 'pull-target-arm-20230203' of https://git.linaro.org/people/pmaydell/qemu-arm: (33 commits) target/arm: Enable FEAT_FGT on '-cpu max' target/arm: Implement MDCR_EL2.TDCC and MDCR_EL3.TDCC traps target/arm: Implement the HFGITR_EL2.SVC_EL0 and SVC_EL1 traps target/arm: Implement the HFGITR_EL2.ERET trap target/arm: Mark up sysregs for HFGITR bits 48..63 target/arm: Mark up sysregs for HFGITR bits 18..47 target/arm: Mark up sysregs for HFGITR bits 12..17 target/arm: Mark up sysregs for HFGITR bits 0..11 target/arm: Mark up sysregs for HDFGRTR bits 12..63 target/arm: Mark up sysregs for HDFGRTR bits 0..11 target/arm: Mark up sysregs for HFGRTR bits 36..63 target/arm: Mark up sysregs for HFGRTR bits 24..35 target/arm: Mark up sysregs for HFGRTR bits 12..23 target/arm: Mark up sysregs for HFGRTR bits 0..11 target/arm: Implement FGT trapping infrastructure target/arm: Define the FEAT_FGT registers target/arm: Disable HSTR_EL2 traps if EL2 is not enabled target/arm: Make HSTR_EL2 traps take priority over UNDEF-at-EL1 target/arm: All UNDEF-at-EL0 traps take priority over HSTR_EL2 traps target/arm: Move do_coproc_insn() syndrome calculation earlier ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-02-03target/arm: Mark up sysregs for HFGRTR bits 36..63Peter Maydell1-0/+2
Mark up the sysreg definitions for the registers trapped by HFGRTR/HFGWTR bits 36..63. Of these, some correspond to RAS registers which we implement as always-UNDEF: these don't need any extra handling for FGT because the UNDEF-to-EL1 always takes priority over any theoretical FGT-trap-to-EL2. Bit 50 (NACCDATA_EL1) is for the ACCDATA_EL1 register which is part of the FEAT_LS64_ACCDATA feature which we don't yet implement. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Tested-by: Fuad Tabba <tabba@google.com> Message-id: 20230130182459.3309057-14-peter.maydell@linaro.org Message-id: 20230127175507.2895013-14-peter.maydell@linaro.org
2023-02-03sbsa-ref: remove cortex-a76 from list of supported cpusMarcin Juszkiewicz1-1/+0
Cortex-A76 supports 40bits of address space. sbsa-ref's memory starts above this limit. Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20230126114416.2447685-1-marcin.juszkiewicz@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-02-03hw/arm/virt: Make accels in GIC finalize logic explicitAlexander Graf1-1/+6
Let's explicitly list out all accelerators that we support when trying to determine the supported set of GIC versions. KVM was already separate, so the only missing one is HVF which simply reuses all of TCG's emulation code and thus has the same compatibility matrix. Signed-off-by: Alexander Graf <agraf@csgraf.de> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Cornelia Huck <cohuck@redhat.com> Reviewed-by: Zenghui Yu <yuzenghui@huawei.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20221223090107.98888-3-agraf@csgraf.de [PMM: Added qtest to the list of accelerators] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-02-03hw/arm/virt: Consolidate GIC finalize logicAlexander Graf1-96/+102
Up to now, the finalize_gic_version() code open coded what is essentially a support bitmap match between host/emulation environment and desired target GIC type. This open coding leads to undesirable side effects. For example, a VM with KVM and -smp 10 will automatically choose GICv3 while the same command line with TCG will stay on GICv2 and fail the launch. This patch combines the TCG and KVM matching code paths by making everything a 2 pass process. First, we determine which GIC versions the current environment is able to support, then we go through a single state machine to determine which target GIC mode that means for us. After this patch, the only user noticable changes should be consolidated error messages as well as TCG -M virt supporting -smp > 8 automatically. Signed-off-by: Alexander Graf <agraf@csgraf.de> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Cornelia Huck <cohuck@redhat.com> Reviewed-by: Zenghui Yu <yuzenghui@huawei.com> Message-id: 20221223090107.98888-2-agraf@csgraf.de Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-02-03hvf: arm: Add support for GICv3Alexander Graf1-1/+15
We currently only support GICv2 emulation. To also support GICv3, we will need to pass a few system registers into their respective handler functions. This patch adds support for HVF to call into the TCG callbacks for GICv3 system register handlers. This is safe because the GICv3 TCG code is generic as long as we limit ourselves to EL0 and EL1 - which are the only modes supported by HVF. To make sure nobody trips over that, we also annotate callbacks that don't work in HVF mode, such as EL state change hooks. With GICv3 support in place, we can run with more than 8 vCPUs. Signed-off-by: Alexander Graf <agraf@csgraf.de> Message-id: 20230128224459.70676-1-agraf@csgraf.de Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-02-03hw/char/pl011: better handling of FIFO flags on LCR resetEvgeny Iakovlev1-5/+13
Current FIFO handling code does not reset RXFE/RXFF flags when guest resets FIFO by writing to UARTLCR register, although internal FIFO state is reset to 0 read count. Actual guest-visible flag update will happen only on next data read or write attempt. As a result of that any guest that expects RXFE flag to be set (and RXFF to be cleared) after resetting FIFO will never see that happen. Signed-off-by: Evgeny Iakovlev <eiakovlev@linux.microsoft.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20230123162304.26254-5-eiakovlev@linux.microsoft.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-02-03hw/char/pl011: implement a reset methodEvgeny Iakovlev1-5/+21
PL011 currently lacks a reset method. Implement it. Signed-off-by: Evgeny Iakovlev <eiakovlev@linux.microsoft.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20230123162304.26254-4-eiakovlev@linux.microsoft.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-02-03hw/char/pl011: add post_load hook for backwards-compatibilityEvgeny Iakovlev1-0/+25
Previous change slightly modified the way we handle data writes when FIFO is disabled. Previously we kept incrementing read_pos and were storing data at that position, although we only have a single-register-deep FIFO now. Then we changed it to always store data at pos 0. If guest disables FIFO and the proceeds to read data, it will work out fine, because we still read from current read_pos before setting it to 0. However, to make code less fragile, introduce a post_load hook for PL011State and move fixup read FIFO state when FIFO is disabled. Since we are introducing a post_load hook, also do some sanity checking on untrusted incoming input state. Signed-off-by: Evgeny Iakovlev <eiakovlev@linux.microsoft.com> Message-id: 20230123162304.26254-3-eiakovlev@linux.microsoft.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-02-03hw/char/pl011: refactor FIFO depth handling codeEvgeny Iakovlev1-12/+18
PL011 can be in either of 2 modes depending guest config: FIFO and single register. The last mode could be viewed as a 1-element-deep FIFO. Current code open-codes a bunch of depth-dependent logic. Refactor FIFO depth handling code to isolate calculating current FIFO depth. One functional (albeit guest-invisible) side-effect of this change is that previously we would always increment s->read_pos in UARTDR read handler even if FIFO was disabled, now we are limiting read_pos to not exceed FIFO depth (read_pos itself is reset to 0 if user disables FIFO). Signed-off-by: Evgeny Iakovlev <eiakovlev@linux.microsoft.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20230123162304.26254-2-eiakovlev@linux.microsoft.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-02-03hw/arm: Use TYPE_ARM_SMMUV3Richard Henderson2-2/+3
Use the macro instead of two explicit string literals. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Eric Auger <eric.auger@redhat.com> Message-id: 20230124232059.4017615-1-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-02-03Merge tag 'for-upstream' of https://repo.or.cz/qemu/kevin into stagingPeter Maydell2-1/+40
Block layer patches - qemu-img info: Show protocol-level information - Move more functions to coroutines - Make coroutine annotations ready for static analysis - qemu-img: Fix exit code for errors closing the image - qcow2 bitmaps: Fix theoretical corruption in error path - pflash: Only load non-zero parts of backend image to save memory - Code cleanup and test case improvements # -----BEGIN PGP SIGNATURE----- # # iQJFBAABCAAvFiEE3D3rFZqa+V09dFb+fwmycsiPL9YFAmPajLURHGt3b2xmQHJl # ZGhhdC5jb20ACgkQfwmycsiPL9aLjg//bk2uodtEZ1X1y/vU3Lmcqd2wh9gv4f9L # csFFf17rrxce/m+4daVISHAzS+Zrwpgixt+vMm2dP+jQTZOg0G7/rcaRYYAYa29Y # Lepr2Qsz0V6HnNpuvUE5hrXiJXU7w5InikLlnoTnwa2H2Nr/wMlzkPX1wh4OdaBy # 5KG/sjGVsaotrIdYjI3HnTvU/eytn1IcvLwqcTP2M7u8UMNyZkALyDjbC5QxBkwh # TPVXNGCeDrD6atDOvsmBCkNM3kTmfsGoP5mYyJK5V6iARYV19Nt8tdmt094EFmHk # VBgeY9y+Q6BctcDe31961+oFqGrsLnT3J7mHDhAoaO0BM8wwWCHfCA7yasmGjCj5 # HGE7/UJ8DYwGQ9T9N8gsx8NmsfyWgIcyRQGuzld72B4FTzES9NXS1JTUFAZHrDUl # IIaL5bh8aycBKprDBTwvz07a6sDkvmxiR2G0TuS7kFev5O7+qW9dH517PWOWbsRA # 3+ICzsHCUE2GLi83KkRkBEqRW0CnNmA9qzWNdPdQ0egsEAtNqmJGaFPRLYqQ0ZwR # gbu7+eK4kUyfqpqieeFxBY53THLE4yxZ3lcg4yFoQWQfKdTCYo69qUNK5AV1hvKY # TzNAuNbOsipL06dRWy4jInbhzenbiYechyEuoqFv0PpHe1D+JrL8QA2hI/JHDwls # enNpKYXdkn4= # =Wf8w # -----END PGP SIGNATURE----- # gpg: Signature made Wed 01 Feb 2023 16:00:53 GMT # gpg: using RSA key DC3DEB159A9AF95D3D7456FE7F09B272C88F2FD6 # gpg: issuer "kwolf@redhat.com" # gpg: Good signature from "Kevin Wolf <kwolf@redhat.com>" [full] # Primary key fingerprint: DC3D EB15 9A9A F95D 3D74 56FE 7F09 B272 C88F 2FD6 * tag 'for-upstream' of https://repo.or.cz/qemu/kevin: (38 commits) qemu-img: Change info key names for protocol nodes qemu-img: Let info print block graph iotests/106, 214, 308: Read only one size line iotests: Filter child node information block/qapi: Add indentation to bdrv_node_info_dump() block/qapi: Introduce BlockGraphInfo block/qapi: Let bdrv_query_image_info() recurse qemu-img: Use BlockNodeInfo block: Split BlockNodeInfo off of ImageInfo block/vmdk: Change extent info type block/file: Add file-specific image info block: Improve empty format-specific info dump block/nbd: Add missing <qemu/bswap.h> include block: Rename bdrv_load/save_vmstate() to bdrv_co_load/save_vmstate() block: Convert bdrv_debug_event() to co_wrapper_mixed block: Convert bdrv_lock_medium() to co_wrapper block: Convert bdrv_eject() to co_wrapper block: Convert bdrv_get_info() to co_wrapper_mixed block: Convert bdrv_get_allocated_file_size() to co_wrapper block: use bdrv_co_refresh_total_sectors when possible ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-02-02Merge tag 'pull-request-2023-01-31' of https://gitlab.com/thuth/qemu into ↵Peter Maydell1-7/+0
staging * qtest improvements * Remove the deprecated OTP config of sifive_u * Add libfdt to some of our CI jobs that were still missing it * Use __builtin_bswap() everywhere (all compiler versions support it now) * Deprecate the HAXM accelerator * Document PCI devices handling on s390x * Make Audiodev introspectable * Improve the runtime of some CI jobs # -----BEGIN PGP SIGNATURE----- # # iQJFBAABCAAvFiEEJ7iIR+7gJQEY8+q5LtnXdP5wLbUFAmPY59YRHHRodXRoQHJl # ZGhhdC5jb20ACgkQLtnXdP5wLbXzhxAAmoq2j2sbAf2Vr9tz6Ez2p9oKNYnzUEWb # NGXdvQMcVFKIdjvSYt5ozLC53OFIzuS74X7oHKbdLvGzez3nMCijZIbzN6vNnvd9 # HNGum4blNwHEfQcY9hr9y30Iurc7CQu6VtwGF+XXdzQZDbPz1Z4AWvtPTLcTbkxa # PskYJfFvow/oaTHDA/7t+90cxCOixKvQMKXL5ATCtMRGnjlbOAEoPbXUB+yM24mk # 9qp1L/8h8pvXfeXlFj+KETmu+eE5ETEOQtqc2KhQqqze2+VMKYxSX2H+sNkJBPDP # En8Mpy+fEdefu8Jcu+M2kMLhf1f3LVf9uARhLZY4/xmOYFg+F3xzwpshnH1bs+Kw # IzWP84uHjE77jSy/wKvYiCx2hdCDwO0G+zym67D1fPzvjzKzUNprV4OIuRzTWah3 # 6Zli5uuaLrBNjR8SJB1HDmLGKDFgToH9dzfLPtDmW8UPJGkAGcBbPKktLTe5y/4E # del99NqpTx5SAqMmbSMRPZ/vZ7ITdfB0Av3a0GdO8j7eSPb9BOsoZOVD2/iUzab/ # P0dBuNqMM8fwywVKqcK+0CJ/npWIJvOqqlwSDqhY1A78G/uRuapOqUwsB/LWRFv5 # /1VvHfA2rv4l9o66N5jssS5/D1v5p/UBB6JvlTUvuoJMFTXa9de9XFxYxfkyiaAz # LJl+Dh+aeWk= # =uq7y # -----END PGP SIGNATURE----- # gpg: Signature made Tue 31 Jan 2023 10:05:10 GMT # gpg: using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5 # gpg: issuer "thuth@redhat.com" # gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full] # gpg: aka "Thomas Huth <thuth@redhat.com>" [full] # gpg: aka "Thomas Huth <huth@tuxfamily.org>" [full] # gpg: aka "Thomas Huth <th.huth@posteo.de>" [unknown] # Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5 * tag 'pull-request-2023-01-31' of https://gitlab.com/thuth/qemu: (27 commits) gitlab-ci.d/buildtest: Merge the --without-default-* jobs tests/qtest/display-vga-test: Add proper checks if a device is available gitlab-ci.d/buildtest: Remove ppc-softmmu from the clang-system job qapi, audio: Make introspection reflect build configuration more closely qapi, audio: add query-audiodev command docs/s390x/pcidevices: document pci devices on s390x tests/qtest/boot-serial-test: Constify tests[] array tests/qtest/vnc-display-test: Disable on Darwin tests/qtest/vnc-display-test: Use the 'none' machine tests/qtest/vnc-display-test: Suppress build warnings on Windows tests/tcg: Do not build/run TCG tests if TCG is disabled docs/about/deprecated: Mark HAXM in QEMU as deprecated MAINTAINERS: Abort HAXM maintenance qemu/bswap: Use compiler __builtin_bswap() on NetBSD qemu/bswap: Use compiler __builtin_bswap() on FreeBSD qemu/bswap: Use compiler __builtin_bswap() on Haiku qemu/bswap: Remove <byteswap.h> dependency qemu/bswap: Replace bswapXXs() by compiler __builtin_bswap() qemu/bswap: Replace bswapXX() by compiler __builtin_bswap() tests/docker/dockerfiles: Add libfdt to the i386 and to the riscv64 container ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-02-01block: Convert bdrv_refresh_total_sectors() to co_wrapper_mixedEmanuele Giuseppe Esposito1-0/+5
BlockDriver->bdrv_getlength is categorized as IO callback, and it currently doesn't run in a coroutine. We should let it take a graph rdlock since the callback traverses the block nodes graph, which however is only possible in a coroutine. Therefore turn it into a co_wrapper to move the actual function into a coroutine where the lock can be taken. Because now this function creates a new coroutine and polls, we need to take the AioContext lock where it is missing, for the only reason that internally co_wrapper calls AIO_WAIT_WHILE and it expects to release the AioContext lock. This is especially messy when a co_wrapper creates a coroutine and polls in bdrv_open_driver, because this function has so many callers in so many context that it can easily lead to deadlocks. Therefore the new rule for bdrv_open_driver is that the caller must always hold the AioContext lock of the given bs (except if it is a coroutine), because the function calls bdrv_refresh_total_sectors() which is now a co_wrapper. Once the rwlock is ultimated and placed in every place it needs to be, we will poll using AIO_WAIT_WHILE_UNLOCKED and remove the AioContext lock. Signed-off-by: Emanuele Giuseppe Esposito <eesposit@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com> Message-Id: <20230113204212.359076-7-kwolf@redhat.com> Reviewed-by: Emanuele Giuseppe Esposito <eesposit@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2023-01-28Revert "vhost-user: Introduce nested event loop in vhost_user_read()"Greg Kurz1-60/+5
This reverts commit a7f523c7d114d445c5d83aecdba3efc038e5a692. The nested event loop is broken by design. It's only user was removed. Drop the code as well so that nobody ever tries to use it again. I had to fix a couple of trivial conflicts around return values because of 025faa872bcf ("vhost-user: stick to -errno error return convention"). Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <20230119172424.478268-3-groug@kaod.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Acked-by: Maxime Coquelin <maxime.coquelin@redhat.com>
2023-01-28Revert "vhost-user: Monitor slave channel in vhost_user_read()"Greg Kurz1-32/+3
This reverts commit db8a3772e300c1a656331a92da0785d81667dc81. Motivation : this is breaking vhost-user with DPDK as reported in [0]. Received unexpected msg type. Expected 22 received 40 Fail to update device iotlb Received unexpected msg type. Expected 40 received 22 Received unexpected msg type. Expected 22 received 11 Fail to update device iotlb Received unexpected msg type. Expected 11 received 22 vhost VQ 1 ring restore failed: -71: Protocol error (71) Received unexpected msg type. Expected 22 received 11 Fail to update device iotlb Received unexpected msg type. Expected 11 received 22 vhost VQ 0 ring restore failed: -71: Protocol error (71) unable to start vhost net: 71: falling back on userspace virtio The failing sequence that leads to the first error is : - QEMU sends a VHOST_USER_GET_STATUS (40) request to DPDK on the master socket - QEMU starts a nested event loop in order to wait for the VHOST_USER_GET_STATUS response and to be able to process messages from the slave channel - DPDK sends a couple of legitimate IOTLB miss messages on the slave channel - QEMU processes each IOTLB request and sends VHOST_USER_IOTLB_MSG (22) updates on the master socket - QEMU assumes to receive a response for the latest VHOST_USER_IOTLB_MSG but it gets the response for the VHOST_USER_GET_STATUS instead The subsequent errors have the same root cause : the nested event loop breaks the order by design. It lures QEMU to expect responses to the latest message sent on the master socket to arrive first. Since this was only needed for DAX enablement which is still not merged upstream, just drop the code for now. A working solution will have to be merged later on. Likely protect the master socket with a mutex and service the slave channel with a separate thread, as discussed with Maxime in the mail thread below. [0] https://lore.kernel.org/qemu-devel/43145ede-89dc-280e-b953-6a2b436de395@redhat.com/ Reported-by: Yanghang Liu <yanghliu@redhat.com> Buglink: https://bugzilla.redhat.com/show_bug.cgi?id=2155173 Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <20230119172424.478268-2-groug@kaod.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Acked-by: Stefan Hajnoczi <stefanha@redhat.com> Acked-by: Maxime Coquelin <maxime.coquelin@redhat.com>
2023-01-28hw: Use TYPE_PCI_BUS definition where appropriatePhilippe Mathieu-Daudé2-2/+4
Use the proper QOM type definition instead of magic string. This also helps during eventual refactor while using git-grep. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20230117193014.83502-1-philmd@linaro.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Eric Auger <eric.auger@redhat.com>
2023-01-28vhost-user: Skip unnecessary duplicated VHOST_USER_ADD/REM_MEM_REG requestsMinghao Yuan1-0/+2
The VHOST_USER_ADD/REM_MEM_REG requests should be categorized into non-vring specific messages, and should be sent only once. Signed-off-by: Minghao Yuan <yuanmh12@chinatelecom.cn> Message-Id: <20230123122119.194347-1-yuanmh12@chinatelecom.cn> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2023-01-28pcihp: generate populated non-hotpluggble slot descriptions on non-hotplug pathIgor Mammedov1-15/+12
Generating slots descriptions populated by non-hotpluggable devices is akward at best and complicates hotplug path (build_append_pcihp_slots) needlessly, and builds only dynamic _DSM for such slots which is overlkill. Clean it up and let non-hotplug path (build_append_pci_bus_devices) to handle that task. Such clean up effectively drops dynamic _DSM methods on non-hotpluggable slots (even though bus itself is hotpluggable), but in practice it affects only built-in devices (ide controllers/various bridges) that don't use acpi-index anyways so effectively it doesn't matter (NICs are hotpluggble). Follow up series will add static _DSM for non-hotpluggble devices/buses that will not depend on ACPI PCI hotplug at all, and potentially would allows us to reuse non-hotplug path elsewhere (PBX/microvm/arm-virt), including new support for acpi-index for non-hotpluggable devices. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20230112140312.3096331-40-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2023-01-28pcihp: acpi: ignore coldplugged bridges when composing hotpluggable slotsIgor Mammedov1-10/+6
coldplugged bridges are not unpluggable, so there is no need to describe slots where they are plugged as hotpluggable. To that effect we have a condition that marks slot as non-hotpluggable if it's populated by coldplugged bridge and prevents generation _SUN/_EJ0 objects for it. That leaves dynamic _DSM method on such slot (which also depends on BSEL and pcihp hardware). This _DSM method provides only dynamic acpi-index support so far, which is not actually used/supported by linux kernel for bridges and it's doubtful there will be need for it at all. So it's rather pointless to generate acpi-index related AML for bridges and we can simplify hotplug slots generator a bit more by completely ignoring coldplugged bridges on hotplug path. Another point in favor of dropping dynamic _DSM support, is that we can replace it with static _DSM if necessary since a slot with bridge can't change during VM runtime and without any dependency on ACPI PCI hotplug at that. Later I plan to implement bridge specific static _DSM PCI Firmware Specification 3.2 4.6.5. _DSM for Ignoring PCI Boot Configurations part of spec, to fix longstanding issue with fixed IO/MEM resource assignment that often leads to hotplugged device being in-operational within the guest due limited IO/MEM windows programmed on bridge at boot time. Expected change when coldplugged bridge is ignored by hotplug code, should look like: - Scope (S18) - { - Name (ASUN, 0x03) - Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method - { - Local0 = Package (0x02) - { - BSEL, - ASUN - } - Return (PDSM (Arg0, Arg1, Arg2, Arg3, Local0)) - } - } Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20230112140312.3096331-37-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2023-01-28pcihp: acpi: decouple hotplug and generic slots descriptionIgor Mammedov1-49/+72
Split build_append_pci_bus_devices() onto generic part that builds AML descriptions only for populated slots which is applicable to both hotplug disabled and enabled bridges. And a hotplug only part that complements generic AML with hotplug depended bits (that depend on BSEL), like _SUN/_EJ0 entries, dynamic _DSM. Hotplug part, will generate full 'Device' descriptors for non-populated slots (like it used to be) and complementary 'Scope' descriptors for populated slots that are hotplug capable. i.e. something like this: - ... + Name (BSEL, 0x03) + Scope (S00) + { + Name (ASUN, Zero) + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + Local0 = Package (0x02) + { + BSEL, + ASUN + } + Return (PDSM (Arg0, Arg1, Arg2, Arg3, Local0)) + } + [ ... other hotplug depended bits ] + } While generic build_append_pci_bus_devices() still calls hotplug part at its end it doesn't really depend on any hotplug bits anymore and later both could be completely separated when it's necessary. Main benefit though is that both build_append_pci_bus_devices() and build_append_pcihp_slots() become more readable and it makes easier to modify them with less risk of affecting another part. Also it opens possibility to re-use generic part elsewhere (microvm, arm/virt). Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20230112140312.3096331-34-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2023-01-28pcihp: isolate rule whether slot should be described in DSDTIgor Mammedov1-40/+43
Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20230112140312.3096331-32-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2023-01-28pci: make sure pci_bus_is_express() won't error out with "discards ↵Igor Mammedov1-1/+1
‘const’ qualifier" function doesn't need RW aceess to passed in bus pointer, make it const. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20230112140312.3096331-31-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2023-01-28pcihp: make bridge describe itself using AcpiDevAmlIfClass:build_dev_amlIgor Mammedov7-16/+66
simplify build_append_pci_bus_devices() a bit by handling bridge specific logic in bridge dedicated AcpiDevAmlIfClass::build_dev_aml callback. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20230112140312.3096331-30-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2023-01-28pci: acpi: wire up AcpiDevAmlIf interface to generic bridgeIgor Mammedov1-0/+5
... so that the concrete impl. won't has to duplicate it every time. By default it doesn't do anything unless leaf class defines and sets AcpiDevAmlIfClass::build_dev_aml handler. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20230112140312.3096331-29-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2023-01-28x86: pcihp: acpi: prepare slot ignore rule to work with self describing bridgesIgor Mammedov1-8/+16
Before switching pci bridges to AcpiDevAmlIf interface, ensure that ignored slots are handled correctly. (existing rule works but only if bridge doesn't have AcpiDevAmlIf interface). While at it rewrite related comments to be less confusing (hopefully). Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20230112140312.3096331-28-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2023-01-28pcihp: do not put empty PCNT in DSDTIgor Mammedov1-8/+18
count number of PCNT methods that actually call Notify and if there aren't any, drop PCNT altogether. It mostly affects 'Q35' tests where there is no root-ports /bridges attached and 'PC' machine when ACPI PCI hotplug is completely disabled. Expected ASL change: - Method (PCNT, 0, NotSerialized) - { - } ... Method (_E01, 0, NotSerialized) // _Exx: Edge-Triggered GPE { - Acquire (\_SB.PCI0.BLCK, 0xFFFF) - \_SB.PCI0.PCNT () - Release (\_SB.PCI0.BLCK) } Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20230112140312.3096331-23-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
generated by cgit v1.1 at 2025-01-01 02:32:51 +0000