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2018-06-08ide: introduce ide_transfer_start_norecursePaolo Bonzini2-23/+35
For the case where the end_transfer_func is also the caller of ide_transfer_start, the mutual recursion can lead to unlimited stack usage. Introduce a new version that can be used to change tail recursion into a loop, and use it in trace_ide_atapi_cmd_reply_end. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: John Snow <jsnow@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180606190955.20845-8-jsnow@redhat.com Signed-off-by: John Snow <jsnow@redhat.com>
2018-06-08atapi: call ide_set_irq before ide_transfer_startPaolo Bonzini1-2/+2
The ATAPI_INT_REASON_IO interrupt is raised when I/O starts, but in the AHCI case ide_set_irq was actually called at the end of a mutual recursion. Move it early, with the side effect that ide_transfer_start becomes a tail call in ide_atapi_cmd_reply_end. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: John Snow <jsnow@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180606190955.20845-7-jsnow@redhat.com Signed-off-by: John Snow <jsnow@redhat.com>
2018-06-08ide: make ide_transfer_stop idempotentPaolo Bonzini1-10/+4
There is code checking s->end_transfer_func and it was not taught about ide_transfer_cancel. We can just use ide_transfer_stop because s->end_transfer_func is only ever called in the DRQ phase. ide_transfer_cancel can then be removed, since it would just be calling ide_transfer_halt. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: John Snow <jsnow@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180606190955.20845-6-jsnow@redhat.com Signed-off-by: John Snow <jsnow@redhat.com>
2018-06-08ide: call ide_cmd_done from ide_transfer_stopPaolo Bonzini1-7/+4
The code can simply be moved to the sole caller that has notify == true. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: John Snow <jsnow@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180606190955.20845-5-jsnow@redhat.com Signed-off-by: John Snow <jsnow@redhat.com>
2018-06-08ide: push end_transfer_func out of start_transfer callback, rename callbackPaolo Bonzini3-11/+12
Now that end_transfer_func is a tail call in ahci_start_transfer, formalize the fact that the callback (of which ahci_start_transfer is the sole implementation) takes care of the transfer too: rename it to pio_transfer and, if it is present, call the end_transfer_func as soon as it returns. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: John Snow <jsnow@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180606190955.20845-4-jsnow@redhat.com Signed-off-by: John Snow <jsnow@redhat.com>
2018-06-08ahci: move PIO Setup FIS before transfer, fix it for ATAPI commandsJohn Snow1-11/+5
The PIO Setup FIS is written in the PIO:Entry state, which comes before the ATA and ATAPI data transfer states. As a result, the PIO Setup FIS interrupt is now raised before DMA ends for ATAPI commands, and tests have to be adjusted. This is also hinted by the description of the command header in the AHCI specification, where the "A" bit is described as When ‘1’, indicates that a PIO setup FIS shall be sent by the device indicating a transfer for the ATAPI command. and also by the description of the ACMD (ATAPI command region): The ATAPI command must be either 12 or 16 bytes in length. The length transmitted by the HBA is determined by the PIO setup FIS that is sent by the device requesting the ATAPI command. QEMU, which conflates the "generator" and the "receiver" of the FIS into one device, always uses ATAPI_PACKET_SIZE, aka 12, for the length. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180606190955.20845-3-jsnow@redhat.com Signed-off-by: John Snow <jsnow@redhat.com>
2018-06-08ahci: make ahci_mem_write traces more descriptiveJohn Snow2-2/+17
Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180531222835.16558-17-jsnow@redhat.com [Fixed format specifiers. --js] Signed-off-by: John Snow <jsnow@redhat.com>
2018-06-08ahci: delete old host register address definitionsJohn Snow1-6/+0
Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180531222835.16558-16-jsnow@redhat.com Signed-off-by: John Snow <jsnow@redhat.com>
2018-06-08ahci: adjust ahci_mem_write to work on registersJohn Snow1-6/+9
Actually, this function looks pretty broken, but for now, let's finish up what this series of commits came here to do. Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180531222835.16558-15-jsnow@redhat.com Signed-off-by: John Snow <jsnow@redhat.com>
2018-06-08ahci: fix spacing damage on ahci_mem_writeJohn Snow1-24/+23
Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180531222835.16558-14-jsnow@redhat.com Signed-off-by: John Snow <jsnow@redhat.com>
2018-06-08ahci: make mem_read_32 traces more descriptiveJohn Snow2-2/+8
Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180531222835.16558-13-jsnow@redhat.com Signed-off-by: John Snow <jsnow@redhat.com>
2018-06-08ahci: modify ahci_mem_read_32 to work on register numbersJohn Snow1-6/+11
Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180531222835.16558-12-jsnow@redhat.com Signed-off-by: John Snow <jsnow@redhat.com>
2018-06-08ahci: fix host register max addressJohn Snow1-2/+1
Yes, comment, it ought to be 0x2C. Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180531222835.16558-11-jsnow@redhat.com Signed-off-by: John Snow <jsnow@redhat.com>
2018-06-08ahci: add host register enumerationJohn Snow2-0/+30
Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180531222835.16558-10-jsnow@redhat.com Signed-off-by: John Snow <jsnow@redhat.com>
2018-06-08ahci: delete old port register address definitionsJohn Snow1-18/+0
They're now unused. Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180531222835.16558-9-jsnow@redhat.com Signed-off-by: John Snow <jsnow@redhat.com>
2018-06-08ahci: make port write traces more descriptiveJohn Snow2-2/+9
Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180531222835.16558-8-jsnow@redhat.com [Changed format specifier. --js] Signed-off-by: John Snow <jsnow@redhat.com>
2018-06-08ahci: modify ahci_port_write to use register numbersJohn Snow1-15/+17
Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180531222835.16558-7-jsnow@redhat.com Signed-off-by: John Snow <jsnow@redhat.com>
2018-06-08ahci: combine identical clauses in port writeJohn Snow1-4/+0
Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180531222835.16558-6-jsnow@redhat.com Signed-off-by: John Snow <jsnow@redhat.com>
2018-06-08ahci: fix spacing damage on ahci_port_writeJohn Snow1-73/+73
Churn. Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180531222835.16558-5-jsnow@redhat.com [Fix patchew/checkpatch nit. --js] Signed-off-by: John Snow <jsnow@redhat.com>
2018-06-08ahci: make port read traces more descriptiveJohn Snow2-3/+5
A trace is added to let us watch unimplemented registers specifically, as these are more likely to cause us trouble. Otherwise, the port read traces now tell us what register is getting hit, which is nicer. Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180531222835.16558-4-jsnow@redhat.com Signed-off-by: John Snow <jsnow@redhat.com>
2018-06-08ahci: modify ahci_port_read to use register numbersJohn Snow1-19/+19
Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180531222835.16558-3-jsnow@redhat.com Signed-off-by: John Snow <jsnow@redhat.com>
2018-06-08ahci: add port register enumerationJohn Snow2-0/+54
Instead of tracking offsets, lets count the registers. Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180531222835.16558-2-jsnow@redhat.com Signed-off-by: John Snow <jsnow@redhat.com>
2018-06-08ahci: don't schedule unnecessary BHJohn Snow1-2/+1
The comment gives us a hint. *Maybe* we still have something to process. Well, why not check? Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Jeff Cody <jcody@redhat.com> Message-id: 20180531004323.4611-4-jsnow@redhat.com Signed-off-by: John Snow <jsnow@redhat.com>
2018-06-08ahci: fix PxCI register raceJohn Snow1-7/+6
Fixes: https://bugs.launchpad.net/qemu/+bug/1769189 AHCI presently signals completion prior to the PxCI register being cleared to indicate completion. If a guest driver attempts to issue a new command in its IRQ handler, it might be surprised to learn there is still a command pending. In the case of Windows 10's boot driver, it will actually poll the IRQ register hoping to find out when the command is done running -- which will never happen, as there isn't a command running. Fix this: clear PxCI in ahci_cmd_done and not in the asynchronous BH. Because it now runs synchronously, we don't need to check if the command is actually done by spying on the ATA registers. We know it's done. CC: qemu-stable <qemu-stable@nongnu.org> Reported-by: François Guerraz <kubrick@fgv6.net> Tested-by: Bruce Rogers <brogers@suse.com> Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Jeff Cody <jcody@redhat.com> Message-id: 20180531004323.4611-3-jsnow@redhat.com Signed-off-by: John Snow <jsnow@redhat.com>
2018-06-08ahci: trim signatures on raise/lowerJohn Snow1-4/+4
These functions work on the AHCI device, not the individual AHCI devices, so trim the AHCIDevice argument. Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Jeff Cody <jcody@redhat.com> Message-id: 20180531004323.4611-2-jsnow@redhat.com Signed-off-by: John Snow <jsnow@redhat.com>
2018-06-08sdcard: Disable CMD19/CMD23 for Spec v2Philippe Mathieu-Daudé1-0/+6
These commands got introduced by Spec v3 (see 0c3fb03f7ec and 4481bbc79d2). Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180607180641.874-7-f4bug@amsat.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-08sdcard: Reflect when the Spec v3 is supported in the Config Register (SCR)Philippe Mathieu-Daudé1-2/+5
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20180607180641.874-6-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-08sdcard: Disable SEND_IF_COND (CMD8) for Spec v1Philippe Mathieu-Daudé1-1/+3
CMD8 is "Reserved" in Spec v1.10. Spec v2.00 introduces the SEND_IF_COND command: 6.4.1 Power Up CMD8 is newly added in the Physical Layer Specification Version 2.00 to support multiple voltage ranges and used to check whether the card supports supplied voltage. The version 2.00 or later host shall issue CMD8 and verify voltage before card initialization. The host that does not support CMD8 shall supply high voltage range. Message-Id: 201204252110.20873.paul@codesourcery.com Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180607180641.874-5-f4bug@amsat.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-08sdcard: Add a 'spec_version' property, default to Spec v2.00Philippe Mathieu-Daudé1-3/+20
As of this commit, the Spec v1 is not working, and all controllers expect the cards to be conformant to Spec v2. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20180607180641.874-4-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-08sdcard: Allow commands valid in SPI modePhilippe Mathieu-Daudé1-14/+0
From the "Physical Layer Simplified Specification Version 1.10" Chapter 7.3 "SPI Mode Transaction Packets" Table 57: "Commands and arguments" Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20180607180641.874-3-f4bug@amsat.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-08sdcard: Update the Configuration Register (SCR) to Spec Version 1.10Philippe Mathieu-Daudé1-2/+2
The initial implementation is based on the Specs v1.10 (see a1bb27b1e98). However the SCR is anouncing the card being v1.01. The new chapters added in version 1.10 are: 4.3.10 Switch function command Switch function command (CMD6) 1 is used to switch or expand memory card functions. [...] This is a new feature, introduced in SD physical Layer Specification Version 1.10. Therefore, cards that are compatible with earlier versions of the spec do not support it. The host shall check the "SD_SPEC" field in the SCR register to recognize what version of the spec the card complies with before using CMD6. It is mandatory for SD memory card of Ver1.10 to support CMD6. 4.3.11 High-Speed mode (25MB/sec interface speed) Though the Rev 1.01 SD memory card supports up to 12.5MB/sec interface speed, the speed of 25MB/sec is necessary to support increasing performance needs of the host and because of memory size which continues to grow. To achieve 25MB/sec interface speed, clock rate is increased to 50MHz and CLK/CMD/DAT signal timing and circuit conditions are reconsidered and changed from Physical Layer Specification Version 1.01. 4.3.12 Command system (This chapter is newly added in version 1.10) SD commands CMD34-37, CMD50, CMD57 are reserved for SD command system expansion via the switch command. [These commands] will be considered as illegal commands (as defined in revision 1.01 of the SD physical layer specification). The SWITCH_FUNCTION is implemented since the first commit, a1bb27b1e98. The 25MB/sec High-Speed mode was already updated in d7ecb867529. The current implementation does not implements CMD34-37, CMD50 and CMD57, thus these commands already return ILLEGAL. With this patch, the SCR register now matches the description of the header: * SD Memory Card emulation as defined in the "SD Memory Card Physical * layer specification, Version 1.10." Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180607180641.874-2-f4bug@amsat.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-08stellaris: Add trailing '\n' to qemu_log() callsPhilippe Mathieu-Daudé1-5/+6
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180606152128.449-8-f4bug@amsat.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-08hw/mips/boston: Add trailing '\n' to qemu_log() callsPhilippe Mathieu-Daudé1-4/+4
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180606152128.449-7-f4bug@amsat.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-08hw/core/register: Add trailing '\n' to qemu_log() callPhilippe Mathieu-Daudé1-1/+1
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20180606152128.449-6-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-08ppc/pnv: Add trailing '\n' to qemu_log() callsPhilippe Mathieu-Daudé1-2/+2
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: David Gibson <david@gibson.dropbear.id.au> Message-id: 20180606152128.449-5-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-08xilinx-dp: Add trailing '\n' to qemu_log() callPhilippe Mathieu-Daudé1-1/+3
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20180606152128.449-4-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-08hw/digic: Add trailing '\n' to qemu_log() callsPhilippe Mathieu-Daudé2-4/+4
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180606152128.449-3-f4bug@amsat.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-08hw/sd/milkymist-memcard: Add trailing '\n' to qemu_log() callPhilippe Mathieu-Daudé1-1/+1
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180606152128.449-2-f4bug@amsat.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-08hw/i2c: Add trace eventsPhilippe Mathieu-Daudé2-7/+25
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180606191801.6331-1-f4bug@amsat.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-08hw/arm: Remove the deprecated xlnx-ep108 machineThomas Huth1-60/+2
It has been marked as deprecated since QEMU v2.11, so it is time to remove this now. The xlnx-zcu102 machine is very much the same and can be used as a replacement instead. Signed-off-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-08ftgmac100: remove check on runt messagesCédric Le Goater1-6/+0
This is a ethernet wire limitation not needed in emulation. It breaks U-Boot n/w stack also. Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-id: 20180530061711.23673-5-clg@kaod.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-08ftgmac100: fix multicast hash routineCédric Le Goater1-2/+2
Based on the multicast hash calculation of the FTGMAC100 Linux driver. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180530061711.23673-4-clg@kaod.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-08ftgmac100: add IEEE 802.1Q VLAN supportCédric Le Goater1-1/+30
The ftgmac100 NIC supports VLAN tag insertion and the MAC engine also has a control to remove VLAN tags from received packets. The VLAN control bits and VLAN tag information are contained in the second word of the transmit and receive descriptors. The Insert VLAN bit and the VLAN Tag available bit are only valid in the first segment of the packet. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180530061711.23673-3-clg@kaod.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-08ftgmac100: compute maximum frame size depending on the protocolCédric Le Goater1-11/+12
The maximum frame size includes the CRC and depends if a VLAN tag is inserted or not. Adjust the frame size limit in the transmit handler using on the FTGMAC100State buffer size and in the receive handler use the packet protocol. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180530061711.23673-2-clg@kaod.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-08aspeed: add the pc9552 chips to the witherspoon machineCédric Le Goater1-0/+4
The pca9552 LED blinkers on the Witherspoon machine are used for leds but also as GPIOs to control fans and GPUs. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180530064049.27976-8-clg@kaod.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-08misc: add pca9552 LED blinker modelCédric Le Goater2-0/+241
Specs are available here : https://www.nxp.com/docs/en/application-note/AN264.pdf This is a simple model supporting the basic registers for led and GPIO mode. The device also supports two blinking rates but not the model yet. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180530064049.27976-7-clg@kaod.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-08aspeed: Add EEPROM I2C devicesCédric Le Goater1-0/+13
The Aspeed boards have at least one EEPROM to hold the Vital Product Data (VPD). Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Message-id: 20180530064049.27976-6-clg@kaod.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-08smbus: add a smbus_eeprom_init_one() routineCédric Le Goater1-5/+11
This is an helper routine to add a single EEPROM on an I2C bus. It can be directly used by smbus_eeprom_init() which adds a certain number of EEPROMs on mips and x86 machines. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180530064049.27976-5-clg@kaod.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-08aspeed: add an I2C RTC device to all machinesCédric Le Goater1-0/+19
The AST2500 EVB does not have an RTC but we can pretend that one is plugged on the I2C bus header. The romulus and witherspoon boards expects an Epson RX8900 I2C RTC but a ds1338 is good enough for the basic features we need. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Message-id: 20180530064049.27976-4-clg@kaod.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-08aspeed: add support for the witherspoon-bmc boardCédric Le Goater1-0/+49
The Witherspoon boards are OpenPOWER system hosting POWER9 Processors. Add support for their BMC including a couple of I2C devices as found on real HW. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Message-id: 20180530064049.27976-3-clg@kaod.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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