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2016-07-19qapi: Change Netdev into a flat unionEric Blake33-46/+46
This is a mostly-mechanical conversion that creates a new flat union 'Netdev' QAPI type that covers all the branches of the former 'NetClientOptions' simple union, where the branches are now listed in a new 'NetClientDriver' enum rather than generated from the simple union. The existence of a flat union has no change to the command line syntax accepted for new code, and will make it possible for a future patch to switch the QMP command to parse a boxed union for no change to valid QMP; but it does have some ripple effect on the C code when dealing with the new types. While making the conversion, note that the 'NetLegacy' type remains unchanged: it applies only to legacy command line options, and will not be ported to QMP, so it should remain a wrapper around a simple union; to avoid confusion, the type named 'NetClientOptions' is now gone, and we introduce 'NetLegacyOptions' in its place. Then, in the C code, we convert from NetLegacy to Netdev as soon as possible, so that the bulk of the net stack only has to deal with one QAPI type, not two. Note that since the old legacy code always rejected 'hubport', we can just omit that branch from the new 'NetLegacyOptions' simple union. Based on an idea originally by Zoltán Kővágó <DirtY.iCE.hu@gmail.com>: Message-Id: <01a527fbf1a5de880091f98cf011616a78adeeee.1441627176.git.DirtY.iCE.hu@gmail.com> although the sed script in that patch no longer applies due to other changes in the tree since then, and I also did some manual cleanups (such as fixing whitespace to keep checkpatch happy). Signed-off-by: Eric Blake <eblake@redhat.com> Message-Id: <1468468228-27827-13-git-send-email-eblake@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> [Fixup from Eric squashed in] Signed-off-by: Markus Armbruster <armbru@redhat.com>
2016-07-19Merge remote-tracking branch 'remotes/awilliam/tags/vfio-update-20160718.0' ↵Peter Maydell1-0/+1
into staging VFIO update 2016-07-18 One fix for 2.7-rc0 which hides the ARI extended capability, fixing multifunction support in PCIe configurations where the assigned device function topology does not match the host (Alex Williamson) # gpg: Signature made Mon 18 Jul 2016 18:02:27 BST # gpg: using RSA key 0x239B9B6E3BB08B22 # gpg: Good signature from "Alex Williamson <alex.williamson@redhat.com>" # gpg: aka "Alex Williamson <alex@shazbot.org>" # gpg: aka "Alex Williamson <alwillia@redhat.com>" # gpg: aka "Alex Williamson <alex.l.williamson@gmail.com>" # Primary key fingerprint: 42F6 C04E 540B D1A9 9E7B 8A90 239B 9B6E 3BB0 8B22 * remotes/awilliam/tags/vfio-update-20160718.0: vfio/pci: Hide ARI capability Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-07-18vfio/pci: Hide ARI capabilityAlex Williamson1-0/+1
QEMU supports ARI on downstream ports and assigned devices may support ARI in their extended capabilities. The endpoint ARI capability specifies the next function, such that the OS doesn't need to walk each possible function, however this next function is relative to the host, not the guest. This leads to device discovery issues when we combine separate functions into virtual multi-function packages in a guest. For example, SR-IOV VFs are not enumerated by simply probing the function address space, therefore the ARI next-function field is zero. When we combine multiple VFs together as a multi-function device in the guest, the guest OS identifies ARI is enabled, relies on this next-function field, and stops looking for additional function after the first is found. Long term we should expose the ARI capability to the guest to enable configurations with more than 8 functions per slot, but this requires additional QEMU PCI infrastructure to manage the next-function field for multiple, otherwise independent devices. In the short term, hiding this capability allows equivalent functionality to what we currently have on non-express chipsets. Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Reviewed-by: Marcel Apfelbaum <marcel@redhat.com>
2016-07-18virtio-blk: dataplane cleanupCao jin1-4/+2
No need duplicate the judgment, there is one in function entry. Cc: Stefan Hajnoczi <stefanha@redhat.com> Cc: Kevin Wolf <kwolf@redhat.com> Cc: Max Reitz <mreitz@redhat.com> Signed-off-by: Cao jin <caoj.fnst@cn.fujitsu.com> Reviewed-by: Fam Zheng <famz@redhat.com> Message-id: 1468814749-14510-1-git-send-email-caoj.fnst@cn.fujitsu.com Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2016-07-18spapr: Ensure CPU cores are added contiguously and removed in LIFO orderBharata B Rao1-1/+20
If CPU core addition or removal is allowed in random order leading to holes in the core id range (and hence in the cpu_index range), migration can fail as migration with holes in cpu_index range isn't yet handled correctly. Prevent this situation by enforcing the addition in contiguous order and removal in LIFO order so that we never end up with holes in cpu_index range. Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-07-18vfio/spapr: Remove stale ioctl() callDavid Gibson1-1/+0
This ioctl() call to VFIO_IOMMU_SPAPR_TCE_REMOVE was left over from an earlier version of the code and has since been folded into vfio_spapr_remove_window(). It wasn't caught because although the argument structure has been removed, the libc function remove() means this didn't trigger a compile failure. The ioctl() was also almost certain to fail silently and harmlessly with the bogus argument, so this wasn't caught in testing. Suggested-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Alexey Kardashevskiy <aik@ozlabs.ru>
2016-07-18dbdma: reset io->processing flag for unassigned DBDMA channel rw accessesMark Cave-Ayland1-0/+1
Otherwise MacOS 9 hangs upon shutdown. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-07-18dbdma: set FLUSH bit upon reception of flush command for unassigned DBDMA ↵Mark Cave-Ayland1-0/+10
channels This fixes MacOS 9 whereby it continually flushes and polls the status bits until they are set to indicate a successful flush. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-07-18dbdma: fix load_word/store_word value endiannessMark Cave-Ayland1-19/+5
The values to read/write to/from physical memory are copied directly to the physical address with no endian swapping required. Also add some extra information to debugging output while we are here. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-07-18dbdma: fix endian of DBDMA_CMDPTR_LO during branchMark Cave-Ayland1-1/+1
The current DBDMA command is stored in little-endian format, so make sure we convert it to match our CPU when updating the DBDMA_CMDPTR_LO register. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-07-18dbdma: add per-channel debugging enabled via DEBUG_DBDMA_CHANMASKMark Cave-Ayland1-33/+42
By default large amounts of DBDMA debugging are produced when often it is just 1 or 2 channels that are of interest. Introduce DEBUG_DBDMA_CHANMASK to allow the developer to select the channels of interest at compile time, and then further add the extra channel information to each debug statement where possible. Also clearly mark the start/end of DBDMA_run_bh to allow tracking the bottom half execution. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-07-18dbdma: always define DBDMA_DPRINTF and enable debug with DEBUG_DBDMAMark Cave-Ayland1-8/+7
Enabling DBDMA_DPRINTF unconditionally ensures that any errors in debug statements are picked up immediately. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-07-18spapr: fix core unplug crashGreg Kurz1-4/+2
If the host has 8 threads/core and the guest is started with: -smp cores=1,threads=4,maxcpus=12 It is possible to crash QEMU by doing: (qemu) device_add host-spapr-cpu-core,core-id=16,id=foo (qemu) device_del foo Segmentation fault This happens because spapr_core_unplug() assumes cpu_dt_id == core_id. As long as cpu_dt_id is derived from the non-table cpu_index, this is only true when you plug cores with contiguous ids. It is safer to be consistent: the DR connector was created with an index that is immediately written to cc->core_id, and spapr_core_plug() also relies on cc->core_id. Let's use it also in spapr_core_unplug(). Signed-off-by: Greg Kurz <groug@kaod.org> Reviewed-by: Bharata B Rao <bharata@linux.vnet.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-07-14Merge remote-tracking branch ↵Peter Maydell7-36/+100
'remotes/pmaydell/tags/pull-target-arm-20160714' into staging target-arm queue: * add virtio-mmio transport base address to device path (avoid an assertion failure with multiple virtio-scsi-devices) * revert hw/ptimer commit 5a50307 which causes regressions on SPARC guests * use Neon to accelerate zero-page checking on AArch64 hosts * set the MPIDR for TCG to match how KVM does it (and fit with GICv2/GICv3 restrictions on SGI target lists) * add some missing AArch32 TLBI hypervisor TLB operations * m25p80: Fix QIOR/DIOR handling for Winbond * hw/misc: fix typo in Aspeed SCU hw-strap2 property name * ast2400: pretend DMAs are done for U-boot * ast2400: some minor code cleanups # gpg: Signature made Thu 14 Jul 2016 17:21:30 BST # gpg: using RSA key 0x3C2525ED14360CDE # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" # gpg: aka "Peter Maydell <pmaydell@gmail.com>" # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20160714: ast2400: externalize revision numbers ast2400: pretend DMAs are done for U-boot ast2400: replace aspeed_smc_is_implemented() hw/misc: fix typo in Aspeed SCU hw-strap2 property name m25p80: Fix QIOR/DIOR handling for Winbond target-arm: Add missed AArch32 TLBI sytem registers hw/arm/virt: tcg: adjust MPIDR like KVM gic: provide defines for v2/v3 targetlist sizes target-arm: Use Neon for zero checking Revert "hw/ptimer: Perform counter wrap around if timer already expired" virtio-mmio: format transport base address in BusClass.get_dev_path Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-07-14ast2400: externalize revision numbersCédric Le Goater2-5/+1
AST2400_A0_SILICON_REV is defined twice. Fix this by including the definition in the header file as well as the routine to check if a silicon revision is supported. It will useful to reuse in other controllers. Let's add also AST2500_A0_SILICON_REV for future use. Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-id: 1467994016-11678-5-git-send-email-clg@kaod.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-07-14ast2400: pretend DMAs are done for U-bootCédric Le Goater1-0/+4
U-boot does SPI timing calibration using DMA tranfers. To let the initialization continue, we fake success by setting the DMA status of the Interrupt Control Register. For the moment, DMA support is not required as it is not used in normal operation. Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-id: 1467994016-11678-4-git-send-email-clg@kaod.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-07-14ast2400: replace aspeed_smc_is_implemented()Cédric Le Goater1-20/+15
aspeed_smc_is_implemented() filters invalid registers in a peculiar way. Let's remove it and open code the if conditions. It serves the same purpose, the aesthetic is better, and new registers can easily be added. Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-id: 1467994016-11678-3-git-send-email-clg@kaod.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-07-14hw/misc: fix typo in Aspeed SCU hw-strap2 property nameCédric Le Goater1-1/+1
Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-id: 1467994016-11678-2-git-send-email-clg@kaod.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-07-14m25p80: Fix QIOR/DIOR handling for WinbondMarcin Krzeminski1-2/+4
Winbond also support continuous read mode, but as an opposite for other flash type read mode clock cycles are included to dummy cycles number. This path add proper handling of read mode byte and update needed dummy cycles. QPI mode and dummy cycles configuration are not supported. Signed-off-by: Marcin Krzeminski <marcin.krzeminski@nokia.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-id: 1467809036-6986-1-git-send-email-marcin.krzeminski@nokia.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-07-14hw/arm/virt: tcg: adjust MPIDR like KVMAndrew Jones1-1/+24
KVM adjusts the MPIDR of guest vcpus based on the architecture of the host, 32-bit vs. 64-bit, and, for 64-bit, also on the type of GIC the guest is using. To be consistent and improve SGI efficiency we make the same adjustments for TCG as 64-bit KVM hosts. We neglect to add consistency with 32-bit KVM hosts, as that would reduce SGI efficiency and KVM is expected to change. As MPIDR is a system register, and thus guest visible, we only make adjustments for current and later versioned machines. Signed-off-by: Andrew Jones <drjones@redhat.com> Message-id: 1467378129-23302-3-git-send-email-drjones@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-07-14Revert "hw/ptimer: Perform counter wrap around if timer already expired"Dmitry Osipenko1-7/+2
Software should see timer counter wraparound only after IRQ being triggered. This fixes regression introduced by the commit 5a50307 ("hw/ptimer: Perform counter wrap around if timer already expired"), resulting in monotonic timer jumping backwards on SPARC emulated machine running NetBSD guest OS, as reported by Mark Cave-Ayland. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Message-id: 20160708132206.2080-1-digetx@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-07-14virtio-mmio: format transport base address in BusClass.get_dev_pathLaszlo Ersek1-0/+49
At the moment the following QEMU command line triggers an assertion failure (minimal reproducer by Cole): qemu-system-aarch64 \ -machine virt-2.6,accel=tcg \ -nodefaults \ -no-user-config \ -nographic -monitor stdio \ -device virtio-scsi-device,id=scsi0 \ -device virtio-scsi-device,id=scsi1 \ -drive file=foo.img,format=raw,if=none,id=d0 \ -device scsi-hd,bus=scsi0.0,drive=d0 \ -drive file=foo.img,format=raw,if=none,id=d1 \ -device scsi-hd,bus=scsi1.0,drive=d1 qemu-system-aarch64: migration/savevm.c:615: vmstate_register_with_alias_id: Assertion `!se->compat || se->instance_id == 0' failed. The reason is that the vmstate sections for the two scsi-hd devices are not uniquely identifiable by name. The direct parent buses of the scsi-hd devices -- scsi0.0 and scsi1.0 -- support the BusClass.get_dev_path member function. scsibus_get_dev_path() formats a device path prefix with the help of its topologically parent bus, and then appends the chan:id:lun triplet to it. For both scsi-hd devices, this triplet is 0:0:0. (Here we use "device path" in the QEMU migration sense, for vmstate section identification, not in the OFW or UEFI device path senses.) The virtio-scsi HBA is plugged into the virtio-mmio bus (implemented by the internal VirtIOMMIOProxy device). This bus class (TYPE_VIRTIO_MMIO_BUS) inherits, as its get_dev_path() member function, the virtio_bus_get_dev_path() method from its parent class (TYPE_VIRTIO_BUS). virtio_bus_get_dev_path() does not format any kind of device address on its own; "virtio addresses" are transport-specific. Therefore virtio_bus_get_dev_path() asks the topologically parent bus of the proxy object (implementing the specific virtio transport) to format the address of the proxy object. (For virtio-pci devices (where the proxy is an instance of VirtIOPCIProxy, plugged into a PCI bus), this ends up in pcibus_get_dev_path().) However, VirtIOMMIOProxy is usually (in practice: always) plugged into "main-system-bus", the singleton TYPE_SYSTEM_BUS object. This BusClass does not support formatting QEMU vmstate device paths at all (as SysBusDevice objects can have zero or more IO ports and zero or more MMIO regions). Hence the formatting request delegated from virtio_bus_get_dev_path() gets answered with NULL. The end result is that the two scsi-hd devices end up with the same device path "0:0:0", which triggers the assert. We can solve this by recognizing that virtio-mmio transports are distinguished from each other by their base addresses in MMIO address space. Implement virtio_mmio_bus_get_dev_path() as follows: (1) The virtio device whose devpath is to be formatted resides on a virtio-mmio bus that is implemented by a VirtIOMMIOProxy object. Ask the parent bus of VirtIOMMIOProxy to format the device path of VirtIOMMIOProxy, as a path prefix. (This is identical to what virtio_bus_get_dev_path() does.) (2) Append the base address of VirtIOMMIOProxy to the device path, such as: - virtio-mmio@000000000a003e00, - virtio-mmio@000000000a003c00. Given that these device paths are placed in the migration stream, step (2) above, if done unconditionally, would break migration. So make that step conditional on a new VirtIOMMIOProxy property, which is enabled for 2.7 machine types and later. Cc: "Michael S. Tsirkin" <mst@redhat.com> Cc: Cole Robinson <crobinso@redhat.com> Cc: Dr. David Alan Gilbert <dgilbert@redhat.com> Cc: Kevin Zhao <kevin.zhao@linaro.org> Cc: Peter Maydell <peter.maydell@linaro.org> Cc: Tom Hanson <thomas.hanson@linaro.org> Reported-by: Kevin Zhao <kevin.zhao@linaro.org> Reviewed-by: Andrew Jones <drjones@redhat.com> Signed-off-by: Laszlo Ersek <lersek@redhat.com> Message-id: 1467739394-28357-1-git-send-email-lersek@redhat.com Fixes: https://bugs.launchpad.net/qemu/+bug/1594239 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-07-14Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream-fwcfg' into ↵Peter Maydell2-3/+9
staging * Updated fw_cfg option ROM to include DMA support # gpg: Signature made Thu 14 Jul 2016 14:51:06 BST # gpg: using RSA key 0xBFFBD25F78C7AE83 # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini/tags/for-upstream-fwcfg: Add optionrom compatible with fw_cfg DMA version Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-07-14Merge remote-tracking branch 'remotes/xtensa/tags/20160714-xtensa' into stagingPeter Maydell1-1/+1
Xtensa-related fixes: - fix FLASH interface width for XTFPGA boards. # gpg: Signature made Thu 14 Jul 2016 12:00:05 BST # gpg: using RSA key 0x51F9CC91F83FA044 # gpg: Good signature from "Max Filippov <max.filippov@cogentembedded.com>" # gpg: aka "Max Filippov <jcmvbkbc@gmail.com>" # Primary key fingerprint: 2B67 854B 98E5 327D CDEB 17D8 51F9 CC91 F83F A044 * remotes/xtensa/tags/20160714-xtensa: target-xtensa: xtfpga: fix FLASH interface width Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-07-14Add optionrom compatible with fw_cfg DMA versionMarc Marí2-3/+9
This optionrom is based on linuxboot.S. Signed-off-by: Marc Marí <markmb@redhat.com> Signed-off-by: Richard W.M. Jones <rjones@redhat.com> Message-Id: <1464027093-24073-2-git-send-email-rjones@redhat.com> [Add -fno-toplevel-reorder, support clang without -m16. - Paolo] Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2016-07-14Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell3-12/+61
* SCSI scanner support * fixes to qemu-char and net exit * FreeBSD fixes * Other small bugfixes # gpg: Signature made Wed 13 Jul 2016 12:30:11 BST # gpg: using RSA key 0xBFFBD25F78C7AE83 # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini/tags/for-upstream: hostmem: detect host backend memory is being used properly hostmem: fix QEMU crash by 'info memdev' char: do not use atexit cleanup handler net: do not use atexit for cleanup slirp: use exit notifier for slirp_smb_cleanup tap: use an exit notifier to call down_script util: Fix MIN_NON_ZERO qemu-sockets: use qapi_free_SocketAddress in cleanup disas: avoid including everything in headers compiled from C++ json-streamer: fix double-free on exiting during a parse main-loop: check return value before using pointer Use "-s" instead of "--quiet" to resolve non-fatal build error on FreeBSD. scsi-bus: Use longer sense buffer with scanners scsi-bus: Add SCSI scanner support Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-07-14target-xtensa: xtfpga: fix FLASH interface widthMax Filippov1-1/+1
FLASH chip on XTFPGA boards is connected with 16-bit-wide interface. Latest U-Boot can see the difference and does not work correctly with 32-bit-wide interface. Set FLASH chip 'width' property to 2. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2016-07-13block/qdev: Allow configuring rerror/werror with qdev propertiesKevin Wolf5-0/+28
The rerror/werror policies are implemented in the devices, so that's where they should be configured. In comparison to the old options in -drive, the qdev properties are only added to those devices that actually support them. If the option isn't given (or "auto" is specified), the setting of the BlockBackend is used for compatibility with the old options. For block jobs, "auto" is the same as "enospc". Signed-off-by: Kevin Wolf <kwolf@redhat.com> Reviewed-by: Max Reitz <mreitz@redhat.com>
2016-07-13block/qdev: Allow configuring WCE with qdev propertiesKevin Wolf6-0/+21
As cache.writeback is a BlockBackend property and as such more related to the guest device than the BlockDriverState, we already removed it from the blockdev-add interface. This patch adds the new way to set it, as a qdev property of the corresponding guest device. For example: -drive if=none,file=test.img,node-name=img -device ide-hd,drive=img,write-cache=off Signed-off-by: Kevin Wolf <kwolf@redhat.com> Reviewed-by: Max Reitz <mreitz@redhat.com>
2016-07-13hostmem: detect host backend memory is being used properlyXiao Guangrong2-11/+21
Currently, we use memory_region_is_mapped() to detect if the host backend memory is being used. This works if the memory is directly mapped into guest's address space, however, it is not true for nvdimm as it uses aliased memory region to map the memory. This is why this bug can happen: https://bugzilla.redhat.com/show_bug.cgi?id=1352769 Fix it by introduce a new filed, is_mapped, to HostMemoryBackend, we set/clear this filed accordingly when the device link/unlink to host backend memory Signed-off-by: Xiao Guangrong <guangrong.xiao@linux.intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2016-07-13block/qdev: Allow node name for drive propertiesKevin Wolf2-7/+37
If a node name instead of a BlockBackend name is specified as the driver for a guest device, an anonymous BlockBackend is created now. The order of operations in release_drive() must be reversed in order to avoid a use-after-free bug because now blk_detach_dev() frees the last reference if an anonymous BlockBackend is used. usb-storage uses a hack where it forwards its BlockBackend as a property to another device that it internally creates. This hack must be updated so that it doesn't drop its original BB before it can be passed to the other device. This used to work because we always had the monitor reference around, but with node-names the device reference is the only one now. Signed-off-by: Kevin Wolf <kwolf@redhat.com> Reviewed-by: Max Reitz <mreitz@redhat.com>
2016-07-13coroutine: move entry argument to qemu_coroutine_createPaolo Bonzini2-4/+4
In practice the entry argument is always known at creation time, and it is confusing that sometimes qemu_coroutine_enter is used with a non-NULL argument to re-enter a coroutine (this happens in block/sheepdog.c and tests/test-coroutine.c). So pass the opaque value at creation time, for consistency with e.g. aio_bh_new. Mostly done with the following semantic patch: @ entry1 @ expression entry, arg, co; @@ - co = qemu_coroutine_create(entry); + co = qemu_coroutine_create(entry, arg); ... - qemu_coroutine_enter(co, arg); + qemu_coroutine_enter(co); @ entry2 @ expression entry, arg; identifier co; @@ - Coroutine *co = qemu_coroutine_create(entry); + Coroutine *co = qemu_coroutine_create(entry, arg); ... - qemu_coroutine_enter(co, arg); + qemu_coroutine_enter(co); @ entry3 @ expression entry, arg; @@ - qemu_coroutine_enter(qemu_coroutine_create(entry), arg); + qemu_coroutine_enter(qemu_coroutine_create(entry, arg)); @ reentry @ expression co; @@ - qemu_coroutine_enter(co, NULL); + qemu_coroutine_enter(co); except for the aforementioned few places where the semantic patch stumbled (as expected) and for test_co_queue, which would otherwise produce an uninitialized variable warning. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Fam Zheng <famz@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2016-07-12scsi-bus: Use longer sense buffer with scannersJarkko Lavinen1-1/+9
Scanners can provide additional sense bytes beyond 18 bytes. VueScan uses 32 bytes alloc length with Request Sense command. Signed-off-by: Jarkko Lavinen <jarkko.lavinen@iki.fi> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2016-07-12scsi-bus: Add SCSI scanner supportJarkko Lavinen1-0/+31
Add support for missing scanner specific SCSI commands and their xfer lenghts as per ANSI spec section 15. Signed-off-by: Jarkko Lavinen <jarkko.lavinen@iki.fi> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2016-07-12Merge remote-tracking branch 'remotes/armbru/tags/pull-include-2016-07-12' ↵Peter Maydell90-238/+216
into staging Clean up #include "..." vs <...> and header guards # gpg: Signature made Tue 12 Jul 2016 15:23:43 BST # gpg: using RSA key 0x3870B400EB918653 # gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" # gpg: aka "Markus Armbruster <armbru@pond.sub.org>" # Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653 * remotes/armbru/tags/pull-include-2016-07-12: cris: Fix broken header guard in hw/cris/boot.h Clean up decorations and whitespace around header guards Clean up ill-advised or unusual header guards libdecnumber: Don't error out on decNumberLocal.h re-inclusion libdecnumber: Don't fool around with guards to avoid #include Clean up header guards that don't match their file name Drop Emacs local variables lists redundant with .dir-locals.el spapr_pci: Include spapr.h instead of playing games with #error tcg: Clean up tcg-target.h header guards linux-user: Fix broken header guard in syscall_defs.h linux-user: Clean up hostdep.h header guards linux-user: Clean up target_structs.h header guards linux-user: Clean up target_signal.h header guards linux-user: Clean up target_cpu.h header guards linux-user: Clean up target_syscall.h header guards target-*: Clean up cpu.h header guards scripts: New clean-header-guards.pl Use #include "..." for our own headers, <...> for others Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-07-12cris: Fix broken header guard in hw/cris/boot.hMarkus Armbruster1-2/+2
Found with scripts/clean-header-guards.pl. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Richard Henderson <rth@twiddle.net>
2016-07-12Clean up decorations and whitespace around header guardsMarkus Armbruster16-16/+17
Cleaned up with scripts/clean-header-guards.pl. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Richard Henderson <rth@twiddle.net>
2016-07-12Clean up ill-advised or unusual header guardsMarkus Armbruster26-67/+70
Cleaned up with scripts/clean-header-guards.pl. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Richard Henderson <rth@twiddle.net>
2016-07-12Clean up header guards that don't match their file nameMarkus Armbruster9-24/+25
Header guard symbols should match their file name to make guard collisions less likely. Offenders found with scripts/clean-header-guards.pl -vn. Cleaned up with scripts/clean-header-guards.pl, followed by some renaming of new guard symbols picked by the script to better ones. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Richard Henderson <rth@twiddle.net>
2016-07-12Drop Emacs local variables lists redundant with .dir-locals.elMarkus Armbruster3-28/+0
Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Richard Henderson <rth@twiddle.net>
2016-07-12Use #include "..." for our own headers, <...> for othersMarkus Armbruster36-101/+102
Tracked down with an ugly, brittle and probably buggy Perl script. Also move includes converted to <...> up so they get included before ours where that's obviously okay. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Tested-by: Eric Blake <eblake@redhat.com> Reviewed-by: Richard Henderson <rth@twiddle.net>
2016-07-12hw/bt: Don't use cpu_to_*w() and *_to_cpup()Peter Maydell2-13/+9
Don't use cpu_to_*w() and *_to_cpup() to do byte-swapped loads and stores; instead use ld*_p() and st*_p() which correctly handle misaligned accesses. Bring the HNDL() macro into line with how we deal with PARAMHANDLE(), by using cpu_to_le16() rather than an ifdef HOST_WORDS_BIGENDIAN. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Eric Blake <eblake@redhat.com> Message-id: 1467908460-27048-3-git-send-email-peter.maydell@linaro.org
2016-07-12Merge remote-tracking branch 'remotes/lalrae/tags/mips-20160712' into stagingPeter Maydell8-14/+711
MIPS patches 2016-07-12 Changes: * support 10-bit ASIDs * MIPS64R6-generic renamed to I6400 * initial GIC support * implement RESET_BASE register in CM GCR # gpg: Signature made Tue 12 Jul 2016 11:49:50 BST # gpg: using RSA key 0x52118E3C0B29DA6B # gpg: Good signature from "Leon Alrae <leon.alrae@imgtec.com>" # Primary key fingerprint: 8DD3 2F98 5495 9D66 35D4 4FC0 5211 8E3C 0B29 DA6B * remotes/lalrae/tags/mips-20160712: target-mips: enable 10-bit ASIDs in I6400 CPU target-mips: support CP0.Config4.AE bit target-mips: change ASID type to hold more than 8 bits target-mips: add ASID mask field and replace magic values target-mips: replace MIPS64R6-generic with the real I6400 CPU model hw/mips_cmgcr: implement RESET_BASE register in CM GCR hw/mips_cpc: make VP correctly start from the reset vector target-mips: add exception base to MIPS CPU hw/mips/cps: create GIC block inside CPS hw/mips: implement Global Interrupt Controller hw/mips: implement GIC Interval Timer Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-07-12Merge remote-tracking branch 'remotes/kraxel/tags/pull-usb-20160712-1' into ↵Peter Maydell2-2/+4
staging usb: misc fixes. # gpg: Signature made Tue 12 Jul 2016 09:47:21 BST # gpg: using RSA key 0x4CB6D8EED3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138 * remotes/kraxel/tags/pull-usb-20160712-1: xen-usb: Fix 32bit build usb: add storage hotplug documentation nec-usb-xhci: set the device state to USB_STATE_DEFAULT Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-07-12xen-usb: Fix 32bit buildAnthony PERARD1-1/+2
Signed-off-by: Anthony PERARD <anthony.perard@citrix.com> Reviewed-by: Juergen Gross <jgross@suse.com> Message-id: 20160623110829.22671-1-anthony.perard@citrix.com Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2016-07-12nec-usb-xhci: set the device state to USB_STATE_DEFAULTZhang Shuaiyi1-1/+2
This patch is a rough fix to "hw/usb/core.c:401: usb_handle_packet: Assertion `dev->state == 3' failed.". Qemu will crash when a usb3 device redirect to Windows7 VM via nec-usb-xhci. In extensible-host-controler-interface-usb-xhci.pdf P94(4.6.5 Address Device): • If the Block Set Address Request (BSR) flag = ‘1’ • If the slot is in the Enabled state: ... • Set the Slot State in the Output Slot Context to Default. BSR = ‘1’: Enabled state to Default state; BSR = ‘0’: Default state to Addressed state. Try to call usb_device_reset to set device state to USB_STATE_DEFAULT in xhci_address_slot wether bsr is zero. Signed-off-by: Zhang Shuaiyi <zhang_syi@massclouds.com> Message-id: 1467258640-11921-1-git-send-email-zhang_syi@massclouds.com Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2016-07-12hw/mips_cmgcr: implement RESET_BASE register in CM GCRLeon Alrae1-1/+53
Implement RESET_BASE register which is local to each VP and a write to it changes VP's reset exception base. Also, add OTHER register to allow a software running on one VP to access other VP's local registers. Guest can use this mechanism to specify custom address from which a VP will start execution. Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2016-07-12hw/mips_cpc: make VP correctly start from the reset vectorLeon Alrae1-3/+2
When VP enters the Run state it starts execution from the reset vector. Currently used CPU_INTERRUPT_WAKE does not do that if reset exception base has been modified. Therefore fix that by simply resetting given VP. Drop the usage of CPU_INTERRUPT_WAKE also in VP_STOP and instead raise the CPU_INTERRUPT_HALT to halt a VP. Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2016-07-12hw/mips/cps: create GIC block inside CPSLeon Alrae3-10/+52
Add GIC to CPS and expose its interrupt pins instead of CPU's. Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2016-07-12hw/mips: implement Global Interrupt ControllerYongbok Kim2-0/+461
The Global Interrupt Controller (GIC) is responsible for mapping each internal and external interrupt to the correct location for servicing. The internal representation of registers is different from the specification in order to consolidate information for each GIC Interrupt Sources and Virtual Processors with same functionalities. For example SH_MAP00_VP00 registers are defined like each bit represents a VP but in this implementation the equivalent map_vp contains VP number in integer form for ease accesses. When it is being accessed via read write functions an internal data is converted back into the original format as the specification. Limitations: Level triggering only GIC CounterHi not implemented (Countbits = 32bits) DINT not implemented Local WatchDog, Fast Debug Channel, Perf Counter not implemented Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
generated by cgit v1.1 at 2025-01-11 22:44:09 +0000