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2020-05-04Compress lines for immediate returnSimran Singhal3-10/+3
Compress two lines into a single line if immediate return statement is found. It also remove variables progress, val, data, ret and sock as they are no longer needed. Remove space between function "mixer_load" and '(' to fix the checkpatch.pl error:- ERROR: space prohibited between function name and open parenthesis '(' Done using following coccinelle script: @@ local idexpression ret; expression e; @@ -ret = +return e; -return ret; Signed-off-by: Simran Singhal <singhalsimran0@gmail.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Message-Id: <20200401165314.GA3213@simran-Inspiron-5558> [lv: in handle_aiocb_write_zeroes_unmap() move "int ret" inside the #ifdef] Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-05-04hw/mem/pc-dimm: Fix line over 80 characters warningWainer dos Santos Moschetta1-1/+2
Signed-off-by: Wainer dos Santos Moschetta <wainersm@redhat.com> Message-Id: <20200310180510.19489-3-wainersm@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-05-04hw/mem/pc-dimm: Print slot number on error at pc_dimm_pre_plug()Wainer dos Santos Moschetta1-2/+2
The error report in pc_dimm_pre_plug() now has the slot number printed. Signed-off-by: Wainer dos Santos Moschetta <wainersm@redhat.com> Message-Id: <20200310180510.19489-2-wainersm@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-05-04timer/exynos4210_mct: Remove redundant statement in exynos4210_mct_write()Chen Qun1-4/+0
Clang static code analyzer show warning: hw/timer/exynos4210_mct.c:1370:9: warning: Value stored to 'index' is never read index = GET_L_TIMER_CNT_REG_IDX(offset, lt_i); ^ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ hw/timer/exynos4210_mct.c:1399:9: warning: Value stored to 'index' is never read index = GET_L_TIMER_CNT_REG_IDX(offset, lt_i); ^ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ hw/timer/exynos4210_mct.c:1441:9: warning: Value stored to 'index' is never read index = GET_L_TIMER_CNT_REG_IDX(offset, lt_i); ^ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Reported-by: Euler Robot <euler.robot@huawei.com> Signed-off-by: Chen Qun <kuhn.chenqun@huawei.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200325025919.21316-4-kuhn.chenqun@huawei.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-05-04display/blizzard: use extract16() for fix clang analyzer warning in ↵Chen Qun1-6/+4
blizzard_draw_line16_32() Clang static code analyzer show warning: hw/display/blizzard.c:940:9: warning: Value stored to 'data' is never read data >>= 5; ^ ~ Reported-by: Euler Robot <euler.robot@huawei.com> Signed-off-by: Chen Qun <kuhn.chenqun@huawei.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20200325025919.21316-3-kuhn.chenqun@huawei.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-05-04scsi/esp-pci: add g_assert() for fix clang analyzer warning in ↵Chen Qun1-0/+1
esp_pci_io_write() Clang static code analyzer show warning: hw/scsi/esp-pci.c:198:9: warning: Value stored to 'size' is never read size = 4; ^ ~ Reported-by: Euler Robot <euler.robot@huawei.com> Signed-off-by: Chen Qun <kuhn.chenqun@huawei.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20200325025919.21316-2-kuhn.chenqun@huawei.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-05-02hw/rdma: Destroy list mutex when list is destroyedYuval Shaia1-0/+1
List mutex should be destroyed when gs list gets destroyed. Reported-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Yuval Shaia <yuval.shaia.ml@gmail.com> Message-Id: <20200413085738.11145-1-yuval.shaia.ml@gmail.com> Reviewed-by: Marcel Apfelbaum<marcel.apfelbaum@gmail.com> Signed-off-by: Marcel Apfelbaum <marcel.apfelbaum@gmail.com>
2020-04-30Merge remote-tracking branch 'remotes/kevin/tags/for-upstream' into stagingPeter Maydell4-1/+116
Block layer patches: - Fix resize (extending) of short overlays - nvme: introduce PMR support from NVMe 1.4 spec - qemu-storage-daemon: Fix non-string --object properties # gpg: Signature made Thu 30 Apr 2020 16:51:45 BST # gpg: using RSA key DC3DEB159A9AF95D3D7456FE7F09B272C88F2FD6 # gpg: issuer "kwolf@redhat.com" # gpg: Good signature from "Kevin Wolf <kwolf@redhat.com>" [full] # Primary key fingerprint: DC3D EB15 9A9A F95D 3D74 56FE 7F09 B272 C88F 2FD6 * remotes/kevin/tags/for-upstream: qemu-storage-daemon: Fix non-string --object properties qom: Factor out user_creatable_add_dict() nvme: introduce PMR support from NVMe 1.4 spec qcow2: Forward ZERO_WRITE flag for full preallocation iotests: Test committing to short backing file iotests: Filter testfiles out in filter_img_info() block: truncate: Don't make backing file data visible file-posix: Support BDRV_REQ_ZERO_WRITE for truncate raw-format: Support BDRV_REQ_ZERO_WRITE for truncate qcow2: Support BDRV_REQ_ZERO_WRITE for truncate block-backend: Add flags to blk_truncate() block: Add flags to bdrv(_co)_truncate() block: Add flags to BlockDriver.bdrv_co_truncate() qemu-iotests: allow qcow2 external discarded clusters to contain stale data qcow2: Add incompatibility note between backing files and raw external data files Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-04-30nvme: introduce PMR support from NVMe 1.4 specAndrzej Jakowski4-1/+116
This patch introduces support for PMR that has been defined as part of NVMe 1.4 spec. User can now specify a pmrdev option that should point to HostMemoryBackend. pmrdev memory region will subsequently be exposed as PCI BAR 2 in emulated NVMe device. Guest OS can perform mmio read and writes to the PMR region that will stay persistent across system reboot. Signed-off-by: Andrzej Jakowski <andrzej.jakowski@linux.intel.com> Reviewed-by: Klaus Jensen <k.jensen@samsung.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Message-Id: <20200330164656.9348-1-andrzej.jakowski@linux.intel.com> Reviewed-by: Keith Busch <kbusch@kernel.org> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2020-04-30Merge remote-tracking branch ↵Peter Maydell20-42/+1348
'remotes/pmaydell/tags/pull-target-arm-20200430-1' into staging target-arm queue: * xlnx-zdma: Fix endianness handling of descriptor loading * nrf51: Fix last GPIO CNF address * gicv3: Use gicr_typer in arm_gicv3_icc_reset * msf2: Add EMAC block to SmartFusion2 SoC * New clock modelling framework * hw/arm: versal: Setup the ADMA with 128bit bus-width * Cadence: gem: fix wraparound in 64bit descriptors * cadence_gem: clear RX control descriptor * target/arm: Vectorize integer comparison vs zero * hw/arm/virt: dt: add kaslr-seed property * hw/arm: xlnx-zcu102: Disable unsupported FDT firmware nodes # gpg: Signature made Thu 30 Apr 2020 15:43:54 BST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20200430-1: (30 commits) hw/arm: xlnx-zcu102: Disable unsupported FDT firmware nodes hw/arm: xlnx-zcu102: Move arm_boot_info into XlnxZCU102 device_tree: Constify compat in qemu_fdt_node_path() device_tree: Allow name wildcards in qemu_fdt_node_path() target/arm/cpu: Update coding style to make checkpatch.pl happy target/arm: Make cpu_register() available for other files target/arm: Restrict the Address Translate write operation to TCG accel hw/arm/virt: dt: add kaslr-seed property hw/arm/virt: dt: move creation of /secure-chosen to create_fdt() target/arm: Vectorize integer comparison vs zero net: cadence_gem: clear RX control descriptor Cadence: gem: fix wraparound in 64bit descriptors hw/arm: versal: Setup the ADMA with 128bit bus-width qdev-monitor: print the device's clock with info qtree hw/arm/xilinx_zynq: connect uart clocks to slcr hw/char/cadence_uart: add clock support hw/misc/zynq_slcr: add clock generation for uarts docs/clocks: add device's clock documentation qdev-clock: introduce an init array to ease the device construction qdev: add clock input&output support to devices. ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-04-30hw/arm: xlnx-zcu102: Disable unsupported FDT firmware nodesEdgar E. Iglesias1-0/+30
Disable unsupported FDT firmware nodes if a user passes us a DTB with nodes enabled that the machine cannot support due to lack of EL3 or EL2 support. Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 20200423121114.4274-5-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-04-30hw/arm: xlnx-zcu102: Move arm_boot_info into XlnxZCU102Edgar E. Iglesias1-4/+5
Move arm_boot_info into XlnxZCU102. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 20200423121114.4274-4-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-04-30hw/arm/virt: dt: add kaslr-seed propertyJerome Forissier1-0/+15
Generate random seeds to be used by the non-secure and/or secure OSes for ASLR. The seeds are 64-bit random values exported via the DT properties /chosen/kaslr-seed [1] and /secure-chosen/kaslr-seed, the latter being used by OP-TEE [2]. [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=e5bc0c37c97e1 [2] https://github.com/OP-TEE/optee_os/commit/ef262691fe0e Signed-off-by: Jerome Forissier <jerome@forissier.org> Message-id: 20200420121807.8204-3-jerome@forissier.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-04-30hw/arm/virt: dt: move creation of /secure-chosen to create_fdt()Jerome Forissier1-1/+4
The /secure-chosen node is currently used only by create_uart(), but this will change. Therefore move the creation of this node to create_fdt(). Signed-off-by: Jerome Forissier <jerome@forissier.org> Message-id: 20200420121807.8204-2-jerome@forissier.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-04-30net: cadence_gem: clear RX control descriptorRamon Fried1-0/+7
The RX ring descriptors control field is used for setting SOF and EOF (start of frame and end of frame). The SOF and EOF weren't cleared from the previous descriptors, causing inconsistencies in ring buffer. Fix that by clearing the control field of every descriptors we're processing. Signed-off-by: Ramon Fried <rfried.dev@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 20200418085145.489726-1-rfried.dev@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-04-30Cadence: gem: fix wraparound in 64bit descriptorsRamon Fried1-1/+8
Wraparound of TX descriptor cyclic buffer only updated the low 32 bits of the descriptor. Fix that by checking if we're working with 64bit descriptors. Signed-off-by: Ramon Fried <rfried.dev@gmail.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 20200417171736.441607-1-rfried.dev@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-04-30hw/arm: versal: Setup the ADMA with 128bit bus-widthEdgar E. Iglesias1-0/+2
Setup the ADMA with 128bit bus-width. This matters when FIXED BURST mode is used. Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Luc Michel <luc.michel@greensocs.com> Message-id: 20200417153800.27399-2-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-04-30hw/arm/xilinx_zynq: connect uart clocks to slcrDamien Hedde1-8/+49
Add the connection between the slcr's output clocks and the uarts inputs. Also add the main board clock 'ps_clk', which is hard-coded to 33.33MHz (the default frequency). This clock is used to feed the slcr's input clock. Signed-off-by: Damien Hedde <damien.hedde@greensocs.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 20200406135251.157596-9-damien.hedde@greensocs.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-04-30hw/char/cadence_uart: add clock supportDamien Hedde2-10/+66
Switch the cadence uart to multi-phase reset and add the reference clock input. The input clock frequency is added to the migration structure. The reference clock controls the baudrate generation. If it disabled, any input characters and events are ignored. If this clock remains unconnected, the uart behaves as before (it default to a 50MHz ref clock). Signed-off-by: Damien Hedde <damien.hedde@greensocs.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20200406135251.157596-8-damien.hedde@greensocs.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-04-30hw/misc/zynq_slcr: add clock generation for uartsDamien Hedde1-4/+168
Add some clocks to zynq_slcr + the main input clock (ps_clk) + the reference clock outputs for each uart (uart0 & 1) This commit also transitional the slcr to multi-phase reset as it is required to initialize the clocks correctly. The clock frequencies are computed using the internal pll & uart configuration registers and the input ps_clk frequency. Signed-off-by: Damien Hedde <damien.hedde@greensocs.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Acked-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20200406135251.157596-7-damien.hedde@greensocs.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-04-30qdev-clock: introduce an init array to ease the device constructionDamien Hedde1-0/+17
Introduce a function and macro helpers to setup several clocks in a device from a static array description. An element of the array describes the clock (name and direction) as well as the related callback and an optional offset to store the created object pointer in the device state structure. The array must be terminated by a special element QDEV_CLOCK_END. This is based on the original work of Frederic Konrad. Signed-off-by: Damien Hedde <damien.hedde@greensocs.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 20200406135251.157596-5-damien.hedde@greensocs.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-04-30qdev: add clock input&output support to devices.Damien Hedde3-1/+181
Add functions to easily handle clocks with devices. Clock inputs and outputs should be used to handle clock propagation between devices. The API is very similar the GPIO API. This is based on the original work of Frederic Konrad. Signed-off-by: Damien Hedde <damien.hedde@greensocs.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20200406135251.157596-4-damien.hedde@greensocs.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-04-30hw/core/clock-vmstate: define a vmstate entry for clock stateDamien Hedde2-0/+26
Signed-off-by: Damien Hedde <damien.hedde@greensocs.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 20200406135251.157596-3-damien.hedde@greensocs.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-04-30Merge remote-tracking branch 'remotes/cohuck/tags/s390x-20200430' into stagingPeter Maydell7-21/+452
- update Linux headers to 5.7-rc3 (and virtio-net fixup) - support for protected virtualization aka secure execution # gpg: Signature made Thu 30 Apr 2020 10:41:31 BST # gpg: using RSA key C3D0D66DC3624FF6A8C018CEDECF6B93C6F02FAF # gpg: issuer "cohuck@redhat.com" # gpg: Good signature from "Cornelia Huck <conny@cornelia-huck.de>" [marginal] # gpg: aka "Cornelia Huck <huckc@linux.vnet.ibm.com>" [full] # gpg: aka "Cornelia Huck <cornelia.huck@de.ibm.com>" [full] # gpg: aka "Cornelia Huck <cohuck@kernel.org>" [marginal] # gpg: aka "Cornelia Huck <cohuck@redhat.com>" [marginal] # Primary key fingerprint: C3D0 D66D C362 4FF6 A8C0 18CE DECF 6B93 C6F0 2FAF * remotes/cohuck/tags/s390x-20200430: s390x/s390-virtio-ccw: Fix build on systems without KVM s390x/pv: Retry ioctls on -EINTR s390x: protvirt: Fix stray error_report_err in s390_machine_protect s390x: Add unpack facility feature to GA1 docs: system: Add protvirt docs s390x: protvirt: Handle SIGP store status correctly s390x: protvirt: Move IO control structures over SIDA s390x: protvirt: Disable address checks for PV guest IO emulation s390x: protvirt: Move diag 308 data over SIDA s390x: protvirt: Set guest IPL PSW s390x: protvirt: SCLP interpretation s390x: protvirt: Move STSI data over SIDAD s390x: Add SIDA memory ops s390x: protvirt: KVM intercept changes s390x: protvirt: Inhibit balloon when switching to protected mode s390x: protvirt: Add migration blocker s390x: protvirt: Support unpack facility s390x: Move diagnose 308 subcodes and rcs into ipl.h linux-headers: update against Linux 5.7-rc3 virtio-net: fix rsc_ext compat handling Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-04-30Merge remote-tracking branch 'remotes/armbru/tags/pull-qapi-2020-04-30' into ↵Peter Maydell1-1/+1
staging QAPI patches for 2020-04-30 # gpg: Signature made Thu 30 Apr 2020 06:29:18 BST # gpg: using RSA key 354BC8B3D7EB2A6B68674E5F3870B400EB918653 # gpg: issuer "armbru@redhat.com" # gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" [full] # gpg: aka "Markus Armbruster <armbru@pond.sub.org>" [full] # Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653 * remotes/armbru/tags/pull-qapi-2020-04-30: qapi: Generate simpler marshalling code when no arguments qapi: Disallow qmp_marshal_FOO(NULL, ...) qom: Simplify object_property_get_enum() qapi: Only input visitors can actually fail qapi: Assert non-input visitors see only valid alternate tags qapi: Clean up visitor's recovery from input with invalid type qapi: Assert non-input visitors see only valid narrow integers qapi: Assert output visitors see only valid enum values qapi: Fix Visitor contract for start_alternate() qapi: Assert incomplete object occurs only in dealloc visitor qapi: Polish prose in visitor.h qapi: Document @errp usage more thoroughly in visitor.h qapi: Fix typo in visit_start_list()'s contract qapi: Fix the virtual walk example in visitor.h's big comment qapi: Belatedly update visitor.h's big comment for QAPI modules qemu-option: Clean up after the previous commit qobject: Eliminate qdict_iter(), use qdict_first(), qdict_next() qobject: Eliminate qlist_iter(), use QLIST_FOREACH_ENTRY() instead qobject: Factor out helper json_pretty_newline() qobject: Clean up QLIST_FOREACH_ENTRY() Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-04-30hw/core/clock: introduce clock objectPeter Maydell3-0/+138
This object may be used to represent a clock inside a clock tree. A clock may be connected to another clock so that it receives update, through a callback, whenever the source/parent clock is updated. Although only the root clock of a clock tree controls the values (represented as periods) of all clocks in tree, each clock holds a local state containing the current value so that it can be fetched independently. It will allows us to fullfill migration requirements by migrating each clock independently of others. This is based on the original work of Frederic Konrad. Signed-off-by: Damien Hedde <damien.hedde@greensocs.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 20200406135251.157596-2-damien.hedde@greensocs.com [PMM: Use uint64_t rather than unsigned long long in trace events; the dtrace backend can't handle the latter] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-04-30msf2: Add EMAC block to SmartFusion2 SoCSubbaraya Sundeep1-2/+24
With SmartFusion2 Ethernet MAC model in place this patch adds the same to SoC. Signed-off-by: Subbaraya Sundeep <sundeep.lkml@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 1587048891-30493-3-git-send-email-sundeep.lkml@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-04-30hw/net: Add Smartfusion2 emac blockSubbaraya Sundeep2-0/+590
Modelled Ethernet MAC of Smartfusion2 SoC. Micrel KSZ8051 PHY is present on Emcraft's SOM kit hence same PHY is emulated. Signed-off-by: Subbaraya Sundeep <sundeep.lkml@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 1587048891-30493-2-git-send-email-sundeep.lkml@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-04-30Typo: Correct the name of CPU hotplug memory regionKeqian Zhu1-1/+1
Replace "acpi-mem-hotplug" with "acpi-cpu-hotplug" Signed-off-by: Keqian Zhu <zhukeqian1@huawei.com> Message-id: 20200413091552.62748-4-zhukeqian1@huawei.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-04-30bugfix: Use gicr_typer in arm_gicv3_icc_resetKeqian Zhu1-3/+1
The KVM_VGIC_ATTR macro expect the second parameter as gicr_typer, of which high 32bit is constructed by mp_affinity. For most case, the high 32bit of mp_affinity is zero, so it will always access the ICC_CTLR_EL1 of CPU0. Signed-off-by: Keqian Zhu <zhukeqian1@huawei.com> Message-id: 20200413091552.62748-2-zhukeqian1@huawei.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-04-30dma/xlnx-zdma: Fix descriptor loading (REG) wrt endiannessEdgar E. Iglesias1-4/+10
Fix descriptor loading from registers wrt host endianness. Reported-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Francisco Iglesias <frasse.iglesias@gmail.com> Message-id: 20200404122718.25111-3-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-04-30dma/xlnx-zdma: Fix descriptor loading (MEM) wrt endiannessEdgar E. Iglesias1-4/+7
Fix descriptor loading from memory wrt host endianness. Reported-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Francisco Iglesias <frasse.iglesias@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20200404122718.25111-2-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-04-30qapi: Only input visitors can actually failMarkus Armbruster1-1/+1
The previous few commits have made this more obvious, and removed the one exception. Time to clarify the documentation, and drop dead error checking. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Message-Id: <20200424084338.26803-13-armbru@redhat.com>
2020-04-29hw/riscv/spike: Allow more than one CPUsAnup Patel1-1/+1
Currently, the upstream Spike ISA simulator allows more than one CPUs so we update QEMU Spike machine on similar lines to allow more than one CPUs. The maximum number of CPUs for QEMU Spike machine is kept same as QEMU Virt machine. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20200427080644.168461-4-anup.patel@wdc.com Message-Id: <20200427080644.168461-4-anup.patel@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2020-04-29hw/riscv/spike: Allow loading firmware separately using -bios optionAnup Patel1-1/+23
This patch extends Spike machine support to allow loading OpenSBI firmware (fw_jump.elf) separately using -bios option. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20200427080644.168461-3-anup.patel@wdc.com Message-Id: <20200427080644.168461-3-anup.patel@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2020-04-29hw/riscv: Add optional symbol callback ptr to riscv_load_firmware()Anup Patel3-7/+10
This patch adds an optional function pointer, "sym_cb", to riscv_load_firmware() which provides the possibility to access the symbol table during kernel loading. The pointer is ignored, if supplied with flat (non-elf) firmware image. The Spike board requires it locate the HTIF symbols from firmware ELF passed via "-bios" option. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20200427080644.168461-2-anup.patel@wdc.com Message-Id: <20200427080644.168461-2-anup.patel@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2020-04-29riscv: sifive_e: Support changing CPU typeCorey Wharton1-2/+3
Allows the CPU to be changed from the default via the -cpu command line option. Signed-off-by: Corey Wharton <coreyw7@fb.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20200313193429.8035-2-coreyw7@fb.com Message-Id: <20200313193429.8035-2-coreyw7@fb.com> [ Changes by AF: - Set "cpu-type" from the machine and not SoC ] Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2020-04-29hw/riscv: Generate correct "mmu-type" for 32-bit machinesBin Meng3-0/+12
32-bit machine should have its CPU's "mmu-type" set to "riscv,sv32". Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 1583585319-26603-1-git-send-email-bmeng.cn@gmail.com Message-Id: <1583585319-26603-1-git-send-email-bmeng.cn@gmail.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2020-04-29riscv/sifive_u: Add a serial property to the sifive_u machineBin Meng1-0/+20
At present the board serial number is hard-coded to 1, and passed to OTP model during initialization. Firmware (FSBL, U-Boot) uses the serial number to generate a unique MAC address for the on-chip ethernet controller. When multiple QEMU 'sifive_u' instances are created and connected to the same subnet, they all have the same MAC address hence it creates a unusable network. A new "serial" property is introduced to specify the board serial number. When not given, the default serial number 1 is used. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <1573916930-19068-1-git-send-email-bmeng.cn@gmail.com> [ Changed by AF: - Use the SoC's serial property to pass the info to the SoC - Fixup commit title - Rebase on file restructuring ] Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2020-04-29riscv/sifive_u: Add a serial property to the sifive_u SoCAlistair Francis1-1/+7
At present the board serial number is hard-coded to 1, and passed to OTP model during initialization. Firmware (FSBL, U-Boot) uses the serial number to generate a unique MAC address for the on-chip ethernet controller. When multiple QEMU 'sifive_u' instances are created and connected to the same subnet, they all have the same MAC address hence it creates a unusable network. A new "serial" property is introduced to the sifive_u SoC to specify the board serial number. When not given, the default serial number 1 is used. Suggested-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
2020-04-29riscv/sifive_u: Fix up file orderingAlistair Francis1-54/+54
Split the file into clear machine and SoC sections. Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-04-29s390x/s390-virtio-ccw: Fix build on systems without KVMChristian Borntraeger3-11/+13
linux/kvm.h is not available on all platforms. Let us move s390_machine_inject_pv_error into pv.c as it uses KVM structures. Also rename the function to s390_pv_inject_reset_error. While at it, ipl.h needs an include for "exec/address-spaces.h" as it uses address_space_memory. Fixes: c3347ed0d2ee ("s390x: protvirt: Support unpack facility") Reported-by: Bruce Rogers <brogers@suse.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com> Message-Id: <20200406100158.5940-2-borntraeger@de.ibm.com> Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2020-04-29s390x/pv: Retry ioctls on -EINTRChristian Borntraeger1-1/+5
PV_ENABLE (and maybe others) might return -EINTR when a signal is pending. See the Linux kernel patch "s390/gmap: return proper error code on ksm unsharing" for details. Let us retry the ioctl in that case. Fixes: c3347ed0d2ee ("s390x: protvirt: Support unpack facility") Reported-by: Marc Hartmayer <mhartmay@linux.ibm.com> Acked-by: Janosch Frank <frankja@linux.vnet.ibm.com> Tested-by: Marc Hartmayer <mhartmay@linux.ibm.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com> Message-Id: <20200327124616.34866-1-borntraeger@de.ibm.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2020-04-29s390x: protvirt: Fix stray error_report_err in s390_machine_protectJanosch Frank1-1/+0
In case the protection of the machine fails at s390_pv_vm_enable(), we'll currently report the local_error variable. Problem is that there's no migration blocker error that we can report at this point so the pointer is always NULL which leads to a SEGFAULT. Let's remove the error report. Signed-off-by: Janosch Frank <frankja@linux.ibm.com> Reported-by: Marc Hartmayer <mhartmay@linux.ibm.com> Fixes: 0141e1b47707 ("s390x: protvirt: Add migration blocker") Message-Id: <20200326140505.2432-1-frankja@linux.ibm.com> Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2020-04-29s390x: protvirt: SCLP interpretationJanosch Frank1-11/+45
SCLP for a protected guest is done over the SIDAD, so we need to use the s390_cpu_pv_mem_* functions to access the SIDAD instead of guest memory when reading/writing SCBs. To not confuse the sclp emulation, we set 0x4000 as the SCCB address, since the function that injects the sclp external interrupt would reject a zero sccb address. Signed-off-by: Janosch Frank <frankja@linux.ibm.com> Reviewed-by: David Hildenbrand <david@redhat.com> Reviewed-by: Claudio Imbrenda <imbrenda@linux.ibm.com> Reviewed-by: Cornelia Huck <cohuck@redhat.com> Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com> Message-Id: <20200319131921.2367-10-frankja@linux.ibm.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2020-04-29s390x: protvirt: Inhibit balloon when switching to protected modeJanosch Frank1-0/+11
Ballooning in protected VMs can only be done when the guest shares the pages it gives to the host. If pages are not shared, the integrity checks will fail once those pages have been altered and are given back to the guest. As we currently do not yet have a solution for this we will continue like this: 1. We block ballooning now in QEMU (with this patch). 2. Later we will provide a change to virtio that removes the blocker and adds VIRTIO_F_IOMMU_PLATFORM automatically by QEMU when doing the protvirt switch. This is OK, as the balloon driver in Linux (the only supported guest) will refuse to work with the IOMMU_PLATFORM feature bit set. 3. Later, we can fix the guest balloon driver to accept the IOMMU feature bit and correctly exercise sharing and unsharing of balloon pages. Signed-off-by: Janosch Frank <frankja@linux.ibm.com> Reviewed-by: David Hildenbrand <david@redhat.com> Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com> Reviewed-by: Claudio Imbrenda <imbrenda@linux.ibm.com> Reviewed-by: Cornelia Huck <cohuck@redhat.com> Message-Id: <20200319131921.2367-6-frankja@linux.ibm.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2020-04-29s390x: protvirt: Add migration blockerJanosch Frank1-0/+18
Migration is not yet supported. Signed-off-by: Janosch Frank <frankja@linux.ibm.com> Reviewed-by: David Hildenbrand <david@redhat.com> Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com> Reviewed-by: Claudio Imbrenda <imbrenda@linux.ibm.com> Reviewed-by: Cornelia Huck <cohuck@redhat.com> Message-Id: <20200319131921.2367-5-frankja@linux.ibm.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2020-04-29s390x: protvirt: Support unpack facilityJanosch Frank5-8/+360
The unpack facility provides the means to setup a protected guest. A protected guest cannot be introspected by the hypervisor or any user/administrator of the machine it is running on. Protected guests are encrypted at rest and need a special boot mechanism via diag308 subcode 8 and 10. Code 8 sets the PV specific IPLB which is retained separately from those set via code 5. Code 10 is used to unpack the VM into protected memory, verify its integrity and start it. Signed-off-by: Janosch Frank <frankja@linux.ibm.com> Co-developed-by: Christian Borntraeger <borntraeger@de.ibm.com> [Changes to machine] Reviewed-by: David Hildenbrand <david@redhat.com> Reviewed-by: Claudio Imbrenda <imbrenda@linux.ibm.com> Reviewed-by: Cornelia Huck <cohuck@redhat.com> Message-Id: <20200323083606.24520-1-frankja@linux.ibm.com> [CH: fixed up KVM_PV_VM_ -> KVM_PV_] Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2020-04-29smbus: Fix spd_data_generate() for number of banks > 2Markus Armbruster1-1/+1
spd_data_generate() splits @ram_size bytes into @nbanks RAM banks of 1 << sz_log2 MiB each, like this: size = ram_size >> 20; /* work in terms of megabytes */ [...] nbanks = 1; while (sz_log2 > max_log2 && nbanks < 8) { sz_log2--; nbanks++; } Each iteration halves the size of a bank, and increments the number of banks. Wrong: it should double the number of banks. The bug goes back all the way to commit b296b664ab "smbus: Add a helper to generate SPD EEPROM data". It can't bite because spd_data_generate()'s current users pass only @ram_size that result in *zero* iterations: machine RAM size #banks type bank size fulong2e 256 MiB 1 DDR 256 MiB sam460ex 2048 MiB 1 DDR2 2048 MiB 1024 MiB 1 DDR2 1024 MiB 512 MiB 1 DDR2 512 MiB 256 MiB 1 DDR2 256 MiB 128 MiB 1 SDR 128 MiB 64 MiB 1 SDR 64 MiB 32 MiB 1 SDR 32 MiB Apply the obvious, minimal fix. I admit I'm tempted to rip out the unused (and obviously untested) feature instead, because YAGNI. Note that this is not the final result, as spd_data_generate() next increases #banks from 1 to 2 if possible. This is done "to avoid a bug in MIPS Malta firmware". We don't even use this function with machine type malta. *Shrug* Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20200422134815.1584-5-armbru@redhat.com>
2020-04-29bamboo, sam460ex: Tidy up error message for unsupported RAM sizeMarkus Armbruster1-4/+4
Improve $ ppc-softmmu/qemu-system-ppc -M sam460ex -m 4096 qemu-system-ppc: Max 1 banks of 2048 ,1024 ,512 ,256 ,128 ,64 ,32 MB DIMM/bank supported qemu-system-ppc: Possible valid RAM size: 2048 to qemu-system-ppc: at most 1 bank of 2048, 1024, 512, 256, 128, 64, 32 MiB each supported Possible valid RAM size: 1024 MiB Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20200422134815.1584-4-armbru@redhat.com> Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
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