index
:
riscv-gnu-toolchain/qemu.git
block
master
stable-0.10
stable-0.11
stable-0.12
stable-0.13
stable-0.14
stable-0.15
stable-1.0
stable-1.1
stable-1.2
stable-1.3
stable-1.4
stable-1.5
stable-1.6
stable-1.7
stable-2.0
stable-2.1
stable-2.10
stable-2.11
stable-2.12
stable-2.2
stable-2.3
stable-2.4
stable-2.5
stable-2.6
stable-2.7
stable-2.8
stable-2.9
stable-3.0
stable-3.1
stable-4.0
stable-4.1
stable-4.2
stable-5.0
stable-6.0
stable-6.1
stable-7.2
stable-8.0
stable-8.1
stable-8.2
stable-9.0
staging
staging-7.2
staging-8.0
staging-8.1
staging-8.2
staging-9.0
Unnamed repository; edit this file 'description' to name the repository.
root
about
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
hw
Age
Commit message (
Expand
)
Author
Files
Lines
2019-12-17
ppc/pnv: Drop PnvChipClass::type
Greg Kurz
1
-5
/
+0
2019-12-17
ppc/pnv: Introduce PnvChipClass::xscom_pcba() method
Greg Kurz
2
-13
/
+24
2019-12-17
ppc/pnv: Pass content of the "compatible" property to pnv_dt_xscom()
Greg Kurz
2
-20
/
+12
2019-12-17
ppc/pnv: Pass XSCOM base address and address size to pnv_dt_xscom()
Greg Kurz
2
-16
/
+12
2019-12-17
ppc/pnv: Introduce PnvChipClass::xscom_core_base() method
Greg Kurz
1
-7
/
+24
2019-12-17
ppc/pnv: Introduce PnvChipClass::intc_print_info() method
Greg Kurz
1
-5
/
+25
2019-12-17
ppc/pnv: Introduce PnvMachineClass::dt_power_mgt()
Greg Kurz
1
-4
/
+6
2019-12-17
ppc/pnv: Introduce PnvMachineClass and PnvMachineClass::compat
Greg Kurz
1
-14
/
+18
2019-12-17
ppc/pnv: Drop PnvPsiClass::chip_type
Greg Kurz
1
-3
/
+0
2019-12-17
ppc/pnv: Introduce PnvPsiClass::compat
Greg Kurz
1
-14
/
+11
2019-12-17
ppc/pnv: Fix OCC common area region mapping
Cédric Le Goater
2
-9
/
+6
2019-12-17
ppc/pnv: Introduce PBA registers
Cédric Le Goater
3
-34
/
+119
2019-12-17
ppc/pnv: populate the DT with realized XSCOM devices
Cédric Le Goater
1
-1
/
+4
2019-12-17
ppc/pnv: Loop on the whole hierarchy to populate the DT with the XSCOM nodes
Cédric Le Goater
1
-1
/
+6
2019-12-17
target/ppc: Add SPR TBU40
Suraj Jitindar Singh
1
-0
/
+13
2019-12-17
target/ppc: Work [S]PURR implementation and add HV support
Suraj Jitindar Singh
1
-10
/
+7
2019-12-17
target/ppc: Implement the VTB for HV access
Suraj Jitindar Singh
1
-0
/
+16
2019-12-17
ppc/pnv: add a LPC Controller model for POWER10
Cédric Le Goater
2
-11
/
+44
2019-12-17
ppc/pnv: add a PSI bridge model for POWER10
Cédric Le Goater
2
-8
/
+44
2019-12-17
ppc/psi: cleanup definitions
Cédric Le Goater
1
-2
/
+5
2019-12-17
ppc/pnv: Introduce a POWER10 PnvChip and a powernv10 machine
Cédric Le Goater
3
-11
/
+180
2019-12-17
ppc: Don't use CPUPPCState::irq_input_state with modern Book3s CPU models
Greg Kurz
1
-14
/
+2
2019-12-17
xics: Don't deassert outputs
Greg Kurz
1
-3
/
+0
2019-12-17
ppc: Deassert the external interrupt pin in KVM on reset
Greg Kurz
1
-0
/
+8
2019-12-17
spapr: Simplify ovec diff
David Gibson
3
-37
/
+15
2019-12-17
spapr: Fold h_cas_compose_response() into h_client_architecture_support()
David Gibson
2
-63
/
+53
2019-12-17
spapr: Improve handling of fdt buffer size
David Gibson
1
-22
/
+11
2019-12-17
spapr: Don't trigger a CAS reboot for XICS/XIVE mode changeover
David Gibson
1
-20
/
+13
2019-12-17
ppc: well form kvmppc_hint_smt_possible error hint helper
Vladimir Sementsov-Ogievskiy
1
-1
/
+1
2019-12-17
ppc/pnv: Dump the XIVE NVT table
Cédric Le Goater
1
-0
/
+64
2019-12-17
ppc/pnv: Extend XiveRouter with a get_block_id() handler
Cédric Le Goater
3
-5
/
+28
2019-12-17
ppc/pnv: Introduce a pnv_xive_block_id() helper
Cédric Le Goater
1
-31
/
+33
2019-12-17
ppc/xive: Synthesize interrupt from the saved IPB in the NVT
Cédric Le Goater
1
-0
/
+52
2019-12-17
ppc/xive: Introduce a xive_tctx_ipb_update() helper
Cédric Le Goater
1
-10
/
+11
2019-12-17
ppc/xive: Remove the get_tctx() XiveRouter handler
Cédric Le Goater
3
-28
/
+0
2019-12-17
ppc/xive: Move the TIMA operations to the controller model
Cédric Le Goater
3
-32
/
+65
2019-12-17
ppc/pnv: Clarify how the TIMA is accessed on a multichip system
Cédric Le Goater
2
-17
/
+37
2019-12-17
spapr/xive: Configure number of servers in KVM
Greg Kurz
1
-2
/
+21
2019-12-17
spapr/xics: Configure number of servers in KVM
Greg Kurz
1
-2
/
+19
2019-12-17
spapr: Pass the maximum number of vCPUs to the KVM interrupt controller
Greg Kurz
5
-9
/
+16
2019-12-17
ppc/xive: Extend the TIMA operation with a XivePresenter parameter
Cédric Le Goater
2
-28
/
+34
2019-12-17
ppc/xive: Use the XiveFabric and XivePresenter interfaces
Cédric Le Goater
1
-31
/
+17
2019-12-17
ppc/spapr: Implement the XiveFabric interface
Cédric Le Goater
1
-0
/
+39
2019-12-17
ppc/pnv: Implement the XiveFabric interface
Cédric Le Goater
1
-0
/
+35
2019-12-17
ppc/xive: Introduce a XiveFabric interface
Cédric Le Goater
1
-0
/
+10
2019-12-17
ppc/pnv: Fix TIMA indirect access
Cédric Le Goater
2
-6
/
+24
2019-12-17
ppc/pnv: Introduce a pnv_xive_is_cpu_enabled() helper
Cédric Le Goater
1
-0
/
+19
2019-12-17
ppc: Introduce a ppc_cpu_pir() helper
Cédric Le Goater
1
-2
/
+7
2019-12-17
ppc/pnv: Loop on the threads of the chip to find a matching NVT
Cédric Le Goater
1
-26
/
+35
2019-12-17
ppc/pnv: Instantiate cores separately
Greg Kurz
1
-18
/
+12
[next]