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2018-01-30ipmi: Add the platform event message commandCorey Minyard1-0/+24
This lets an event be added to the SEL as if a sensor had generated it. The OpenIPMI driver uses it for storing panic event information. Signed-off-by: Corey Minyard <cminyard@mvista.com> Reviewed-by: Cédric Le Goater <clg@kaod.org>
2018-01-30ipmi: Don't set the timestamp on add events that don't have itCorey Minyard1-2/+7
According to the spec, from section "32.3 OEM SEL Record - Type E0h-FFh", event types from 0x0e to 0xff do not have a timestamp. So don't set it when adding those types. This required putting the timestamp in a temporary buffer, since it's still required to set the last addition time. Signed-off-by: Corey Minyard <cminyard@mvista.com> Reviewed-by: Cédric Le Goater <clg@kaod.org>
2018-01-30ipmi: Fix SEL get/set time commandsCorey Minyard1-2/+2
The minimum message size was on the wrong commands, for getting the time it's zero and for setting the time it's 6. Signed-off-by: Corey Minyard <cminyard@mvista.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
2018-01-30Merge remote-tracking branch ↵Peter Maydell8-107/+436
'remotes/stefanberger/tags/pull-tpm-2018-01-26-2' into staging Merge tpm 2018/01/26 v2 # gpg: Signature made Mon 29 Jan 2018 22:20:05 GMT # gpg: using RSA key 0x75AD65802A0B4211 # gpg: Good signature from "Stefan Berger <stefanb@linux.vnet.ibm.com>" # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: B818 B9CA DF90 89C2 D5CE C66B 75AD 6580 2A0B 4211 * remotes/stefanberger/tags/pull-tpm-2018-01-26-2: tpm: add CRB device tpm: report backend request error tpm: replace GThreadPool with AIO threadpool tpm: lookup cancel path under tpm device class tpm: fix alignment issues tpm: Set the flags of the CMD_INIT command to 0 Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-01-29tpm: add CRB deviceMarc-André Lureau3-8/+330
tpm_crb is a device for TPM 2.0 Command Response Buffer (CRB) Interface as defined in TCG PC Client Platform TPM Profile (PTP) Specification Family “2.0” Level 00 Revision 01.03 v22. The PTP allows device implementation to switch between TIS and CRB model at run time, but given that CRB is a simpler device to implement, I chose to implement it as a different device. The device doesn't implement other locality than 0 for now (my laptop TPM doesn't either, so I assume this isn't so bad) Tested with some success with Linux upstream and Windows 10, seabios & modified ovmf. The device is recognized and correctly transmit command/response with passthrough & emu. However, we are missing PPI ACPI part atm. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Stefan Berger <stefanb@linux.vnet.ibm.com> Signed-off-by: Stefan Berger <stefanb@linux.vnet.ibm.com>
2018-01-29tpm: report backend request errorMarc-André Lureau3-32/+23
Use an Error** for request to let the caller handle error reporting. This will also allow to inform the frontend of a backend error. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Stefan Berger <stefanb@linux.vnet.ibm.com> Signed-off-by: Stefan Berger <stefanb@linux.vnet.ibm.com>
2018-01-29tpm: lookup cancel path under tpm device classMarc-André Lureau1-12/+22
Since Linux commit 313d21eeab9282e, tpm devices have their own device class "tpm" and the cancel path must be looked up under /sys/class/tpm/ instead of /sys/class/misc/. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Stefan Berger <stefanb@linux.vnet.ibm.com> Signed-off-by: Stefan Berger <stefanb@linux.vnet.ibm.com>
2018-01-29tpm: fix alignment issuesMarc-André Lureau4-54/+58
The new tpm-crb-test fails on sparc host: TEST: tests/tpm-crb-test... (pid=230409) /i386/tpm-crb/test: Broken pipe FAIL GTester: last random seed: R02S29cea50247fe1efa59ee885a26d51a85 (pid=230423) FAIL: tests/tpm-crb-test and generates a new clang sanitizer runtime warning: /home/petmay01/linaro/qemu-for-merges/hw/tpm/tpm_util.h:36:24: runtime error: load of misaligned address 0x7fdc24c00002 for type 'const uint32_t' (aka 'const unsigned int'), which requires 4 byte alignment 0x7fdc24c00002: note: pointer points here <memory cannot be printed> The sparc architecture does not allow misaligned loads and will segfault if you try them. For example, this function: static inline uint32_t tpm_cmd_get_size(const void *b) { return be32_to_cpu(*(const uint32_t *)(b + 2)); } Should read, return ldl_be_p(b + 2); As a general rule you can't take an arbitrary pointer into a byte buffer and try to interpret it as a structure or a pointer to a larger-than-bytesize-data simply by casting the pointer. Use this clean up as an opportunity to remove unnecessary temporary buffers and casts. Reported-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Stefan Berger <stefanb@linux.vnet.ibm.com> Signed-off-by: Stefan Berger <stefanb@linux.vnet.ibm.com>
2018-01-29tpm: Set the flags of the CMD_INIT command to 0Stefan Berger1-1/+3
The flags of the CMD_INIT control channel command were not initialized properly. Fix this and set to 0. Signed-off-by: Stefan Berger <stefanb@linux.vnet.ibm.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
2018-01-29Merge remote-tracking branch ↵Peter Maydell3-661/+36
'remotes/kraxel/tags/input-20180129-v2-pull-request' into staging input: switch devices to keycodemapdb, bugfixes. # gpg: Signature made Mon 29 Jan 2018 10:23:00 GMT # gpg: using RSA key 0x4CB6D8EED3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138 * remotes/kraxel/tags/input-20180129-v2-pull-request: hw: convert virtio-input-hid device to keycodemapdb ui: fix alphabetical ordering of keymaps hw: convert the escc device to keycodemapdb hw: convert ps2 device to keycodemapdb ps2: check PS2Queue pointers in post_load routine input: virtio: don't send mouse wheel event twice input: add mouse side buttons to virtio input Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-01-29hw: convert virtio-input-hid device to keycodemapdbDaniel P. Berrange1-127/+9
Replace the keymap_qcode table with automatically generated tables. Missing entries in keymap_qcode now fixed: Q_KEY_CODE_ASTERISK -> KEY_KPASTERISK Q_KEY_CODE_KP_MULTIPLY -> KEY_KPASTERISK Q_KEY_CODE_STOP -> KEY_STOP Q_KEY_CODE_AGAIN -> KEY_AGAIN Q_KEY_CODE_PROPS -> KEY_PROPS Q_KEY_CODE_UNDO -> KEY_UNDO Q_KEY_CODE_FRONT -> KEY_FRONT Q_KEY_CODE_COPY -> KEY_COPY Q_KEY_CODE_OPEN -> KEY_OPEN Q_KEY_CODE_PASTE -> KEY_PASTE Q_KEY_CODE_FIND -> KEY_FIND Q_KEY_CODE_CUT -> KEY_CUT Q_KEY_CODE_LF -> KEY_LINEFEED Q_KEY_CODE_HELP -> KEY_HELP Q_KEY_CODE_COMPOSE -> KEY_COMPOSE Q_KEY_CODE_RO -> KEY_RO Q_KEY_CODE_HIRAGANA -> KEY_HIRAGANA Q_KEY_CODE_HENKAN -> KEY_HENKAN Q_KEY_CODE_YEN -> KEY_YEN Q_KEY_CODE_KP_COMMA -> KEY_KPCOMMA Q_KEY_CODE_KP_EQUALS -> KEY_KPEQUAL Q_KEY_CODE_POWER -> KEY_POWER Q_KEY_CODE_SLEEP -> KEY_SLEEP Q_KEY_CODE_WAKE -> KEY_WAKEUP Q_KEY_CODE_AUDIONEXT -> KEY_NEXTSONG Q_KEY_CODE_AUDIOPREV -> KEY_PREVIOUSSONG Q_KEY_CODE_AUDIOSTOP -> KEY_STOPCD Q_KEY_CODE_AUDIOPLAY -> KEY_PLAYPAUSE Q_KEY_CODE_AUDIOMUTE -> KEY_MUTE Q_KEY_CODE_VOLUMEUP -> KEY_VOLUMEUP Q_KEY_CODE_VOLUMEDOWN -> KEY_VOLUMEDOWN Q_KEY_CODE_MEDIASELECT -> KEY_MEDIA Q_KEY_CODE_MAIL -> KEY_MAIL Q_KEY_CODE_CALCULATOR -> KEY_CALC Q_KEY_CODE_COMPUTER -> KEY_COMPUTER Q_KEY_CODE_AC_HOME -> KEY_HOMEPAGE Q_KEY_CODE_AC_BACK -> KEY_BACK Q_KEY_CODE_AC_FORWARD -> KEY_FORWARD Q_KEY_CODE_AC_REFRESH -> KEY_REFRESH Q_KEY_CODE_AC_BOOKMARKS -> KEY_BOOKMARKS NB, the virtio-input device reports a bitmask to the guest driver that has a bit set for each Linux keycode that the host is able to send to the guest. Thus by adding these extra key mappings we are technically changing the host<->guest ABI. This would also happen any time we defined new mappings for QEMU keycodes in future. When a keycode is removed from the list of possible keycodes that host can send to the guest, it means that the guest OS will think it is possible to receive a key that in pratice can never be generated, which is harmless. When a keycode is added to the list of possible keycodes that the host can send to the guest, it means that the guest OS can see an unexpected event. The Linux virtio_input.c driver code simply forwards this event to the input_event() method in the Linux input subsystem. This in turn calls input_handle_event(), which then calls input_get_disposition(). This method checks if the input event is present in the permitted keys bitmap, and if not returns INPUT_IGNORE_EVENT. Thus the unexpected event will get dropped, which is harmless. If the guest OS reboots, or otherwise re-initializes the virt-input device, it will read the new keycode bitmap. No matter how many keys are defined, the config space has a fixed 128 byte bitmap. There is, however, a size field defiend which says how many bytes in the bitmap are used. So the guest OS reads the size of the bitmap, and then it reads the data from bitmap upto the designated size. So if the guest OS re-initializes at precisely the time that QEMU is migrated across versions, in the worst case, it could conceivably read the old size field, but then get the newly updated bitmap. If a key were added this is harmless, since it simply means it may not process the newly added key. If a key were removed, then it could be readnig a byte from the bitmap that was not initialized. Fortunately QEMU always memsets() the entire bitmap to 0, prior to setting keybits. Thus the guest OS will simply read zeros, which is again harmless. Based on this analysis, it is believed that there is no need to preserve the virtio-input-hid keymaps across migration, as the host<->guest ABI change is harmless and self-resolving at time of guest reboot. NB, this behaviour should perhaps be formalized in the virtio-input spec to declare how guest OS drivers should be written to be robust in their handling of the potentially changable key bitmaps. Signed-off-by: Daniel P. Berrange <berrange@redhat.com> Message-id: 20180117164118.8510-5-berrange@redhat.com Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2018-01-29hw: convert the escc device to keycodemapdbDaniel P. Berrange1-121/+5
Replace the qcode_to_keycode table with automatically generated tables. Missing entries in qcode_to_keycode now fixed: - Q_KEY_CODE_KP_COMMA -> 0x2d Signed-off-by: Daniel P. Berrange <berrange@redhat.com> Message-id: 20180117164118.8510-3-berrange@redhat.com Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2018-01-29hw: convert ps2 device to keycodemapdbDaniel P. Berrange1-399/+7
Replace the qcode_to_keycode_set1, qcode_to_keycode_set2, and qcode_to_keycode_set3 tables with automatically generated tables. Missing entries in qcode_to_keycode_set1 now fixed: - Q_KEY_CODE_SYSRQ -> 0x54 - Q_KEY_CODE_PRINT -> 0x54 (NB ignored due to special case) - Q_KEY_CODE_AGAIN -> 0xe005 - Q_KEY_CODE_PROPS -> 0xe006 - Q_KEY_CODE_UNDO -> 0xe007 - Q_KEY_CODE_FRONT -> 0xe00c - Q_KEY_CODE_COPY -> 0xe078 - Q_KEY_CODE_OPEN -> 0x64 - Q_KEY_CODE_PASTE -> 0x65 - Q_KEY_CODE_CUT -> 0xe03c - Q_KEY_CODE_LF -> 0x5b - Q_KEY_CODE_HELP -> 0xe075 - Q_KEY_CODE_COMPOSE -> 0xe05d - Q_KEY_CODE_PAUSE -> 0xe046 - Q_KEY_CODE_KP_EQUALS -> 0x59 And some mistakes corrected: - Q_KEY_CODE_HIRAGANA was mapped to 0x70 (Katakanahiragana) instead of of 0x77 (Hirigana) - Q_KEY_CODE_MENU was incorrectly mapped to the compose scancode (0xe05d) and is now mapped to 0xe01e - Q_KEY_CODE_FIND was mapped to 0xe065 (Search) instead of to 0xe041 (Find) - Q_KEY_CODE_POWER, SLEEP & WAKE had 0x0e instead of 0xe0 as the prefix Missing entries in qcode_to_keycode_set2 now fixed: - Q_KEY_CODE_PRINT -> 0x7f (NB ignored due to special case) - Q_KEY_CODE_COMPOSE -> 0xe02f - Q_KEY_CODE_PAUSE -> 0xe077 - Q_KEY_CODE_KP_EQUALS -> 0x0f And some mistakes corrected: - Q_KEY_CODE_HIRAGANA was mapped to 0x13 (Katakanahiragana) instead of of 0x62 (Hirigana) - Q_KEY_CODE_MENU was incorrectly mapped to the compose scancode (0xe02f) and is now not mapped - Q_KEY_CODE_FIND was mapped to 0xe010 (Search) and is now not mapped. - Q_KEY_CODE_POWER, SLEEP & WAKE had 0x0e instead of 0xe0 as the prefix Missing entries in qcode_to_keycode_set3 now fixed: - Q_KEY_CODE_ASTERISK -> 0x7e - Q_KEY_CODE_SYSRQ -> 0x57 - Q_KEY_CODE_LESS -> 0x13 - Q_KEY_CODE_STOP -> 0x0a - Q_KEY_CODE_AGAIN -> 0x0b - Q_KEY_CODE_PROPS -> 0x0c - Q_KEY_CODE_UNDO -> 0x10 - Q_KEY_CODE_COPY -> 0x18 - Q_KEY_CODE_OPEN -> 0x20 - Q_KEY_CODE_PASTE -> 0x28 - Q_KEY_CODE_FIND -> 0x30 - Q_KEY_CODE_CUT -> 0x38 - Q_KEY_CODE_HELP -> 0x09 - Q_KEY_CODE_COMPOSE -> 0x8d - Q_KEY_CODE_AUDIONEXT -> 0x93 - Q_KEY_CODE_AUDIOPREV -> 0x94 - Q_KEY_CODE_AUDIOSTOP -> 0x98 - Q_KEY_CODE_AUDIOMUTE -> 0x9c - Q_KEY_CODE_VOLUMEUP -> 0x95 - Q_KEY_CODE_VOLUMEDOWN -> 0x9d - Q_KEY_CODE_CALCULATOR -> 0xa3 - Q_KEY_CODE_AC_HOME -> 0x97 And some mistakes corrected: - Q_KEY_CODE_MENU was incorrectly mapped to the compose scancode (0x8d) and is now 0x91 Signed-off-by: Daniel P. Berrange <berrange@redhat.com> Message-id: 20180117164118.8510-2-berrange@redhat.com Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2018-01-29ps2: check PS2Queue pointers in post_load routinePrasad J Pandit1-12/+9
During Qemu guest migration, a destination process invokes ps2 post_load function. In that, if 'rptr' and 'count' values were invalid, it could lead to OOB access or infinite loop issue. Add check to avoid it. Reported-by: Cyrille Chatras <cyrille.chatras@orange.com> Signed-off-by: Prasad J Pandit <pjp@fedoraproject.org> Message-id: 20171116075155.22378-1-ppandit@redhat.com Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2018-01-29input: virtio: don't send mouse wheel event twiceMiika S1-2/+4
On Linux, a mouse event is generated for both down and up when mouse wheel is used. This caused virtio_input_send() to be called twice each time the wheel was used. This commit adds a check for the button down state and only calls virtio_input_send() when it is true. Signed-off-by: Miika S <miika9764@gmail.com> Message-Id: <20171222152531.1849-4-miika9764@gmail.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2018-01-29input: add mouse side buttons to virtio inputMiika S1-0/+2
Signed-off-by: Miika S <miika9764@gmail.com> Message-Id: <20171222152531.1849-3-miika9764@gmail.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2018-01-29target/ppc/spapr: Add H-Call H_GET_CPU_CHARACTERISTICSSuraj Jitindar Singh1-0/+58
The new H-Call H_GET_CPU_CHARACTERISTICS is used by the guest to query behaviours and available characteristics of the cpu. Implement the handler for this new H-Call which formulates its response based on the setting of the spapr_caps cap-cfpc, cap-sbbc and cap-ibs. Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-01-29target/ppc/spapr_caps: Add new tristate cap safe_indirect_branchSuraj Jitindar Singh2-0/+23
Add new tristate cap cap-ibs to represent the indirect branch serialisation capability. Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-01-29target/ppc/spapr_caps: Add new tristate cap safe_bounds_checkSuraj Jitindar Singh2-0/+23
Add new tristate cap cap-sbbc to represent the speculation barrier bounds checking capability. Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-01-29target/ppc/spapr_caps: Add new tristate cap safe_cacheSuraj Jitindar Singh2-10/+28
Add new tristate cap cap-cfpc to represent the cache flush on privilege change capability. Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-01-29target/ppc/spapr_caps: Add support for tristate spapr_capabilitiesSuraj Jitindar Singh1-0/+66
spapr_caps are used to represent the level of support for various capabilities related to the spapr machine type. Currently there is only support for boolean capabilities. Add support for tristate capabilities by implementing their get/set functions. These capabilities can have the values 0, 1 or 2 corresponding to broken, workaround and fixed. Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-01-29spapr_pci: fix MSI/MSIX selectionGreg Kurz1-19/+42
In various place we don't correctly check if the device supports MSI or MSI-X. This can cause devices to be advertised with MSI support, even if they only support MSI-X (like virtio-pci-* devices for example): ethernet@0 { ibm,req#msi = <0x1>; <--- wrong! . ibm,loc-code = "qemu_virtio-net-pci:0000:00:00.0"; . ibm,req#msi-x = <0x3>; }; Worse, this can also cause the "ibm,change-msi" RTAS call to corrupt the PCI status and cause migration to fail: qemu-system-ppc64: get_pci_config_device: Bad config data: i=0x6 read: 0 device: 10 cmask: 10 wmask: 0 w1cmask:0 ^^ PCI_STATUS_CAP_LIST bit which is assumed to be constant This patch changes spapr_populate_pci_child_dt() to properly check for MSI support using msi_present(): this ensures that PCIDevice::msi_cap was set by msi_init() and that msi_nr_vectors_allocated() will look at the right place in the config space. Checking PCIDevice::msix_entries_nr is enough for MSI-X but let's add a call to msix_present() there as well for consistency. It also changes rtas_ibm_change_msi() to select the appropriate MSI type in Function 1 instead of always selecting plain MSI. This new behaviour is compliant with LoPAPR 1.1, as described in "Table 71. ibm,change-msi Argument Call Buffer": Function 1: If Number Outputs is equal to 3, request to set to a new number of MSIs (including set to 0). If the “ibm,change-msix-capable” property exists and Number Outputs is equal to 4, request is to set to a new number of MSI or MSI-X (platform choice) interrupts (including set to 0). Since MSI is the the platform default (LoPAPR 6.2.3 MSI Option), let's check for MSI support first. And finally, it checks the input parameters are valid, as described in LoPAPR 1.1 "R1–7.3.10.5.1–3": For the MSI option: The platform must return a Status of -3 (Parameter error) from ibm,change-msi, with no change in interrupt assignments if the PCI configuration address does not support MSI and Function 3 was requested (that is, the “ibm,req#msi” property must exist for the PCI configuration address in order to use Function 3), or does not support MSI-X and Function 4 is requested (that is, the “ibm,req#msi-x” property must exist for the PCI configuration address in order to use Function 4), or if neither MSIs nor MSI-Xs are supported and Function 1 is requested. This ensures that the ret_intr_type variable contains a valid MSI type for this device, and that spapr_msi_setmsg() won't corrupt the PCI status. Signed-off-by: Greg Kurz <groug@kaod.org> Reviewed-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-01-27input: add missing newline from trace-eventsMark Cave-Ayland1-0/+1
This was accidentally omitted from 77cb0f5aaf "Split adb.c into adb.c, adb-mouse.c and adb-kbd.c". Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-01-27uninorth: convert to trace-eventsMark Cave-Ayland2-19/+11
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-01-27grackle: convert to trace-eventsMark Cave-Ayland2-11/+5
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-01-27ppc: Deprecate qemu-system-ppcembthuth@redhat.com3-0/+31
qemu-system-ppcemb has been once split of qemu-system-ppc to support CPU page sizes < 4096 for some of the embedded 4xx PowerPC CPUs. However, there was hardly any OS available in the wild that really used such small page sizes (Linux uses 4096 on PPC), so there is no known recent use case for this separate build anymore. It's rather cumbersome to maintain a separate set of config switches for this, and it's wasting compile and test time of all the developers who have to build all QEMU targets to verify that their changes did not break anything. Except for the small CPU page sizes, qemu-system-ppc can be used as a full replacement for qemu-system-ppcemb since it contains all the embedded 4xx PPC boards and CPUs, too. Thus let's start the deprecation process for qemu-system-ppcemb to see whether somebody still needs the small page sizes or whether we could finally remove this unloved separate build. Signed-off-by: Thomas Huth <thuth@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-01-26Merge remote-tracking branch ↵Peter Maydell10-3/+1156
'remotes/edgar/tags/edgar/xilinx-next-2018-01-26.for-upstream' into staging Xilinx queue # gpg: Signature made Fri 26 Jan 2018 10:17:01 GMT # gpg: using RSA key 0x29C596780F6BCA83 # gpg: Good signature from "Edgar E. Iglesias (Xilinx key) <edgar.iglesias@xilinx.com>" # gpg: aka "Edgar E. Iglesias <edgar.iglesias@gmail.com>" # Primary key fingerprint: AC44 FEDC 14F7 F1EB EDBF 4151 29C5 9678 0F6B CA83 * remotes/edgar/tags/edgar/xilinx-next-2018-01-26.for-upstream: xlnx-zynqmp: Connect the IPI device to the ZynqMP SoC xlnx-zynqmp-pmu: Connect the IPI device to the PMU xlnx-zynqmp-ipi: Initial version of the Xilinx IPI device xlnx-zynqmp-pmu: Connect the PMU interrupt controller xlnx-pmu-iomod-intc: Add the PMU Interrupt controller aarch64-softmmu.mak: Use an ARM specific config xlnx-zynqmp-pmu: Add the CPU and memory xlnx-zynqmp-pmu: Initial commit of the ZynqMP PMU microblaze: boot.c: Don't try to find NULL file Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-01-26xlnx-zynqmp: Connect the IPI device to the ZynqMP SoCAlistair Francis1-0/+14
Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2018-01-26xlnx-zynqmp-pmu: Connect the IPI device to the PMUAlistair Francis1-0/+31
Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2018-01-26xlnx-zynqmp-ipi: Initial version of the Xilinx IPI deviceAlistair Francis2-0/+378
This is the initial version of the Inter Processor Interrupt device. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2018-01-26xlnx-zynqmp-pmu: Connect the PMU interrupt controllerAlistair Francis1-0/+24
Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2018-01-26xlnx-pmu-iomod-intc: Add the PMU Interrupt controllerAlistair Francis2-0/+555
Add the PMU IO Module Interrupt controller device. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2018-01-26aarch64-softmmu.mak: Use an ARM specific configAlistair Francis3-2/+3
In preperation for having an ARM and MicroBlaze ZynqMP machine let's split out the current ARM specific config options. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Acked-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2018-01-26xlnx-zynqmp-pmu: Add the CPU and memoryAlistair Francis1-2/+68
Connect the MicroBlaze CPU and the ROM and RAM memory regions. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2018-01-26xlnx-zynqmp-pmu: Initial commit of the ZynqMP PMUAlistair Francis2-0/+84
The Xilinx ZynqMP SoC has two main processing systems in it. The ARM processing system (which is already modeled in QEMU) and the MicroBlaze Power Management Unit (PMU). This is the inital work for adding support for the PMU. The PMU susbsystem runs along side the ARM system on hardware, but due to architecture limitations in QEMU the two instances are seperate for the time being. Let's follow the same setup we do with the ARM system, where there is an SoC device and a ZCU102 board. Although the PMU is less board specific we are still going to follow the same split as maybe in future we can connect the PMU device to the ARM ZCU102 board. As the machine will be fairly small let's keep them both together in one file. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2018-01-26microblaze: boot.c: Don't try to find NULL fileAlistair Francis1-1/+1
Previously if no device tree was passed to microblaze_load_kernel() then qemu_find_file() would try to find a NULL pointer. To avoid this put a check around qemu_find_file(). Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reported-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2018-01-26usb-ccid: convert CCIDCardClass::exitfn() -> unrealize()Philippe Mathieu-Daudé4-17/+17
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180125171432.13554-4-f4bug@amsat.org Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2018-01-26usb-ccid: inline ccid_card_initfn() in ccid_card_realize()Philippe Mathieu-Daudé1-18/+7
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180125171432.13554-3-f4bug@amsat.org Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2018-01-26hw/usb/ccid: Make ccid_card_init() take an error parameterMao Zhongyi4-45/+50
Replace init() of CCIDCardClass with realize, then convert ccid_card_init(), ccid_card_initfn() and it's callbacks to take an Error** in ordor to report the error more clearly. Signed-off-by: Mao Zhongyi <maozy.fnst@cn.fujitsu.com> Signed-off-by: Cao jin <caoj.fnst@cn.fujitsu.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180125171432.13554-2-f4bug@amsat.org [PMD: fixed s->card assignation in ccid_card_realize()] Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2018-01-26usb-storage: Fix share-rw option parsingFam Zheng2-2/+10
Because usb-storage creates an internal scsi device, we should propagate options. We already do so for bootindex etc, but failed to take care of share-rw. Fix it in an apparent way: add a new parameter to scsi_bus_legacy_add_drive and pass in s->conf.share_rw. Cc: qemu-stable@nongnu.org Signed-off-by: Fam Zheng <famz@redhat.com> Reviewed-by: Darren Kenny <darren.kenny@oracle.com> Message-id: 20180117005222.4781-1-famz@redhat.com Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2018-01-26usb: Remove legacy -usbdevice options (host, serial, disk and net)Thomas Huth6-265/+1
The option have been marked as deprecated since QEMU 2.10, and so far nobody complained that the host, serial, disk and net options are urgently required anymore. So let's now get rid at least of this legacy pile, to simplify the usb code quite a bit. This patch removes the usbdevices host, serial, disk and net. These devices use their own complicated parameter parsing mechanisms, so they are just ugly to maintain, without real benefit for the users (the users can use the corresponding "-device" parameters instead which have the same complexity as the "-usbdevice" devices here). Note that the other rather simple -usbdevice options (mouse, tablet, etc.) are not removed yet (the code is really simple here, so it does not hurt much to keep it), as well as the two devices "braille" and "bt" which are easier to use with -usbdevice than with -device. Signed-off-by: Thomas Huth <thuth@redhat.com> Message-id: 1515519171-20315-1-git-send-email-thuth@redhat.com [kraxel] delete some usb_host_device_open() leftovers. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2018-01-25Merge remote-tracking branch ↵Peter Maydell6-13/+71
'remotes/pmaydell/tags/pull-target-arm-20180125' into staging target-arm queue: * target/arm: Fix address truncation in 64-bit pagetable walks * i.MX: Fix FEC/ENET receive functions * target/arm: preparatory refactoring for SVE emulation * hw/intc/arm_gic: Prevent the GIC from signaling an IRQ when it's "active and pending" * hw/intc/arm_gic: Fix C_RPR value on idle priority * hw/intc/arm_gic: Fix group priority computation for group 1 IRQs * hw/intc/arm_gic: Fix the NS view of C_BPR when C_CTRL.CBPR is 1 * hw/arm/virt: Check that the CPU realize method succeeded * sdhci: fix a NULL pointer dereference due to uninitialized AddressSpace object * xilinx_spips: Correct usage of an uninitialized local variable * pl110: Implement vertical compare/next base interrupts # gpg: Signature made Thu 25 Jan 2018 12:59:25 GMT # gpg: using RSA key 0x3C2525ED14360CDE # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" # gpg: aka "Peter Maydell <pmaydell@gmail.com>" # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20180125: (21 commits) pl110: Implement vertical compare/next base interrupts xilinx_spips: Correct usage of an uninitialized local variable sdhci: fix a NULL pointer dereference due to uninitialized AddresSpace object hw/arm/virt: Check that the CPU realize method succeeded hw/intc/arm_gic: Fix the NS view of C_BPR when C_CTRL.CBPR is 1 hw/intc/arm_gic: Fix group priority computation for group 1 IRQs hw/intc/arm_gic: Fix C_RPR value on idle priority hw/intc/arm_gic: Prevent the GIC from signaling an IRQ when it's "active and pending" target/arm: Simplify fp_exception_el for user-only target/arm: Hoist store to flags output in cpu_get_tb_cpu_state target/arm: Move cpu_get_tb_cpu_state out of line target/arm: Add ARM_FEATURE_SVE vmstate: Add VMSTATE_UINT64_SUB_ARRAY target/arm: Add aa{32, 64}_vfp_{dreg, qreg} helpers target/arm: Change the type of vfp.regs target/arm: Use pointers in neon tbl helper target/arm: Use pointers in neon zip/uzp helpers target/arm: Use pointers in crypto helpers target/arm: Mark disas_set_insn_syndrome inline i.MX: Fix FEC/ENET receive funtions ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-01-25Merge remote-tracking branch 'remotes/mcayland/tags/qemu-sparc-signed' into ↵Peter Maydell9-252/+363
staging qemu-sparc update # gpg: Signature made Thu 25 Jan 2018 13:44:58 GMT # gpg: using RSA key 0x5BC2C56FAE0F321F # gpg: Good signature from "Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>" # Primary key fingerprint: CC62 1AB9 8E82 200D 915C C9C4 5BC2 C56F AE0F 321F * remotes/mcayland/tags/qemu-sparc-signed: sun4u: implement power device sparc64: convert hw/sparc64/sparc64.c from DPRINTF macros to trace events sabre: convert from SABRE_DPRINTF macro to trace-events apb: rename apb.c to sabre.c sun4u: rename apb variables and constants apb: rename QOM type from TYPE_APB to TYPE_SABRE apb: QOMify sabre PCI host bridge apb: change pbm_pci_host prefix functions to use sabre_pci prefix apb: rename APB functions to use sabre prefix simba: rename PBMPCIBridge and QOM types to reflect simba naming apb: split simba PCI bridge into hw/pci-bridge/simba.c sparc/leon3 irqmp: fix IRQ software ack Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-01-25Merge remote-tracking branch 'remotes/kraxel/tags/vga-20180125-pull-request' ↵Peter Maydell1-0/+3
into staging vga: fix for CVE-2018-5683 # gpg: Signature made Thu 25 Jan 2018 09:33:23 GMT # gpg: using RSA key 0x4CB6D8EED3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138 * remotes/kraxel/tags/vga-20180125-pull-request: vga: check the validation of memory addr when draw text Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-01-25sun4u: implement power deviceMark Cave-Ayland1-1/+63
This inbuilt device contains a single 4-byte register, of which bit 24 is used to power down the machine on a real Ultra 5. The power device exists at offset 0x724000 on a real machine, but due to the current configuration of the BARs in QEMU it must be located lower in PCI IO space. For the moment we place the power device at offset 0x7240 as a reminder of its original location and raise the base PCI IO address from 0x4000 to 0x8000. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Artyom Tarasenko <atar4qemu@gmail.com>
2018-01-25sparc64: convert hw/sparc64/sparc64.c from DPRINTF macros to trace eventsMark Cave-Ayland2-51/+52
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Artyom Tarasenko <atar4qemu@gmail.com>
2018-01-25pl110: Implement vertical compare/next base interruptsLinus Walleij1-1/+29
This implements rudimentary support for interrupt generation on the PL110. I am working on a new DRI/KMS driver for Linux and since that uses the blanking interrupt, we need something to fire here. Without any interrupt support Linux waits for a while and then gives ugly messages about the vblank not working in the console (it does not hang perpetually or anything though, DRI is pretty forgiving). I solved it for now by setting up a timer to fire at 60Hz and pull the interrupts for "vertical compare" and "next memory base" at this interval. This works fine and fires roughly the same number of IRQs on QEMU as on the hardware and leaves the console clean and nice. People who want to create more accurate emulation can probably work on top of this if need be. It is certainly closer to the hardware behaviour than what we have today anyway. Cc: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Message-id: 20180123225654.5764-1-linus.walleij@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> [PMM: folded long lines] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-01-25xilinx_spips: Correct usage of an uninitialized local variableFrancisco Iglesias1-1/+17
Coverity found that the variable tx_rx in the function xilinx_spips_flush_txfifo was being used uninitialized (CID 1383841). This patch corrects this by always initializing tx_rx to zeros. Signed-off-by: Francisco Iglesias <frasse.iglesias@gmail.com> Message-id: 20180124215708.30400-1-frasse.iglesias@gmail.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-01-25sdhci: fix a NULL pointer dereference due to uninitialized AddresSpace objectPhilippe Mathieu-Daudé1-0/+1
missed in 60765b6ceeb4. Thread 1 "qemu-system-aarch64" received signal SIGSEGV, Segmentation fault. address_space_init (as=0x0, root=0x55555726e410, name=name@entry=0x555555e3f0a7 "sdhci-dma") at memory.c:3050 3050 as->root = root; (gdb) bt #0 address_space_init (as=0x0, root=0x55555726e410, name=name@entry=0x555555e3f0a7 "sdhci-dma") at memory.c:3050 #1 0x0000555555af62c3 in sdhci_sysbus_realize (dev=<optimized out>, errp=0x7fff7f931150) at hw/sd/sdhci.c:1564 #2 0x00005555558b25e5 in zynqmp_sdhci_realize (dev=0x555557051520, errp=0x7fff7f931150) at hw/sd/zynqmp-sdhci.c:151 #3 0x0000555555a2e7f3 in device_set_realized (obj=0x555557051520, value=<optimized out>, errp=0x7fff7f931270) at hw/core/qdev.c:966 #4 0x0000555555ba3f74 in property_set_bool (obj=0x555557051520, v=<optimized out>, name=<optimized out>, opaque=0x555556e04a20, errp=0x7fff7f931270) at qom/object.c:1906 #5 0x0000555555ba51f4 in object_property_set (obj=obj@entry=0x555557051520, v=v@entry=0x5555576dbd60, name=name@entry=0x555555dd6306 "realized", errp=errp@entry=0x7fff7f931270) at qom/object.c:1102 Suggested-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180123132051.24448-1-f4bug@amsat.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-01-25hw/arm/virt: Check that the CPU realize method succeededPeter Maydell1-1/+1
We were passing a NULL error pointer to the object_property_set_bool() call that realizes the CPU object. This meant that we wouldn't detect failure, and would plough blindly on to crash later trying to use a NULL CPU object pointer. Detect errors and fail instead. In particular, this will be necessary to detect the user error of using "-cpu host" without "-enable-kvm" once we make the host CPU type be registered unconditionally rather than only in kvm_arch_init(). Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
generated by cgit v1.1 at 2025-01-27 00:55:34 +0000