riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Collapse)	Author	Files	Lines
2013-03-01	hw: move boards and other isolated files to hw/ARCH	Paolo Bonzini	1	-164/+0
	Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-03-01	hw: include hw header files with full paths	Paolo Bonzini	1	-1/+1
	Done with this script: cd hw for i in `find . -name '.h' \| sed 's/^..//'`; do echo '\,^#.include.*["<]'$i'[">], s,'$i',hw/&,' done \| sed -i -f - `find . -type f` This is so that paths remain valid as files are moved. Instead, files in hw/dataplane are referenced with the relative path. We know they are not going to move to include/, and they are the only include files that are in subdirectories _and_ move. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-12-19	misc: move include files to include/qemu/	Paolo Bonzini	1	-2/+2
	Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-10-31	cpus: Pass CPUState to [qemu_]cpu_has_work()	Andreas Färber	1	-1/+1
	For target-mips also change the return type to bool. Make include paths for cpu-qom.h consistent for alpha and unicore32. Signed-off-by: Andreas Färber <afaerber@suse.de> [AF: Updated new target-openrisc function accordingly] Acked-by: Richard Henderson <rth@twiddle.net> (for alpha)
2012-10-31	xtensa_pic: Pass XtensaCPU to xtensa_ccompare_cb()	Andreas Färber	1	-2/+5
	Needed for changing cpu_has_work() argument type to CPUState. Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Max Filippov <jcmvbkbc@gmail.com>
2012-03-14	xtensa hw/: Don't use CPUState	Andreas Färber	1	-8/+8
	Scripted conversion: for file in hw/xtensa_*.[hc]; do sed -i "s/CPUState/CPUXtensaState/g" $file done Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Anthony Liguori <aliguori@us.ibm.com>
2011-10-16	monitor: Restrict pic/irq_info to supporting targets	Jan Kiszka	1	-10/+0
	This allows to drop various stubs and move the i8359 into hwlib. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-16	target-xtensa: implement external interrupt mapping	Max Filippov	1	-0/+12
	Xtensa cores may have different mapping of external interrupt pins to internal IRQ numers. Implement API to acquire core IRQ by its external interrupt number. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-15	target-xtensa: fix guest hang on masked CCOMPARE interrupt	Max Filippov	1	-1/+26
	QEMU timer is used to post CCOMPARE interrupt when the core is halted. If that CCOMPARE interrupt is masked off then the timer must be rearmed in the callback, otherwise it will be rearmed next time the core goes to halt by the waiti instruction. Add test case into timer testsuite. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-09-10	target-xtensa: implement interrupt option	Max Filippov	1	-0/+96
	See ISA, 4.4.6 (interrupt option), 4.4.7 (high priority interrupt option) and 4.4.8 (timer interrupt option) for details. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-09-10	target-xtensa: add target stubs	Max Filippov	1	-0/+38
	Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>