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2019-03-07build: switch to KconfigPaolo Bonzini1-1/+1
The make_device_config.sh script is replaced by minikconf, which is modified to support the same command line as its predecessor. The roots of the parsing are default-configs/*.mak, Kconfig.host and hw/Kconfig. One difference with make_device_config.sh is that all symbols have to be defined in a Kconfig file, including those coming from the configure script. This is the reason for the Kconfig.host file introduced in the previous patch. Whenever a file in default-configs/*.mak used $(...) to refer to a config-host.mak symbol, this is replaced by a Kconfig dependency; this part must be done already in this patch for bisectability. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Yang Zhong <yang.zhong@intel.com> Acked-by: Thomas Huth <thuth@redhat.com> Message-Id: <20190123065618.3520-28-yang.zhong@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2019-03-07kconfig: introduce kconfig filesPaolo Bonzini1-0/+5
The Kconfig files were generated mostly with this script: for i in `grep -ho CONFIG_[A-Z0-9_]* default-configs/* | sort -u`; do set fnord `git grep -lw $i -- 'hw/*/Makefile.objs' ` shift if test $# = 1; then cat >> $(dirname $1)/Kconfig << EOF config ${i#CONFIG_} bool EOF git add $(dirname $1)/Kconfig else echo $i $* fi done sed -i '$d' hw/*/Kconfig for i in hw/*; do if test -d $i && ! test -f $i/Kconfig; then touch $i/Kconfig git add $i/Kconfig fi done Whenever a symbol is referenced from multiple subdirectories, the script prints the list of directories that reference the symbol. These symbols have to be added manually to the Kconfig files. Kconfig.host and hw/Kconfig were created manually. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Yang Zhong <yang.zhong@intel.com> Message-Id: <20190123065618.3520-27-yang.zhong@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2019-03-07xtensa: rename CONFIG_XTENSA_FPGA to CONFIG_XTENSA_XTFPGAPaolo Bonzini1-1/+1
Match the symbol name that is used e.g. in Linux (drivers/spi/Kconfig). Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2019-02-05hw/xtensa/Makefile.objs: Build xtensa_sim and xtensa_fpga conditionallyÁkos Kovács1-2/+2
Add the new CONFIG_* values to default-config/xtensa*-softmmu.mak. Signed-off-by: Ákos Kovács <akoskovacs@gmx.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Acked-by: Max Filippov <jcmvbkbc@gmail.com> Message-Id: <20190202072456.6468-17-yang.zhong@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2019-02-05elf: Add optional function ptr to load_elf() to parse ELF notesLiam Merwick2-5/+9
This patch adds an optional function pointer, 'elf_note_fn', to load_elf() which causes load_elf() to additionally parse any ELF program headers of type PT_NOTE and check to see if the ELF Note is of the type specified by the 'translate_opaque' arg. If a matching ELF Note is found then the specfied function pointer is called to process the ELF note. Passing a NULL function pointer results in ELF Notes being skipped. The first consumer of this functionality is the PVHboot support which needs to read the XEN_ELFNOTE_PHYS32_ENTRY ELF Note while loading the uncompressed kernel binary in order to discover the boot entry address for the x86/HVM direct boot ABI. Signed-off-by: Liam Merwick <liam.merwick@oracle.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2019-01-28hw/xtensa: xtfpga: raise CPU number limitMax Filippov1-8/+8
MX PIC can support up to 32 CPUs on xtfpga boards, raise per-board limit accordingly. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-01-28hw/xtensa: xtfpga: use MX PIC for SMPMax Filippov1-1/+21
Create and use MX PIC as a peripheral interrupt controller when more than 1 processor is enabled on xtfpga board. Connect xtensa CPU cores to the MX PIC and select secondary reset vector on all cores except the first one. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-01-28target/xtensa: add MX interrupt controllerMax Filippov2-0/+355
MX interrupt controller is a collection of the following devices accessible through the external registers interface: - interrupt distributor can route each external IRQ line to the corresponding external IRQ pin of selected subset of connected xtensa cores. It has per-CPU and per-IRQ enable signals and per-IRQ software assert signals; - IPI controller has 16 per-CPU IPI signals that may be routed to a combination of 3 designated external IRQ pins of connected xtensa cores; - cache coherecy register controls core L1 cache participation in the SMP cluster cache coherency protocol; - runstall register lets BSP core stall and unstall AP cores. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-01-28target/xtensa: expose core runstall as an IRQ lineMax Filippov1-0/+12
Runstall signal looks very much like a level-triggered IRQ line. Provide xtensa_get_runstall function that returns runstall IRQ. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-01-28target/xtensa: rearrange access to external interruptsMax Filippov2-16/+16
Replace xtensa_get_extint that returns single external IRQ descriptor with xtensa_get_extints that returns a vector of all external IRQs. Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-01-28target/xtensa: drop function xtensa_timer_irqMax Filippov1-6/+1
It's a one-liner used in a single place, move its implementation there and remove its declaration. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-01-24target/xtensa: fix access to the INTERRUPT SRMax Filippov1-2/+2
INTERRUPT special register may be changed both by the core (by writing to INTSET and INTCLEAR registers) and by external events (by triggering and clearing HW IRQs). In MTTCG this state must be protected from concurrent access, otherwise interrupts may be lost or spurious interrupts may be detected. Use atomic operations to change INTSET SR. Fix wsr.intset so that it soesn't clear any bits. Fix wsr.intclear so that it doesn't clear bit that corresponds to NMI. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-01-24hw/xtensa: xtfpga: use core frequencyMax Filippov1-4/+8
XTFPGA board FPGA peripheral exposes hard-coded 10MHz frequency regardless of the actual used core frequency. Expose actual core frequency instead. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-01-24hw/xtensa: xtfpga: fix bootloader placement in SMPMax Filippov1-2/+7
Use BSP reset PC as a place for the mini-bootloader because in SMP configurations APs and BSP may have different boot addresses. This fixes SMP linux uImage boot on xtfpga boards. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2018-11-21target/xtensa: xtfpga: provide default memory sizesMax Filippov1-0/+10
Provide default RAM sizes for all XTFPGA boards, so that when started without -m option they do the right thing. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2018-07-02hw/xtensa: Use the IEC binary prefix definitionsPhilippe Mathieu-Daudé1-4/+5
It eases code review, unit is explicit. Patch generated using: $ git grep -E '(1024|2048|4096|8192|(<<|>>).?(10|20|30))' hw/ include/hw/ $ git grep -n '[<>][<>]= ?[1-5]0' and modified manually. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Max Filippov <jcmvbkbc@gmail.com> Message-Id: <20180625124238.25339-22-f4bug@amsat.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-06-01hw: Do not include "sysemu/block-backend.h" if it is not necessaryPhilippe Mathieu-Daudé1-1/+0
Remove those unneeded includes to speed up the compilation process a little bit. (Continue 7eceff5b5a1fa cleanup) Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20180528232719.4721-13-f4bug@amsat.org> Acked-by: Michael S. Tsirkin <mst@redhat.com> Acked-by: Cornelia Huck <cohuck@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-04-26Change references to serial_hds[] to serial_hd()Peter Maydell2-3/+3
Change all the uses of serial_hds[] to go via the new serial_hd() function. Code change produced with: find hw -name '*.[ch]' | xargs sed -i -e 's/serial_hds\[\([^]]*\)\]/serial_hd(\1)/g' Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-id: 20180420145249.32435-8-peter.maydell@linaro.org
2018-04-26hw/xtensa/xtfpga.c: Don't create "null" chardevs for serial devicesPeter Maydell1-4/+0
Following commit 12051d82f004024, UART devices should handle being passed a NULL pointer chardev, so we don't need to create "null" backends in board code. Remove the code that does this and updates serial_hds[]. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180420145249.32435-6-peter.maydell@linaro.org
2018-02-09Move include qemu/option.h from qemu-common.h to actual usersMarkus Armbruster1-1/+1
qemu-common.h includes qemu/option.h, but most places that include the former don't actually need the latter. Drop the include, and add it to the places that actually need it. While there, drop superfluous includes of both headers, and separate #include from file comment with a blank line. This cleanup makes the number of objects depending on qemu/option.h drop from 4545 (out of 4743) to 284 in my "build everything" tree. Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20180201111846.21846-20-armbru@redhat.com> [Semantic conflict with commit bdd6a90a9e in block/nvme.c resolved]
2018-02-09Clean up includesMarkus Armbruster1-1/+0
Clean up includes so that osdep.h is included first and headers which it implies are not included manually. This commit was created with scripts/clean-includes, with the change to target/s390x/gen-features.c manually reverted, and blank lines around deletions collapsed. Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20180201111846.21846-3-armbru@redhat.com>
2018-01-22target/xtensa: allow different default CPU for MMU/noMMUMax Filippov1-8/+8
Define default core for noMMU configurations and use that core as machine default with noMMU XTFPGA machines. This is done to avoid offering non-working configuration (MMU core on a noMMU machine) as a default. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2018-01-11hw/xtensa/xtfpga: support noMMU coresMax Filippov1-2/+132
Cores with and without MMU have system RAM and ROM at different locations. Also with noMMU cores system IO region is accessible through two physical address ranges. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2018-01-11hw/xtensa/xtfpga: extract flash configurationMax Filippov1-23/+43
Extract flash configuration into a separate structure to make it easier to share between MMU and noMMU configurations. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2018-01-11hw/xtensa: extract xtensa_create_memory_regionsMax Filippov5-42/+148
XTFPGA boards should populate core memory regions the same way sim machine does. Move xtensa_create_memory_regions implementation to a separate file and use it to create instruction and data memory regions on XTFPGA boards. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2018-01-11hw/xtensa/xtfpga: clean up function/structure namesMax Filippov1-70/+70
Function/structure naming inconsistently uses lx, lx60 and xtensa prefixes where xtfpga would be appropriate. Fix that. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2018-01-11hw/xtensa/xtfpga: rewrite mini bootloaderMax Filippov1-5/+23
Don't load jump target into the CPU config, instead put it and initial a2 as literals into the mini bootloader and use l32r to load them natively. With these changes it should be possible to do warm reboot of the guest. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2017-10-27xtensa: lx60/lx200/ml605/kc705: use generic cpu_model parsingIgor Mammedov1-6/+5
Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <1507211474-188400-27-git-send-email-imammedo@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2017-10-27xtensa: sim: use generic cpu_model parsingIgor Mammedov1-6/+2
Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <1507211474-188400-26-git-send-email-imammedo@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2017-09-19cpu: make cpu_generic_init() abort QEMU on errorIgor Mammedov2-10/+0
Almost every user of cpu_generic_init() checks for returned NULL and then reports failure in a custom way and aborts process. Some users assume that call can't fail and don't check for failure, though they should have checked for it. In either cases cpu_generic_init() failure is fatal, so instead of checking for failure and reporting it various ways, make cpu_generic_init() report errors in consistent way and terminate QEMU on failure. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <1505318697-77161-3-git-send-email-imammedo@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2017-09-01xtensa: replace cpu_xtensa_init() with cpu_generic_init()Igor Mammedov2-2/+2
call xtensa_irq_init() at realize time which makes cpu_xtensa_init() like generic cpu creation function. As result we can replace it with cpu_generic_init() which does the same job, reducing code duplication a bit. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <1503592308-93913-16-git-send-email-imammedo@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2017-07-14hw: Use new memory_region_init_{ram, rom, rom_device}() functionsPeter Maydell2-8/+4
Use the new functions memory_region_init_{ram,rom,rom_device}() instead of manually calling the _nomigrate() version and then vmstate_register_ram_global(). Patch automatically created using coccinelle script: spatch --in-place -sp_file scripts/coccinelle/memory-region-init-ram.cocci -dir hw (As it turns out, there are no instances of the rom and rom_device functions that are caught by this script.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-id: 1499438577-7674-8-git-send-email-peter.maydell@linaro.org
2017-07-14memory: Rename memory_region_init_ram() to memory_region_init_ram_nomigrate()Peter Maydell2-4/+4
Rename memory_region_init_ram() to memory_region_init_ram_nomigrate(). This leaves the way clear for us to provide a memory_region_init_ram() which does handle migration. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-id: 1499438577-7674-4-git-send-email-peter.maydell@linaro.org
2017-06-06target/xtensa: support output to chardev consoleMax Filippov1-0/+4
In semihosting mode QEMU allows guest to read and write host file descriptors directly, including descriptors 0..2, a.k.a. stdin, stdout and stderr. Sometimes it's desirable to have semihosting console controlled by -serial option, e.g. to connect it to network. Add semihosting console to xtensa-semi.c, open it in the 'sim' machine in the presence of -serial option and direct stdout and stderr to it when it's present. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2017-06-05Merge remote-tracking branch 'remotes/mjt/tags/trivial-patches-fetch' into ↵Peter Maydell1-5/+5
staging trivial patches for 2017-06-05 # gpg: Signature made Mon 05 Jun 2017 15:23:46 BST # gpg: using RSA key 0x701B4F6B1A693E59 # gpg: Good signature from "Michael Tokarev <mjt@tls.msk.ru>" # gpg: aka "Michael Tokarev <mjt@corpit.ru>" # gpg: aka "Michael Tokarev <mjt@debian.org>" # Primary key fingerprint: 6EE1 95D1 886E 8FFB 810D 4324 457C E0A0 8044 65C5 # Subkey fingerprint: 7B73 BAD6 8BE7 A2C2 8931 4B22 701B 4F6B 1A69 3E59 * remotes/mjt/tags/trivial-patches-fetch: (21 commits) hw/core: nmi.c can be compiled as common-obj nowadays dump: fix memory_mapping_filter leak ide-test: check return of fwrite help: Add newline to end of thread option help text qemu-ga: remove useless allocation scsi/lsi53c895a: Remove unused lsi_mem_*() return value qapi: Fix some QMP documentation regressions hw/mips: add missing include register: display register prefix (name) since it is available hw/sparc: use ARRAY_SIZE() macro hw/xtensa: sim: use g_string/g_new target/arm: add data cache invalidation cp15 instruction to cortex-r5 block: Correct documentation for BLOCK_WRITE_THRESHOLD trivial: Remove unneeded ifndef in memory.h altera_timer: fix incorrect memset configure: Detect native NetBSD curses(3) tests/libqtest: Print error instead of aborting when env variable is missing docs/qdev-device-use.txt: update section Default Devices docs qemu-doc: Avoid ide-drive, it's deprecated qemu-doc: Add hyperlinks to further license information ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-06-04hw/xtensa: sim: use g_string/g_newMax Filippov1-5/+5
Replace malloc/free/sprintf with g_string/g_string_printf/g_string_free. Replace g_malloc with g_new when allocating the MemoryRegion to get more type safety. Suggested-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2017-06-02chardev: move headers to include/chardevMarc-André Lureau1-1/+1
So they are all in one place. The following patch will move serial & parallel declarations to the respective headers. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2017-05-23shutdown: Add source information to SHUTDOWN and RESETEric Blake1-1/+1
Time to wire up all the call sites that request a shutdown or reset to use the enum added in the previous patch. It would have been less churn to keep the common case with no arguments as meaning guest-triggered, and only modified the host-triggered code paths, via a wrapper function, but then we'd still have to audit that I didn't miss any host-triggered spots; changing the signature forces us to double-check that I correctly categorized all callers. Since command line options can change whether a guest reset request causes an actual reset vs. a shutdown, it's easy to also add the information to reset requests. Signed-off-by: Eric Blake <eblake@redhat.com> Acked-by: David Gibson <david@gibson.dropbear.id.au> [ppc parts] Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> [SPARC part] Reviewed-by: Cornelia Huck <cornelia.huck@de.ibm.com> [s390x parts] Message-Id: <20170515214114.15442-5-eblake@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com>
2017-03-11target/xtensa: xtfpga: load DTB only when FDT support is enabledMax Filippov1-0/+9
xtensa linux can use DTB but does not require it, so FDT support is not a requirement for target/xtensa. Don't try to load DTB when FDT support is not configured. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2017-02-23target/xtensa: sim: instantiate local memoriesMax Filippov1-9/+31
Xtensa core may have a number of RAM and ROM areas configured. Record their size and location from the core configuration overlay and instantiate them as RAM regions in the SIM machine. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2017-01-15target/xtensa: refactor CCOUNT/CCOMPAREMax Filippov1-61/+14
Xtensa cores may have a register (CCOUNT) that counts core clock cycles. It may also have a number of registers (CCOMPAREx); when CCOUNT value passes the value of CCOMPAREx, timer interrupt x is raised. Currently xtensa target counts a number of completed instructions and assumes that for CCOUNT one instruction takes one cycle to complete. It calls helper function to update CCOUNT register at every TB end and raise timer interrupts. This scheme works very predictably and doesn't have noticeable performance impact, but it is hard to use with multiple synchronized processors, especially with coming MTTCG. Derive CCOUNT from the virtual simulation time, QEMU_CLOCK_VIRTUAL. Use native QEMU timers for CCOMPARE timers, one timer for each register. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2016-10-24char: remove init callbackMarc-André Lureau1-1/+1
The CharDriverState.init() callback is no longer set since commit a61ae7f88ce and thus unused. The only user, the malta FGPA display has been converted to use an event "opened" callback instead. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20161022095318.17775-7-marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2016-07-14target-xtensa: xtfpga: fix FLASH interface widthMax Filippov1-1/+1
FLASH chip on XTFPGA boards is connected with 16-bit-wide interface. Latest U-Boot can see the difference and does not work correctly with 32-bit-wide interface. Set FLASH chip 'width' property to 2. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2016-07-12Clean up ill-advised or unusual header guardsMarkus Armbruster1-2/+2
Cleaned up with scripts/clean-header-guards.pl. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Richard Henderson <rth@twiddle.net>
2016-06-07replace muldiv64(a, b, c) by (uint64_t)a * b / cLaurent Vivier1-2/+2
When "a" and "b" are 32bit values, we don't have to cast them to 128bit, 64bit is enough. This patch is the result of coccinelle script scripts/coccinelle/simplify_muldiv64.cocci Signed-off-by: Laurent Vivier <lvivier@redhat.com> For xtensa PIC: Acked-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2016-05-19qemu-common: push cpu.h inclusion out of qemu-common.hPaolo Bonzini1-0/+1
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2016-03-22hw: explicitly include qemu-common.h and cpu.hPaolo Bonzini2-0/+4
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2016-03-22include/qemu/osdep.h: Don't include qapi/error.hMarkus Armbruster2-0/+2
Commit 57cb38b included qapi/error.h into qemu/osdep.h to get the Error typedef. Since then, we've moved to include qemu/osdep.h everywhere. Its file comment explains: "To avoid getting into possible circular include dependencies, this file should not include any other QEMU headers, with the exceptions of config-host.h, compiler.h, os-posix.h and os-win32.h, all of which are doing a similar job to this file and are under similar constraints." qapi/error.h doesn't do a similar job, and it doesn't adhere to similar constraints: it includes qapi-types.h. That's in excess of 100KiB of crap most .c files don't actually need. Add the typedef to qemu/typedefs.h, and include that instead of qapi/error.h. Include qapi/error.h in .c files that need it and don't get it now. Include qapi-types.h in qom/object.h for uint16List. Update scripts/clean-includes accordingly. Update it further to match reality: replace config.h by config-target.h, add sysemu/os-posix.h, sysemu/os-win32.h. Update the list of includes in the qemu/osdep.h comment quoted above similarly. This reduces the number of objects depending on qapi/error.h from "all of them" to less than a third. Unfortunately, the number depending on qapi-types.h shrinks only a little. More work is needed for that one. Signed-off-by: Markus Armbruster <armbru@redhat.com> [Fix compilation without the spice devel packages. - Paolo] Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2016-03-16machine: Use type_init() to register machine classesEduardo Habkost1-1/+1
Change all machine_init() users that simply call type_register*() to use type_init(). Cc: Evgeny Voevodin <e.voevodin@samsung.com> Cc: Maksim Kozlov <m.kozlov@samsung.com> Cc: Igor Mitsyanko <i.mitsyanko@gmail.com> Cc: Dmitry Solodkiy <d.solodkiy@samsung.com> Cc: Peter Maydell <peter.maydell@linaro.org> Cc: Rob Herring <robh@kernel.org> Cc: Andrzej Zaborowski <balrogg@gmail.com> Cc: Michael Walle <michael@walle.cc> Cc: "Hervé Poussineau" <hpoussin@reactos.org> Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: Leon Alrae <leon.alrae@imgtec.com> Cc: Alexander Graf <agraf@suse.de> Cc: David Gibson <david@gibson.dropbear.id.au> Cc: Blue Swirl <blauwirbel@gmail.com> Cc: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Cc: Max Filippov <jcmvbkbc@gmail.com> Cc: "Michael S. Tsirkin" <mst@redhat.com> Acked-by: Marcel Apfelbaum <marcel@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Acked-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2016-03-04loader: Add data swap option to load-elfPeter Crosthwaite2-3/+3
Some CPUs are of an opposite data-endianness to other components in the system. Sometimes elfs have the data sections layed out with this CPU data-endianness accounting for when loaded via the CPU, so byte swaps (relative to other system components) will occur. The leading example, is ARM's BE32 mode, which is is basically LE with address manipulation on half-word and byte accesses to access the hw/byte reversed address. This means that word data is invariant across LE and BE32. This also means that instructions are still LE. The expectation is that the elf will be loaded via the CPU in this endianness scheme, which means the data in the elf is reversed at compile time. As QEMU loads via the system memory directly, rather than the CPU, we need a mechanism to reverse elf data endianness to implement this possibility. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
generated by cgit v1.1 at 2024-12-27 06:08:41 +0000