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2020-05-21hw/timer/exynos4210_mct: Replace hw_error() by qemu_log_mask()Philippe Mathieu-Daudé1-7/+5
hw_error() calls exit(). This a bit overkill when we can log the accesses as unimplemented or guest error. When fuzzing the devices, we don't want the whole process to exit. Replace some hw_error() calls by qemu_log_mask(). Per the datasheet "Exynos 4412 RISC Microprocessor Rev 1.00" Chapter 25 "Multi Core Timer (MCT)" figure 1 and table 4, the default value on the APB bus is 0. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20200518140309.5220-5-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-05-11hw/timer/nrf51_timer: Add trace event of counter value updatePhilippe Mathieu-Daudé2-0/+2
Add trace event to display timer's counter value updates. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200504072822.18799-5-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-05-11hw/timer/nrf51_timer: Display timer ID in trace eventsPhilippe Mathieu-Daudé2-4/+11
The NRF51 series SoC have 3 timer peripherals, each having 4 counters. To help differentiate which peripheral is accessed, display the timer ID in the trace events. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200504072822.18799-4-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-05-11hw/arm/nrf51: Add NRF51_PERIPHERAL_SIZE definitionPhilippe Mathieu-Daudé1-1/+1
On the NRF51 series, all peripherals have a fixed I/O size of 4KiB. Define NRF51_PERIPHERAL_SIZE and use it. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200504072822.18799-2-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-05-04hw/timer/pxa2xx_timer: Add assertion to silent static analyzer warningPhilippe Mathieu-Daudé1-0/+1
pxa2xx_timer_tick4() takes an opaque pointer, then calls pxa2xx_timer_update4(), so the static analyzer can not verify that the 'n < 8': 425 static void pxa2xx_timer_tick4(void *opaque) 426 { 427 PXA2xxTimer4 *t = (PXA2xxTimer4 *) opaque; 428 PXA2xxTimerInfo *i = (PXA2xxTimerInfo *) t->tm.info; 429 430 pxa2xx_timer_tick(&t->tm); 433 if (t->control & (1 << 6)) 434 pxa2xx_timer_update4(i, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL), t->tm.num - 4); 135 static void pxa2xx_timer_update4(void *opaque, uint64_t now_qemu, int n) 136 { 137 PXA2xxTimerInfo *s = (PXA2xxTimerInfo *) opaque; 140 static const int counters[8] = { 0, 0, 0, 0, 4, 4, 6, 6 }; 142 143 if (s->tm4[n].control & (1 << 7)) 144 counter = n; 145 else 146 counter = counters[n]; Add an assert() to give the static analyzer a hint, this fixes a warning reported by Clang static code analyzer: CC hw/timer/pxa2xx_timer.o hw/timer/pxa2xx_timer.c:146:17: warning: Assigned value is garbage or undefined counter = counters[n]; ^ ~~~~~~~~~~~ Reported-by: Clang Static Analyzer Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200422133152.16770-10-philmd@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-05-04hw/timer/stm32f2xx_timer: Remove dead assignmentPhilippe Mathieu-Daudé1-1/+0
Fix warning reported by Clang static code analyzer: CC hw/timer/stm32f2xx_timer.o hw/timer/stm32f2xx_timer.c:225:9: warning: Value stored to 'value' is never read value = timer_val; ^ ~~~~~~~~~ Reported-by: Clang Static Analyzer Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200422133152.16770-9-philmd@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-05-04timer/exynos4210_mct: Remove redundant statement in exynos4210_mct_write()Chen Qun1-4/+0
Clang static code analyzer show warning: hw/timer/exynos4210_mct.c:1370:9: warning: Value stored to 'index' is never read index = GET_L_TIMER_CNT_REG_IDX(offset, lt_i); ^ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ hw/timer/exynos4210_mct.c:1399:9: warning: Value stored to 'index' is never read index = GET_L_TIMER_CNT_REG_IDX(offset, lt_i); ^ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ hw/timer/exynos4210_mct.c:1441:9: warning: Value stored to 'index' is never read index = GET_L_TIMER_CNT_REG_IDX(offset, lt_i); ^ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Reported-by: Euler Robot <euler.robot@huawei.com> Signed-off-by: Chen Qun <kuhn.chenqun@huawei.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200325025919.21316-4-kuhn.chenqun@huawei.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-03-09hw/timer/hpet: Include "exec/address-spaces.h"Philippe Mathieu-Daudé1-0/+1
hw/timer/hpet.c calls address_space_stl_le() declared in "exec/address-spaces.h". Include it. This fixes (when modifying unrelated headers): hw/timer/hpet.c:210:31: error: use of undeclared identifier 'address_space_memory' address_space_stl_le(&address_space_memory, timer->fsb >> 32, ^~~~~~~~~~~~~~~~~~~~ Acked-by: John Snow <jsnow@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200228114649.12818-12-philmd@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-03-09hw/timer: Remove unused "ui/console.h" headerPhilippe Mathieu-Daudé1-1/+0
The timer models don't need anything from "ui/console.h". Remove it. Acked-by: John Snow <jsnow@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200228114649.12818-5-philmd@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-03-05hw/timer/cadence_ttc: move timer_new from init() into realize() to avoid ↵Pan Nengyuan1-5/+11
memleaks There are some memleaks when we call 'device_list_properties'. This patch move timer_new from init into realize to fix it. Reported-by: Euler Robot <euler.robot@huawei.com> Signed-off-by: Pan Nengyuan <pannengyuan@huawei.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20200227025055.14341-7-pannengyuan@huawei.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-02-07stm32f2xx_timer: delay timer_new to avoid memleaksPan Nengyuan1-0/+5
There is a memory leak when we call 'device_list_properties' with typename = stm32f2xx_timer. It's easy to reproduce as follow: virsh qemu-monitor-command vm1 --pretty '{"execute": "device-list-properties", "arguments": {"typename": "stm32f2xx_timer"}}' This patch delay timer_new to fix this memleaks. Reported-by: Euler Robot <euler.robot@huawei.com> Signed-off-by: Pan Nengyuan <pannengyuan@huawei.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20200205070659.22488-3-pannengyuan@huawei.com Cc: Alistair Francis <alistair@alistair23.me> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-02-07armv7m_systick: delay timer_new to avoid memleaksPan Nengyuan1-0/+6
There is a memory leak when we call 'device_list_properties' with typename = armv7m_systick. It's easy to reproduce as follow: virsh qemu-monitor-command vm1 --pretty '{"execute": "device-list-properties", "arguments": {"typename": "armv7m_systick"}}' This patch delay timer_new to fix this memleaks. Reported-by: Euler Robot <euler.robot@huawei.com> Signed-off-by: Pan Nengyuan <pannengyuan@huawei.com> Message-id: 20200205070659.22488-2-pannengyuan@huawei.com Cc: qemu-arm@nongnu.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-01-24qdev: set properties with device_class_set_props()Marc-André Lureau18-19/+19
The following patch will need to handle properties registration during class_init time. Let's use a device_class_set_props() setter. spatch --macro-file scripts/cocci-macro-file.h --sp-file ./scripts/coccinelle/qdev-set-props.cocci --keep-comments --in-place --dir . @@ typedef DeviceClass; DeviceClass *d; expression val; @@ - d->props = val + device_class_set_props(d, val) Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20200110153039.1379601-20-marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-01-24hw/timer/aspeed_timer: Add a fall through commentPhilippe Mathieu-Daudé1-1/+1
Reported by GCC9 when building with CFLAG -Wimplicit-fallthrough=2: hw/timer/aspeed_timer.c: In function ‘aspeed_timer_set_value’: hw/timer/aspeed_timer.c:283:24: error: this statement may fall through [-Werror=implicit-fallthrough=] 283 | if (old_reload || !t->reload) { | ~~~~~~~~~~~^~~~~~~~~~~~~ hw/timer/aspeed_timer.c:287:5: note: here 287 | case TIMER_REG_STATUS: | ^~~~ cc1: all warnings being treated as errors Add the missing fall through comment. Fixes: 1403f364472 Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20191218192526.13845-4-philmd@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-01-20migration: Define VMSTATE_INSTANCE_ID_ANYPeter Xu1-1/+1
Define the new macro VMSTATE_INSTANCE_ID_ANY for callers who wants to auto-generate the vmstate instance ID. Previously it was hard coded as -1 instead of this macro. It helps to change this default value in the follow up patches. No functional change. Signed-off-by: Peter Xu <peterx@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Juan Quintela <quintela@redhat.com>
2020-01-07hw/timer/Kconfig: Intel 8254 PIT depends of ISA busPhilippe Mathieu-Daudé1-0/+1
Since i8254_common.c calls isa_register_ioport() from "hw/isa/isa.h" we can not select it when ISA_BUS is disabled. Add a 'depends on' clause. Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200106171912.16523-1-philmd@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2019-12-16aspeed: Change the "scu" property definitionCédric Le Goater1-8/+9
The Aspeed Watchdog and Timer models have a link pointing to the SCU controller model of the machine. Change the "scu" property definition so that it explicitly sets the pointer. The property isn't optional : not being able to set the link is a bug and QEMU should rather abort than exit in this case. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Greg Kurz <groug@kaod.org> Reviewed-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-id: 20191119141211.25716-17-clg@kaod.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-11-05hw/i386: Remove obsolete LoadStateHandler::load_state_old handlersPhilippe Mathieu-Daudé1-40/+0
These devices implemented their load_state_old() handler 10 years ago, previous to QEMU v0.12. Since commit cc425b5ddf removed the pc-0.10 and pc-0.11 machines, we can drop this code. Note: the mips_r4k machine started to use the i8254 device just after QEMU v0.5.0, but the MIPS machine types are not versioned, so there is no migration compatibility issue removing this handler. Suggested-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-10-25Merge remote-tracking branch ↵Peter Maydell16-4879/+13
'remotes/vivier2/tags/trivial-branch-pull-request' into staging Fix typos and docs, trivial changes and RTC devices split # gpg: Signature made Fri 25 Oct 2019 09:35:02 BST # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C # gpg: issuer "laurent@vivier.eu" # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full] # gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full] # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full] # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * remotes/vivier2/tags/trivial-branch-pull-request: hw/rtc/aspeed_rtc: Remove unused includes hw/rtc/xlnx-zynqmp-rtc: Remove unused "ptimer.h" include hw/rtc/mc146818: Include mc146818rtc_regs.h a bit less hw: Move Aspeed RTC from hw/timer/ to hw/rtc/ subdirectory hw: Move Exynos4210 RTC from hw/timer/ to hw/rtc/ subdirectory hw: Move Xilinx ZynqMP RTC from hw/timer/ to hw/rtc/ subdirectory hw: Move DS1338 device from hw/timer/ to hw/rtc/ subdirectory hw: Move TWL92230 device from hw/timer/ to hw/rtc/ subdirectory hw: Move sun4v hypervisor RTC from hw/timer/ to hw/rtc/ subdirectory hw: Move M41T80 device from hw/timer/ to hw/rtc/ subdirectory hw: Move M48T59 device from hw/timer/ to hw/rtc/ subdirectory hw: Move MC146818 device from hw/timer/ to hw/rtc/ subdirectory hw: Move PL031 device from hw/timer/ to hw/rtc/ subdirectory hw/timer: Compile devices not target-dependent as common object qemu-timer: reuse MIN macro in qemu_timeout_ns_to_ms event_notifier: avoid dandling file descriptor in event_notifier_cleanup util/async: avoid useless cast pci_bridge: fix a typo in comment qemu-options.hx: Update for reboot-timeout parameter Signed-off-by: Peter Maydell <peter.maydell@linaro.org> # Conflicts: # hw/timer/trace-events
2019-10-25hw/timer/bcm2835: Add the BCM2835 SYS_timerPhilippe Mathieu-Daudé3-0/+169
Add the 64-bit free running timer. Do not model the COMPARE register (no IRQ generated). This timer is used by Linux kernel and recently U-Boot: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/clocksource/bcm2835_timer.c?h=v3.7 https://github.com/u-boot/u-boot/blob/v2019.07/include/configs/rpi.h#L19 Datasheet used: https://www.raspberrypi.org/app/uploads/2012/02/BCM2835-ARM-Peripherals.pdf Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20191019234715.25750-4-f4bug@amsat.org [PMM: squashed in switch to using memset in reset] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-10-25hw/watchdog/milkymist-sysctl.c: Switch to transaction-based ptimer APIPeter Maydell1-7/+18
Switch the milkymist-sysctl code away from bottom-half based ptimers to the new transaction-based ptimer API. This just requires adding begin/commit calls around the various places that modify the ptimer state, and using the new ptimer_init() function to create the timer. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20191021141040.11007-1-peter.maydell@linaro.org
2019-10-25hw/timer/grlib_gptimer.c: Switch to transaction-based ptimer APIPeter Maydell1-4/+24
Switch the grlib_gptimer code away from bottom-half based ptimers to the new transaction-based ptimer API. This just requires adding begin/commit calls around the various places that modify the ptimer state, and using the new ptimer_init() function to create the timer. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20191021134357.14266-3-peter.maydell@linaro.org Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-10-25hw/timer/slavio_timer.c: Switch to transaction-based ptimer APIPeter Maydell1-4/+16
Switch the slavio_timer code away from bottom-half based ptimers to the new transaction-based ptimer API. This just requires adding begin/commit calls around the various places that modify the ptimer state, and using the new ptimer_init() function to create the timer. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20191021134357.14266-4-peter.maydell@linaro.org Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-10-24hw/rtc/mc146818: Include mc146818rtc_regs.h a bit lessPhilippe Mathieu-Daudé1-0/+1
Only 2 source files require the "mc146818rtc_regs.h" header. Instead of having it processed 12 times, by all objects using "mc146818rtc.h", include it directly where used. Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20191003230404.19384-13-philmd@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-10-24hw: Move Aspeed RTC from hw/timer/ to hw/rtc/ subdirectoryPhilippe Mathieu-Daudé3-186/+1
Move RTC devices under the hw/rtc/ subdirectory. Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Acked-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20191003230404.19384-12-philmd@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-10-24hw: Move Exynos4210 RTC from hw/timer/ to hw/rtc/ subdirectoryPhilippe Mathieu-Daudé2-609/+0
Move RTC devices under the hw/rtc/ subdirectory. Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Acked-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20191003230404.19384-11-philmd@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-10-24hw: Move Xilinx ZynqMP RTC from hw/timer/ to hw/rtc/ subdirectoryPhilippe Mathieu-Daudé3-280/+0
Move RTC devices under the hw/rtc/ subdirectory. Remove Alistair outdated email address (see commit c22e580c2ad). Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Acked-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20191003230404.19384-10-philmd@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-10-24hw: Move DS1338 device from hw/timer/ to hw/rtc/ subdirectoryPhilippe Mathieu-Daudé3-246/+0
The DS1338 is a Real Time Clock, not a timer. Move it under the hw/rtc/ subdirectory. Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Acked-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20191003230404.19384-9-philmd@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-10-24hw: Move TWL92230 device from hw/timer/ to hw/rtc/ subdirectoryPhilippe Mathieu-Daudé3-903/+0
The TWL92230 is an "energy management device" companion with a RTC. Since we mostly model the RTC, move it under the hw/rtc/ subdirectory. Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Acked-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20191003230404.19384-8-philmd@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-10-24hw: Move sun4v hypervisor RTC from hw/timer/ to hw/rtc/ subdirectoryPhilippe Mathieu-Daudé4-103/+0
Move RTC devices under the hw/rtc/ subdirectory. Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Artyom Tarasenko <atar4qemu@gmail.com> Message-Id: <20191003230404.19384-7-philmd@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-10-24hw: Move M41T80 device from hw/timer/ to hw/rtc/ subdirectoryPhilippe Mathieu-Daudé3-124/+0
The M41T80 is a Real Time Clock, not a timer. Move it under the hw/rtc/ subdirectory. Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20191003230404.19384-6-philmd@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-10-24hw: Move M48T59 device from hw/timer/ to hw/rtc/ subdirectoryPhilippe Mathieu-Daudé5-994/+0
The M48T59 is a Real Time Clock, not a timer. Move it under the hw/rtc/ subdirectory. Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20191003230404.19384-5-philmd@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-10-24hw: Move MC146818 device from hw/timer/ to hw/rtc/ subdirectoryPhilippe Mathieu-Daudé4-1069/+1
The MC146818 is a Real Time Clock, not a timer. Move it under the hw/rtc/ subdirectory. Use copyright statement from 80cabfad163 for "hw/rtc/mc146818rtc.h". Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Acked-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20191003230404.19384-4-philmd@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-10-24hw: Move PL031 device from hw/timer/ to hw/rtc/ subdirectoryPhilippe Mathieu-Daudé4-355/+0
The PL031 is a Real Time Clock, not a timer. Move it under the hw/rtc/ subdirectory. Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Acked-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20191003230404.19384-3-philmd@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-10-24hw/timer: Compile devices not target-dependent as common objectPhilippe Mathieu-Daudé1-11/+11
All these devices do not contain any target-specific. While most of them are arch-specific, they are shared between different targets of the same arch family (ARM and AArch64, MIPS32/MIPS64, endianess, ...). Put them into common-obj-y to compile them once for all targets. Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20191003230404.19384-2-philmd@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-10-24hw/timer/slavio_timer: Remove useless check for NULL t->timerPeter Maydell1-7/+5
In the slavio timer device, the ptimer TimerContext::timer is always created by slavio_timer_init(), so there's no need to check it for NULL; remove the single unneeded NULL check. This will be useful to avoid compiler/Coverity errors when a subsequent change adds a use of t->timer before the location we currently do the NULL check. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20191021134357.14266-2-peter.maydell@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-10-24hw/timer/xilinx_timer.c: Switch to transaction-based ptimer APIPeter Maydell1-5/+8
Switch the xilinx_timer code away from bottom-half based ptimers to the new transaction-based ptimer API. This just requires adding begin/commit calls around the various places that modify the ptimer state, and using the new ptimer_init() function to create the timer. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20191017132122.4402-3-peter.maydell@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-10-22hw/watchdog/etraxfs_timer.c: Switch to transaction-based ptimer APIPeter Maydell1-10/+13
Switch the etraxfs_timer code away from bottom-half based ptimers to the new transaction-based ptimer API. This just requires adding begin/commit calls around the various places that modify the ptimer state, and using the new ptimer_init() function to create the timer. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20191017132905.5604-7-peter.maydell@linaro.org
2019-10-22hw/timer/altera_timer.c: Switch to transaction-based ptimer APIPeter Maydell1-4/+9
Switch the altera_timer code away from bottom-half based ptimers to the new transaction-based ptimer API. This just requires adding begin/commit calls around the various places that modify the ptimer state, and using the new ptimer_init() function to create the timer. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20191017132905.5604-6-peter.maydell@linaro.org
2019-10-22hw/timer/lm32_timer: Switch to transaction-based ptimer APIPeter Maydell1-4/+9
Switch the lm32_timer code away from bottom-half based ptimers to the new transaction-based ptimer API. This just requires adding begin/commit calls around the various places that modify the ptimer state, and using the new ptimer_init() function to create the ytimer. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20191017132905.5604-4-peter.maydell@linaro.org
2019-10-22hw/timer/sh_timer: Switch to transaction-based ptimer APIPeter Maydell1-4/+9
Switch the sh_timer code away from bottom-half based ptimers to the new transaction-based ptimer API. This just requires adding begin/commit calls around the various places that modify the ptimer state, and using the new ptimer_init() function to create the timer. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20191017132905.5604-3-peter.maydell@linaro.org
2019-10-22hw/timer/puv3_ost.c: Switch to transaction-based ptimer APIPeter Maydell1-4/+5
Switch the puv3_ost code away from bottom-half based ptimers to the new transaction-based ptimer API. This just requires adding begin/commit calls around the various places that modify the ptimer state, and using the new ptimer_init() function to create the timer. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20191017132905.5604-2-peter.maydell@linaro.org
2019-10-22hw/timer/arm_mptimer.c: Undo accidental rename of arm_mptimer_init()Peter Maydell1-2/+2
In commit b01422622b we did an automated rename of the ptimer_init() function to ptimer_init_with_bh(). Unfortunately this caught the unrelated arm_mptimer_init() function. Undo that accidental renaming. Fixes: b01422622b7c7293196fdaf1dbb4f495af44ecf9 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20191017133331.5901-1-peter.maydell@linaro.org
2019-10-22hw/timer/exynos4210_mct: Initialize ptimer before starting itGuenter Roeck1-1/+1
When booting a recent Linux kernel, the qemu message "Timer with delta zero, disabling" is seen, apparently because a ptimer is started before being initialized. Fix the problem by initializing the offending ptimer before starting it. The bug is effectively harmless in the old QEMUBH setup because the sequence of events is: * the delta zero means the timer expires immediately * ptimer_reload() arranges for exynos4210_gfrc_event() to be called * ptimer_reload() notices the zero delta and disables the timer * later, the QEMUBH runs, and exynos4210_gfrc_event() correctly configures the timer and restarts it In the new transaction based API the bug is still harmless, but differences of when the callback function runs mean the message is not printed any more: * ptimer_run() does nothing as it's inside a transaction block * ptimer_transaction_commit() sees it has work to do and calls ptimer_reload() * the zero delta means the timer expires immediately * ptimer_reload() calls exynos4210_gfrc_event() directly * exynos4210_gfrc_event() configures the timer * the delta is no longer zero so ptimer_reload() doesn't complain (the zero-delta test is after the trigger-callback in the ptimer_reload() function) Regardless, the behaviour here was not intentional, and we should just program the ptimer correctly to start with. Signed-off-by: Guenter Roeck <linux@roeck-us.net> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20191018143149.9216-1-peter.maydell@linaro.org [PMM: Expansion/clarification of the commit message: the message is about a zero delta, not a zero period; added detail to the commit message of the analysis of what is happening and why the kernel boots even with the message; added note that the message goes away with the new ptimer API] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-10-15aspeed/timer: Add support for IRQ status register on the AST2600Cédric Le Goater1-8/+28
The AST2600 timer replaces control register 2 with a interrupt status register. It is set by hardware when an IRQ occurs and cleared by software. Modify the vmstate version to take into account the new fields. Based on previous work from Joel Stanley. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Joel Stanley <joel@jms.id.au> Message-id: 20190925143248.10000-8-clg@kaod.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-10-15aspeed/timer: Add AST2600 supportCédric Le Goater1-0/+51
The AST2600 timer has a third control register that is used to implement a set-to-clear feature for the main control register. On the AST2600, it is not configurable via 0x38 (control register 3) as it is on the AST2500. Based on previous work from Joel Stanley. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Joel Stanley <joel@jms.id.au> Message-id: 20190925143248.10000-7-clg@kaod.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-10-15aspeed/timer: Add support for control register 3Cédric Le Goater1-0/+19
The AST2500 timer has a third control register that is used to implement a set-to-clear feature for the main control register. This models the behaviour expected by the AST2500 while maintaining the same behaviour for the AST2400. The vmstate version is not increased yet because the structure is modified again in the following patches. Based on previous work from Joel Stanley. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Joel Stanley <joel@jms.id.au> Message-id: 20190925143248.10000-6-clg@kaod.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-10-15aspeed/timer: Introduce an object class per SoCCédric Le Goater1-11/+96
The most important changes will be on the register range 0x34 - 0x3C memops. Introduce class read/write operations to handle the differences between SoCs. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Joel Stanley <joel@jms.id.au> Message-id: 20190925143248.10000-5-clg@kaod.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-10-15hw/timer/mss-timerc: Switch to transaction-based ptimer APIPeter Maydell1-3/+8
Switch the mss-timer code away from bottom-half based ptimers to the new transaction-based ptimer API. This just requires adding begin/commit calls around the various places that modify the ptimer state, and using the new ptimer_init() function to create the timer. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20191008171740.9679-20-peter.maydell@linaro.org
2019-10-15hw/timer/imx_gpt.c: Switch to transaction-based ptimer APIPeter Maydell1-4/+17
Switch the imx_epit.c code away from bottom-half based ptimers to the new transaction-based ptimer API. This just requires adding begin/commit calls around the various places that modify the ptimer state, and using the new ptimer_init() function to create the timer. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20191008171740.9679-19-peter.maydell@linaro.org
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